JP2997599B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a structure of a MIS type semiconductor device having high resistance to hot carrier injection and a method of manufacturing the same.

[0002]

2. Description of the Related Art FIG. 5 is a sectional view showing the structure of a conventional MOS transistor. In the figure, 501 is a silicon substrate, 502 is a gate insulating film, 503 is a gate electrode, 5
04 is a drain region, 505 is a source region, and 512 is a channel region.

A silicon substrate 501 has, for example, a boron concentration of 1.
It is a P-type (001) substrate of × 10 ¹⁶ to 1 × 10 ¹⁷ / cm ³ . Reference numeral 502 denotes a gate insulating film formed by nitriding a silicon oxide film having a thickness of about 4 to 15 nm in a pure ammonia atmosphere at 950 ° C. to 1000 ° C. for 10 to 60 seconds.
The silicon nitride oxide film may be reoxidized in a pure oxidation atmosphere at about 1000 ° C. for 10 to 120 seconds, or may be annealed to the same degree in an inert gas atmosphere at a similar temperature. The gate electrode 503 is a polycrystalline silicon layer or metal doped with a high concentration N-type. The drain region 504 and the source region 505 are N-type silicon regions doped at 1 × 10 ²⁰ / cm ³ or more.

At this time, the concentration distribution of nitrogen atoms in the gate insulating film is shown in, for example, FIG. 7B, 1990 International Electron Device Meeting Technical Digest, p. 427 (1990 International).
Electron Devices Meeting, Technical Digest p.427
As shown in (), the highest value is 10 ²² / cm ³ at the interface between the silicon substrate and the insulating film. Most regions of the film contain about 10 ²⁰ / cm ³ of nitrogen atoms.

This document also shows a nitrogen concentration profile in the case where a thin silicon oxide film is formed and then nitrided in an N 2 O atmosphere at 1100 ° C. for 30 seconds. This figure is shown in FIG. According to this, the nitrogen concentration at the interface between the silicon substrate and the insulating film is not changed from the case of nitriding with ammonia, but the nitrogen concentration in the film is 10 ¹⁹ / cm ³ or less. This document also shows a nitrogen concentration profile of a pure silicon oxide film, which is shown in FIG.
(a).

[0006]

Since the conventional semiconductor device is configured as described above, when nitriding in an ammonia atmosphere, a large amount of fixed charge is generated because nitrogen is present at a high concentration in the gate insulating film. This causes a problem that the threshold voltage shifts. Generally, when nitriding with ammonia,
1989 International Electron Device Meeting Technical Digest 26
Table 2 on page 9 (1989 International Electron Devices Me
eting, Technical Digest, p. 269, Table 2), as well as the second line or third line on the right column on page 267 of the same document.
As described in the line, the fixed charge is higher than that of the pure silicon oxide film by 10 ¹¹ / cm ² to 10 ¹² / cm ^2, and the threshold voltage is shifted to the negative side by 0.1 to 0.4 V.

Further, when the nitrogen concentration is high, the number of oxide film traps increases, and there is a problem that hot carrier deterioration when the drain voltage and the gate voltage are equalized, that is, deterioration due to channel hot electron injection is remarkable. This is illustrated in FIG. 10 on page 362 and FIGS. 3, 4 and 6 on page 661 of the 1991 International Electron Device Meeting Technical Digest.
(1991 International Electron Devices Meeting Tec
hnical Digest p.362, Fig.10, p.651, Fig.3, Fig.4,
and Fig.6). Further, in the PMOS transistor, there is a problem that hot carrier deterioration is remarkable under a maximum gate current condition.

When nitriding is further performed in an N 2 O atmosphere, when the insulating film thickness is about 10 nm, as described above, the nitrogen concentration in the film is low, but when the insulating film thickness is 5 nm or less, It is difficult to reduce the nitrogen concentration of the film to 10 ¹⁹ / cm ³ or less. It should be at least 5 for regions with high nitrogen
This is because the nitrogen concentration in the film cannot be reduced as the film thickness decreases. Further, when nitriding in an N2 O atmosphere, there is a problem that it is difficult to manufacture a micro device because a heat treatment for a considerably long time is required at a high temperature.

Conventionally, as a method of alleviating the hot carrier effect, there is an LDD (Lightly Doped Drain) as a device structure for alleviating the electric field near the drain, that is, reducing the number of generated hot electrons. This L
FIG. 6 shows a partial cross-sectional view of the DD structure as another conventional example.
In the figure, 601 is a silicon substrate, 602 is a gate insulating film, 603 is a gate electrode, 604 is a high-concentration drain region, 608 is a sidewall, 609 is a low-concentration drain region, and 612 is a channel region.

In this structure, a low-concentration drain region 609 is provided near the gate of the high-concentration drain region 604.
With such a structure, the P / N junction near the drain becomes a graded junction from a step junction, the depletion layer is easily spread, and the curvature of the junction is increased, so that the strong electric field and the electric field concentration are reduced.

In such an LDD structure, the drain
Lanche hot carrier is injected into the sidewall
As a result, the side wall is
Avalanche hot carrier resistance can be improved
Wear. However, even in this LDD, as described above, since nitrogen in the service id wall is present at a high concentration,
There is a problem that the fixed charge amount increases and the threshold voltage shifts. Furthermore, hot carriers are injected into the sidewall region, and a negative charge trap occurs. There is a problem that the path is bent, and the transconductance is deteriorated and the saturation current is reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned various problems. The present invention has been made to reduce the fixed charge of the gate insulating film, reduce the shift of the threshold voltage, reduce the oxide film trap, and improve the channel hot. MI that can suppress hot carrier deterioration due to electron injection
It is intended to obtain the structure of the SFET.

Another object of the present invention is to provide an LDD transistor structure capable of reducing fixed charges in the side wall region and suppressing electric field modulation in the low concentration drain region due to the fixed charges. Still another object of the present invention is to provide a method for manufacturing a semiconductor device having an insulating film realizing the above structure.

[0014]

According to the present invention, there is provided a semiconductor device comprising: a source / drain region formed of a first conductivity type semiconductor formed on one main surface of a semiconductor layer at an appropriate distance;
A channel region sandwiched between a source region and a drain region;
Have a gate insulating film provided on the surface of the channel region
In addition, the drain region is formed between the high concentration region and the low concentration region.
In the MIS type semiconductor device described above,
A first film containing low-concentration hydrogen atoms and 10 ¹⁹ / cm ³ or more nitrogen atoms in contact with the interface with the low-concentration region, and at least 1.5 times the thickness of the first film. And a second film in contact with the first film and containing 10 ¹⁹ / cm ³ or less of nitrogen atoms.

Further, a method of manufacturing a semiconductor device according to the present invention is provided.
The method forms a first oxide film on the surface of the silicon layer,
The oxide film of No. 1 is nitrided in an atmosphere containing ammonia to form a nitrogen source.
A nitrided oxide film containing a concentration of 10 ¹⁹ / cm ³ or more is formed.
Annealing or oxidizing the nitrided oxide film in
After lowering, and the nitrogen atom to the oxynitride film density 10 ¹⁹
/ Cm ³ was to deposit a second oxide layer comprising the following is also <br/> of.

[0016]

[0017]

The semiconductor device according to the present invention comprises a MOSFET.
Contains nitrogen on at least low concentration region surface of LDD structure
To provide an interface with the low-concentration region.
Recently , it contains nitrogen atoms at a concentration of 10 ¹⁹ / cm ³ or more.
In most areas other than nitrogen, the concentration of nitrogen is 10 ¹⁹ / cm ³ or less.
Because it contains atoms, it is provided at the interface of the low concentration region.
Drain avalanche hot
High resistance to generation of interface states due to carrier injection
Having, and the other insulating layer having a low nitrogen atom concentration,
Lower the average nitrogen concentration of the entire insulating film,
And reduce oxide traps.
The electric field modulation in the low concentration region is suppressed.

Further, the manufacture of the semiconductor device according to the present invention
In the method, an oxide film is formed on a silicon layer surface, and the oxide film is formed.
Is nitrided in an atmosphere containing ammonia and the nitrogen atom concentration is 1
A nitrided oxide film containing at least 0 ¹⁹ / cm ³ is formed.
Annealed or oxidized film to reduce hydrogen concentration in film
Thereafter, a nitrogen atom concentration of 10 ¹⁹ / cm ^{3 or} less is formed on the nitrided oxide film.
Since an oxide film, which is included below, is deposited,
For generation of interface states by balunche hot carrier injection
An insulating film that has high resistance to
It can be easily formed.

[0019]

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a structure of an NMOS transistor which is a semiconductor device according to a first embodiment of the present invention.
In FIG. 1, 101 is a silicon substrate, 102 is a gate insulating film, which has a nitrogen concentration of 10 in most of the film.
¹⁹ / cm ³ or more, preferably 10 and ²⁰ / cm ³ or more is nitride oxide film 106 was formed on the nitride oxide film 106, most of the nitrogen concentration is 10 ¹⁹ / cm ³ or less of silicon in the film And an oxide film 107. 103 is a gate electrode, 104 is a drain region, 105 is a source region, 1
Reference numeral 12 denotes a channel region.

The thickness of the nitrided oxide film 106 is 4 n
m, the thickness of the silicon oxide film 107 is, for example, 8 nm. The profile of the nitrogen concentration at this time is as shown in FIG. That is, most of the region of about 4 nm near the silicon substrate 101 contains a nitrogen concentration of 10 ²⁰ / cm ³ or more, and most of the region of about 8 nm near the gate electrode 103 .
The region contains a nitrogen concentration of 10 ¹⁹ / cm ³ or less.

In this embodiment, the gate insulating film 1
02 has a two-layer structure, and is approximately 4n close to the silicon substrate 101.
In most areas of m, nitride oxide film 106 nitrogen concentration includes 10 ²⁰ / cm ³ or more also, the silicon oxide film 107 which nitrogen concentration in most region of about 8nm near the gate electrode 103 includes 10 ¹⁹ / cm ³ or less , The insulating layer 106 having a high nitrogen concentration provided at the interface with the channel region 112 has high resistance to the generation of the interface state due to the injection of the drain avalanche hot carrier. The insulating layer 107 having a low nitrogen concentration lowers the average nitrogen concentration of the entire gate insulating film 102, reduces fixed charges, reduces oxide film traps, and reduces the channel under the condition that the gate voltage and the drain voltage are almost equal.
This has the effect of suppressing hot electron injection.

FIG. 3 shows a partial cross-sectional structure of a semiconductor device according to another embodiment of the present invention.
This is an example in which the present invention is applied to a D structure. In FIG. 3, 301 is a silicon substrate, 302 is a gate insulating film,
303 is a gate electrode; 304 is a high concentration drain region;
09 is a low concentration drain region, 306 is a nitrogen concentration of 10 ¹⁹
/ Cm ³ or more, preferably 10 ²⁰ / cm ³ or more, 307 is a silicon oxide film formed on the nitrided oxide film 306 and having a nitrogen concentration of 10 ¹⁹ / cm ³ or less in most of the film. 308 is a side wall insulating film;
2 is a channel region.

The thickness of the nitrided oxide film 306 is 4n.
m, the thickness of the silicon oxide film 307 is, for example, 8 nm. Also, at this time, the nitrided oxide film 30 in the sidewall portion is formed.
6 and the silicon oxide film 307 have the same nitrogen concentration profile as in FIG.

In this embodiment, an insulating film containing nitrogen is provided between at least the surface of the low-concentration region of the LDD structure and the sidewall insulating film, and this insulating film is composed of two layers. 10 ¹⁹ / in contact with the drain region 309
a thin nitrided oxide film 306 having a nitrogen concentration of at least ³ cm ³ ,
Further, it is in contact with the sidewall insulating film 308 and 10 ¹⁹ / cm
³ since the provided silicon oxide film 307 having the following nitrogen concentration, the lightly doped drain region 309 high nitrogen oxide film 306 having a nitrogen concentration which is provided at the interface Dorein'a
The silicon oxide film 307 having low nitrogen atoms thereon has a high resistance to the generation of interface states due to the injection of valanche hot carriers. This has the effect of suppressing the electric field modulation of the low concentration drain region 309 due to the fixed charge.

FIG. 4 is a cross-sectional view showing the main steps of a method of manufacturing a semiconductor device according to the present invention, in particular, a method of forming an insulating film having a nitrogen concentration profile shown in FIG. 2 on a silicon substrate. Is shown. In the figure, 401 is a silicon substrate, 4
Reference numeral 11 denotes a first silicon oxide film, 406 denotes a second silicon oxide film, and 407 denotes a nitrided oxide film.

Hereinafter, the manufacturing method of this embodiment will be described with reference to the drawings. First, as shown in FIG.
A first silicon oxide film 411 is formed to a thickness of 4 nm on the substrate 01.

Next, as shown in FIG.
Nitriding is performed for 10 to 60 seconds in a pure ammonia atmosphere at 0 ° C., and reoxidation is performed in a pure oxygen atmosphere at about 1000 ° C. for about 30 seconds. The increase in film thickness due to this re-oxidation is 1 nm or less. Thus, a nitrided oxide film 406 is formed.

Here, nitriding in an ammonia atmosphere and then re-oxidizing in an oxygen atmosphere are performed because nitriding in an ammonia atmosphere lowers the concentration of hydrogen in a film formed simultaneously with nitrogen to generate trap levels due to hydrogen. This is to prevent

Next, as shown in FIG. 4C, a second silicon oxide film 407 is deposited on the nitrided oxide film 406 at a low temperature of 900.degree. Thus, an insulating film having the nitrogen concentration profile shown in FIG. 2 is formed. Here, the formation of the nitrided oxide film 406 and the formation of the silicon oxide film 407 may be performed in the same apparatus.

When such an insulating film having the nitrogen concentration profile shown in FIG. 2 is used in a region into which a drain avalanche hot carrier is injected, as described above, the resistance to the generation of the interface state is increased, and the fixed charge and Oxide traps are reduced. Since the effect of the fixed charge on the threshold voltage becomes more significant as it approaches the silicon substrate, it is desirable to make the nitrided oxide film 406 as thin as possible. However,
When the thickness of the entire gate insulating film is smaller than 4 nm, a tunneling current flows. Therefore, the total thickness is appropriately set to 4 nm or more . Since the trapping of electrons into the oxide film trap occurs mainly in a region which is rather far from the silicon substrate 401, a sufficient effect is exerted if the silicon oxide film 407 is thicker than the nitrided oxide film. It is sufficient that the nitride oxide film 406 has an interface with the silicon substrate 401 to improve the resistance to the generation of the interface state.

The thickness of the gate insulating film is, for example, 20 nm.
When the thickness is as thick as above, it was difficult to nitride the nitrided material to form a region having a high nitrogen concentration at the interface between the silicon substrate and the gate insulating film, and required a lot of heat treatment. However, according to this embodiment, the interface between the nitrided oxide film and the silicon substrate with a high concentration of nitrogen atoms can be efficiently formed with a small amount of heat treatment.

Although the above embodiments have been described with reference to an NMOS transistor, the nitrided oxide film of a PMOS transistor is resistant to the generation of interface states.
The same effect can be obtained because the silicon oxide film has a small oxide film trap and a small fixed charge amount.

[0034]

As described above, according to the present invention, the size
For generation of interface states at the interface between the wall insulating film and the silicon substrate
Use a nitrided oxide film that is highly resistant to
An oxide trap and a silicon with a small fixed charge are placed at the interface with the edge film.
Improved hot carrier resistance due to the use of a Kon oxide film
As well as trapped by fixed charges and oxide traps.
The effect is that the current modulation by the trapped electrons can be reduced.
You.

[0035]

Further, according to the present invention, an oxide film is formed on the surface of the silicon layer, nitrided in an atmosphere containing ammonia, and then annealed or oxidized. ^Since an oxide film containing ¹⁹ / cm ³ or less is deposited, there is an effect that an insulating film having high resistance to generation of interface states due to hot carrier injection and having a small fixed charge can be formed by a small heat treatment .

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a nitrogen concentration profile in a gate insulating film of the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a partial cross-sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a sectional view illustrating a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 5 is a cross-sectional view of a conventional semiconductor device.

FIG. 6 is a sectional view of a part of a semiconductor device according to another conventional example.

FIG. 7 is a diagram showing a nitrogen concentration profile in a gate insulating film of a semiconductor device according to a conventional example.

[Explanation of symbols]

Reference Signs List 101 silicon substrate 102 gate insulating film 103 gate electrode 104 drain region 105 source region 106 nitrided oxide film 107 silicon oxide film 112 channel region 301 silicon substrate 302 gate insulating film 303 gate electrode 304 high concentration drain region 306 nitrided oxide film 307 silicon oxide film 308 Sidewall insulating film 309 Low-concentration drain region 312 Channel region 401 Silicon substrate 406 Nitride oxide film 407 Second silicon oxide film 411 First silicon oxide film

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/78

Claims (5)

(57) [Claims] A source and drain region formed of a first conductivity type semiconductor at an appropriate distance from one main surface of a semiconductor layer; a channel region sandwiched between the source and drain regions; It has a gate insulating film provided on the surface of the region, and the drain region is heavily doped region
And the MIS type semiconductor device comprising a low concentration region, the low concentration drain region surface, the first containing a low concentration of hydrogen atoms and 10 ¹⁹ / cm ³ or more nitrogen atoms in contact with the interface between the low density region A membrane and at least 1.5 of the first membrane
10 times more than 10 ¹⁹ / cm in contact with the first film
³ to and a second film containing less nitrogen atoms wherein a. 2. A first oxide film is formed on a surface of a silicon layer.
And nitriding the first oxide film in an atmosphere containing ammonia.
To form a nitrided oxide film containing nitrogen atoms at a concentration of 10 ¹⁹ / cm ³ or more.
Forming and annealing or oxidizing the nitrided oxide film to form a hydrogen concentration layer in the film.
And lowering the nitrogen atoms on the oxynitride film at a concentration of 10 ¹⁹ / cm ³ or less.
Depositing a second oxide film containing
Semiconductor device manufacturing method. 3. A method according to claim 1 , wherein the second oxide film has a small thickness.
Characterized in that it is deposited in a thickness of at least 1.5 times
The method for manufacturing a semiconductor device according to claim 2. 4. The method according to claim 1, wherein the second oxide film is formed of a nitrided oxide film.
Deposited so that the total thickness of the combined film becomes 4 nm or more.
4. The method of manufacturing a semiconductor device according to claim 3, wherein
Law. 5. An interface between the nitrided oxide film and the silicon layer surface.
Nitrogen atom concentration around 10 ^{twenty one} /cm ^Three That's all
3. The semiconductor according to claim 2, wherein the semiconductor is formed as follows.
Device manufacturing method.