JP2993456B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an integrated circuit and a semiconductor device.

[Summary of the Invention] The present invention is characterized by having a magnetic layer and an electrically conductive layer above a semiconductor chip, and provides an electromagnetic shielding effect as compared with the related art.

[0003]

2. Description of the Related Art FIG. 7 is a cross-sectional view of a chip of a conventional semiconductor device. The metal wiring layer 1 is disposed on the electrical insulating layer 3 and is covered by another electrical insulating layer 4. 8 is a gate material made of polysilicon or the like, 14 is a silicon oxide generally called low cost, 10 is a gate oxide film, 12 is a diffusion region containing impurities, 11
Is a so-called contact portion for making a hole in the electrically insulating layer 3 and connecting the diffusion regions of the metal wiring layers 1 and 12. Reference numeral 13 denotes a silicon substrate.

FIG. 6 is a sectional view of a chip of a semiconductor device as a conventional example, similar to FIG. 7, but it is simplified only in a portion related to the present invention. Are shown as a region 31 of FIG. The metal wiring layer 1 is disposed on the electrical insulating layer 3, and the portion other than the bonding pad portion 2 is covered by another electrical insulating layer 4. Further, although not shown, the semiconductor chip is generally sealed with a permanent mold material at the time of mounting. For this molding material, an epoxy resin is mainly used.

[0005]

In recent years, the speed of semiconductor integrated circuits has increased, and the rate of change of the internal signal waveform has been reduced to 1 NS or less. In the past, as a measure to prevent electromagnetic noise, only measures against current noise from the input / output terminals or the power supply were sufficient, but measures to prevent electromagnetic noise from the semiconductor chip surface from going outside will be required in the future. . In addition, recent technological advances in semiconductors not only increase the speed but also handle weak signals, not only to prevent internal semiconductor noise from being emitted to the outside, but also to prevent semiconductor chips from malfunctioning due to external noise. In addition, the need for external electromagnetic shielding is increasing. Conventionally, the electromagnetic shield has been applied to an input / output terminal and a power supply connected to the outside of the semiconductor integrated circuit. However, electromagnetic shields for blocking external noise from the semiconductor surface have not been adequately addressed. Although a method of shielding with the same material as that of a part of the wiring layer is conceivable, merely using a conductor alone has an electric-field interruption effect, but an insufficient magnetic-force-line interruption effect.

This is because the molding material for sealing the conventional semiconductor chip is an epoxy resin, which is an electromagnetic insulator, and has a property of transmitting electromagnetic waves without absorbing them. This means that external electrical noise is transmitted to the inside of the semiconductor chip, and that the electrical noise inside the semiconductor chip is transmitted to the outside through the mold. That is, the conventional molding material did not have an electromagnetic shielding effect. In the past, as a countermeasure against static electricity in semiconductor integrated circuits, it was only necessary to take measures against the input / output terminals that are directly electrically connected to the outside. Due to diversification of conditions, destruction of a semiconductor integrated circuit due to static electricity from the mold surface has been observed, and some measures against electromagnetic shielding have been required on the semiconductor chip surface. Accordingly, it is an object of the present invention to provide a semiconductor device in which electromagnetic shielding is performed on the surface of a semiconductor chip.

[0007]

According to the present invention, there is provided a semiconductor device comprising:
In a semiconductor device having a single layer or a plurality of metal wiring layers for connecting active elements, an electrical conductive layer different from the metal wiring layer via an electrical insulating layer above the metal wiring layer, and a magnetic layer , Are arranged in layers.

The semiconductor device according to the present invention is characterized in that, in the semiconductor device, the electric conductive layer is connected to a power supply wiring of the semiconductor device.

Further, in the semiconductor device according to the present invention, in the semiconductor device, the electric conductive layer has an extraction terminal independent of a power supply terminal of the semiconductor device.

Further, the method of manufacturing a semiconductor device according to the present invention comprises:
In a method of manufacturing a semiconductor device having a single layer or a plurality of metal wiring layers for connecting active elements, an electrically conductive layer different from the metal wiring layer is formed above the metal wiring layer via an electrical insulating layer. And forming a magnetic layer by laminating the magnetic layer with the electrically conductive layer, wherein the electrically conductive layer is formed by coating, sputtering or vapor deposition.

[0011]

According to the present invention, the magnetic material and the electrically conductive layer perform electromagnetic shielding and electric field blocking of the semiconductor chip.

[0012]

FIG. 1 is a sectional view showing a chip of a semiconductor device according to an embodiment of the present invention. As in the conventional example of FIG. 4, the metal wiring layer 1 is disposed on the electrical insulating layer 3 and the portions other than the bonding pad portion 2 are covered by another electrical insulating layer 4. A magnetic layer 5 is arranged via an electrical insulating layer 4 above the metal wiring layer 1. The magnetic layer 5 performs electromagnetic shielding.

The magnetic layer in the method of the present invention may not be a so-called ordinary magnetic substance as long as it has a magnetic moment, and may be a combination of a wave-like polymer material and a magnetic substance such as ferrite. Applications are also conceivable. In the embodiment, an electric insulating layer 7 is provided around and above the magnetic layer 5 for protection.
However, a method of directly covering a sealing mold without the electric insulating layer 7 is also conceivable. As shown in FIG. 6 of the conventional example, the region below the third electrically insulating layer is shown as another region 31.

In the conventional molding method, stress is generated during molding, and the coefficient of thermal expansion of the molding material is different from that of silicon forming the semiconductor chip. According to the present invention, a temperature change due to heating or the like causes a mechanical strain on the surface of the integrated circuit, which causes disconnection of the metal wiring layer 1 and changes in electrical characteristics and reliability. According to the method (1), the effect of preventing the magnetic layer 5 from absorbing a difference in thermal expansion between the molding material and silicon to prevent a change in electrical characteristics and a deterioration in reliability can be expected. In addition, by increasing the heat conductivity and the heat radiation rate and improving the heat radiation with respect to the heat generated by the internal operation, the effect of not changing the electrical characteristics and deteriorating the reliability can be expected.

FIG. 2 shows another embodiment of the present invention.
This is an example in which an electrically conductive layer 6 different from the metal wiring layer 1 is laminated on the magnetic layer 5 as compared with the metal wiring layer 1. Silicon or the like may be used. This is not only an electromagnetic shield,
The electric field blocking effect is also enhanced. The electrically conductive layer 6
The vertical relationship between the magnetic layer 5 and the magnetic layer 5 may be reversed.

FIG. 3 is another embodiment of the present invention.
In this example, an electrically conductive layer 6 different from the metal wiring layer 1 is laminated on the magnetic layer 5 and the electrically conductive layer 6 is connected to the bonding pad portion 2. This bonding pad 2
By connecting to the power supply wiring of the semiconductor device, it is possible to further enhance the electromagnetic shielding and electric field blocking effects.

The bonding pad portion 2 connected to the electrically conductive layer 6 can be given a different potential independently of the power supply terminal of the semiconductor device. In this case, an application example in which a signal having a phase opposite to that of the external noise is applied to cancel noise entering the inside is also possible.

FIG. 4 shows another embodiment of the present invention.
This is an embodiment in which an electric conductive layer 6 different from the metal wiring layer 1 is laminated on the magnetic layer 5 and the electric conductive layer 6 is directly taken out from the external electrode 21 similarly to the bonding pad portion 2.

A method is also conceivable in which the electrically conductive layer 6 is not connected to the bonding pad portion 2 but is externally taken out as an electrode.
FIG. 5 shows still another embodiment of the present invention.
In this method, the electrode 22 is directly taken out to the outside without passing through the electrically conductive layer 6.

The method for producing the electrically conductive layer 6 and the magnetic layer 5 can be realized by a coating, sputtering or vapor deposition method as in the conventional method for producing a semiconductor or magnetic tape.
Here, the electromagnetic effect can be expected not only in the form of a plane but also in the form of a mesh or a line having a wavelength equal to or less than the noise wavelength. It may be only on the active element sensitive to noise. Further, in the case where it is arranged around the chip, the effect of reducing the influence of mechanical distortion due to the difference in thermal expansion between the mold material and silicon can be expected.

[0021]

As described above, according to the present invention, the magnetic material and the electrically conductive layer perform electromagnetic shielding and electric field shielding on the surface of the semiconductor chip, so that electromagnetic noise from the surface of the semiconductor chip can be externally transmitted. It has the effect of preventing malfunction and destruction of the semiconductor chip due to external noise.

[Brief description of the drawings]

FIG. 1 is a sectional view of a chip of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a chip sectional view of a semiconductor device according to another embodiment of the present invention.

FIG. 3 is a chip sectional view of a semiconductor device according to still another embodiment of the present invention.

FIG. 4 is a chip sectional view of a semiconductor device according to still another embodiment of the present invention.

FIG. 5 is a chip sectional view of a semiconductor device according to still another embodiment of the present invention.

FIG. 6 is a simplified sectional view of a chip of the semiconductor device of FIG. 7 in a conventional example.

FIG. 7 is a sectional view of a chip of a semiconductor device in a conventional example.

[Explanation of symbols]

1 is a metal wiring layer. 2 is a bonding pad part. 3 is an electrical insulating layer. 4 is another electrically insulating layer. 5 is a magnetic layer. 6 is an electrically conductive layer different from the metal wiring layer 1. 7 is an electrical insulating layer. 31 is another area below the electrically insulating layer of 3. 21 is an external electrode from which the electrically conductive layer 6 is taken out in the same manner as the bonding pad portion 2. Reference numeral 22 denotes an external electrode without the electric conductive layer 6 when the magnetic layer 5 has conductivity.

Claims (4)

(57) [Claims] 1. A semiconductor device having a single layer or a plurality of metal wiring layers for connecting between active elements, comprising: an electrically conductive layer different from the metal wiring layer via an electrical insulating layer above the metal wiring layer. , A magnetic layer and a magnetic layer. 2. The semiconductor device according to claim 1, wherein said electrically conductive layer is connected to a power supply wiring of said semiconductor device. 3. The semiconductor device according to claim 1, wherein said electrically conductive layer has an extraction terminal independent of a power supply terminal of said semiconductor device. 4. A method for manufacturing a semiconductor device having a single layer or a plurality of metal wiring layers for connecting active elements, wherein an electrical insulating layer is provided above said metal wiring layer, and an electrical connection different from said metal wiring layer is provided. A semiconductor, comprising: forming a conductive layer; and forming a magnetic layer by laminating the magnetic layer with the electric conductive layer, wherein the electric conductive layer is formed by coating, sputtering, or vapor deposition. Device manufacturing method.