JPH09330929A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain an electromagnetic shielding on the surface of a semiconductor chip by a method wherein a magnetic material layer is provided over metal wiring layers via an electrically insulating layer and an electrically conducting layer different from the metal wiring layers is provided bing adjacent to the magnetic material layer. SOLUTION: Metal wiring layers 1 are provided on an electrically insulating layer 3 and are covered with other electrically insulating layer 4 excluding bonding pad parts 2. A magnetic material layer 5 is provided over the layers 1 via the layer 4. The surface of a semiconductor chip is performed an electromagnetic shielding by this layer 5. Alternatively an electrically conducting layer 6 different from the layers 1 is provided being adjacent to the layer 5. The material for this layer 6 may be a metal, which is used for other wiring layers, or a polysilicon material, which is used for a gate, or the like. Moreover, the layer 6 different from the layers 1 is placed adjacent to the layer 5 and this layer 6 may be connected with the pad parts 2. Thereby, the electromagnetic shielding and an electric field shut-off effect on the surface of the semiconductor chip can be more enhanced.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to an integrated circuit and a semiconductor device.

SUMMARY OF THE INVENTION The present invention is characterized by having a magnetic layer on a semiconductor chip, and provides an electromagnetic shield effect as compared with the prior art.

[0003]

2. Description of the Related Art FIG. 7 shows a sectional view of a chip of a semiconductor device as a conventional example. The metal wiring layer 1 is disposed on the electrically insulating layer 3, and is covered with another electrically insulating layer 4. 8 is a gate material made of polysilicon or the like, 14 is a silicon oxide generally called Locos, 10 is a gate oxide film, 12 is a diffusion region containing impurities, and 11
Is a so-called contact portion which is formed by making a hole in the electrically insulating layer 3 and connecting the diffusion regions of the metal wiring layers 1 and 12. 13 is a silicon substrate.

FIG. 6 is a cross-sectional view of a chip of a semiconductor device as a conventional example similar to FIG. 7, but it is a simplified view of only the portion related to the present invention. The area 31 is shown. The metal wiring layer 1 is arranged on the electrically insulating layer 3, and is covered with the electrically insulating layer 4 other than the bonding pad portion 2. Further, although the semiconductor chip is not shown, it is generally sealed with a molding material at the time of mounting. Epoxy resin is mainly used as the molding material.

[0005]

In recent years, semiconductor integrated circuits have become faster and the rate of change of internal signal waveform has become less than 1 NS. In the past, as measures against electromagnetic noise, only measures against current noise from the input / output terminals or power supply were sufficient, but in the future measures against electromagnetic noise from the surface of the semiconductor chip will be needed. . In addition, recent technological advances in semiconductors not only increase the speed, but also handle weak signals, so that not only does the semiconductor internal noise not be emitted to the outside, but it also prevents the semiconductor chip from malfunctioning due to external noise. In addition, the need for external electromagnetic shielding is increasing. Conventionally, this electromagnetic shield has been applied to an input / output terminal and a power source connected to the outside of the semiconductor integrated circuit. However, the electromagnetic shield for blocking external noise from the semiconductor surface has not been sufficiently dealt with until now. A method of shielding a part of the wiring layer with the same material is conceivable, but the magnetic field line blocking effect was insufficient although the electric field blocking effect was achieved only by the conductor.

This is because the conventional molding material for sealing the semiconductor chip is an epoxy resin, which is electromagnetically an insulator and has the property of transmitting electromagnetic waves without absorbing them. This means that electrical noise from the outside is transmitted to the inside of the semiconductor chip, and that electrical noise inside the semiconductor chip passes through the mold and goes outside. That is, the conventional molding material has no electromagnetic shielding effect. In the past, as a countermeasure against static electricity in semiconductor integrated circuits, it was necessary to take countermeasures only for the input / output terminals that are directly electrically connected to the outside.However, due to the miniaturization of semiconductor integrated circuits, changes in manufacturing methods such as thinner gate films, and Due to the diversification of conditions, it has become possible to see damage to the semiconductor integrated circuit due to static electricity from the mold surface, and some sort of electromagnetic shield measures are also required on the semiconductor chip surface. Therefore, it is an object of the present invention to provide a semiconductor device in which the surface of a semiconductor chip is electromagnetically shielded.

[0007]

According to the present invention, there is provided a semiconductor device comprising:
In a semiconductor device having a single layer or a plurality of metal wiring layers for connecting active elements, a magnetic layer is disposed above the metal wiring layers with an electrically insulating layer interposed therebetween, and an electrically conductive layer different from the metal wiring layers. Exists adjacent to the magnetic layer.

The semiconductor device of the present invention is characterized in that, in the semiconductor device, the electrically conductive layer is connected to a power supply wiring of the semiconductor device.

Further, the semiconductor device of the present invention is characterized in that, in the semiconductor device, the electrically conductive layer has a take-out terminal independent of a power supply terminal of the semiconductor apparatus.

Further, the method of manufacturing a semiconductor device according to the present invention comprises:
In a method of manufacturing a semiconductor device having a single layer or a plurality of metal wiring layers connecting active elements, a step of forming a magnetic layer above the metal wiring layer via an electrically insulating layer, and the metal wiring layer Forming a different electrically conductive layer adjacent to the magnetic layer, the electrically conductive layer being formed by coating, sputtering or vapor deposition.

[0011]

According to the method of the present invention, the magnetic body electromagnetically shields the semiconductor chip.

[0012]

1 is a cross-sectional view of a semiconductor device chip according to an embodiment of the present invention. Similar to the conventional example of FIG. 4, the metal wiring layer 1 is arranged on the electrical insulating layer 3 and is covered with the other electrical insulating layer 4 except for the bonding pad portion 2. A magnetic layer 5 is arranged above the metal wiring layer 1 with an electrically insulating layer 4 interposed therebetween. The magnetic layer 5 provides electromagnetic shielding.

The magnetic layer in the method of the present invention need not be a so-called ordinary magnetic body as long as it has a magnetic moment, and a combination of a wave-moving polymer material and a magnetic body such as ferrite can be used. Applications are also possible. In the embodiment, an electrical insulating layer 7 is further provided around and above the magnetic layer 5 for protection.
However, a method of directly covering the mold for sealing without the electrically insulating layer 7 may be considered. Conventional Example Similar to FIG. 6, the area below the electrically insulating layer 3 is shown as another area 31.

In the conventional molding method, stress is generated at the time of molding, and since the coefficient of thermal expansion of the molding material is different from that of silicon forming a semiconductor chip, internal heat generation at the time of use or temperature change of the external environment, and mounting at the time of mounting. The temperature change due to heating or the like causes mechanical strain on the surface of the integrated circuit, which causes disconnection of the metal wiring layer 1, changes in electrical characteristics, and deterioration of reliability. The above method can also be expected to have an effect of preventing the magnetic material layer 5 from absorbing a difference in thermal expansion between the mold material and silicon, thereby preventing a change in electrical characteristics and deterioration of reliability. Further, by increasing the thermal conductivity and the thermal emissivity to improve the heat dissipation with respect to the heat generated by the internal operation, it is possible to expect the effect of not changing the electrical characteristics and deteriorating the reliability.

FIG. 2 shows another embodiment of the present invention.
This is an example in which an electrically conductive layer 6 different from the metal wiring layer 1 is adjacent to the magnetic layer 5 as compared with. This electrically conductive layer 6
The material may be a metal used for another wiring layer or polysilicon used for a gate. This enhances not only the electromagnetic shield but also the electric field blocking effect. Further, the electrically conductive layer 6 and the magnetic layer 5 may be reversed in the vertical relationship.

FIG. 3 shows another embodiment of the present invention.
In this example, an electrically conductive layer 6 different from the metal wiring layer 1 is adjacent to the magnetic layer 5 and the electrically conductive layer 6 is connected to the bonding pad portion 2. This bonding pad section 2
By connecting with the power supply wiring of the semiconductor device, it is possible to further enhance the electromagnetic shield and electric field blocking effects.

Further, the bonding pad portion 2 connected to the electrically conductive layer 6 can be provided independently of the power supply terminal of the semiconductor device and given another potential. In this case, it is possible to provide an application example of canceling the noise entering the inside by giving a signal having a phase opposite to that of the external noise.

FIG. 4 shows another embodiment of the present invention.
This is an example in which an electrically conductive layer 6 different from the metal wiring layer 1 is provided adjacent to the magnetic layer 5 and the electrically conductive layer 6 is directly taken out from the external electrode 21 like the bonding pad portion 2.

Another possible method is to take out the electrically conductive layer 6 as an electrode to the outside without connecting it to the bonding pad portion 2.
FIG. 5 shows another embodiment of the present invention, in which the magnetic layer 5
When the electrode 22 has conductivity, it is a method of directly taking out the electrode 22 to the outside without interposing the electrically conductive layer 6.

The method for producing the electrically conductive layer 6 and the magnetic layer 5 can be realized by a coating, sputtering or vapor deposition method as in the conventional semiconductor or magnetic tape manufacturing method.
Here, the electrically conductive layer 6 and the magnetic layer 5 can be expected not only to have a planar shape but also to have an electromagnetic effect not only on the entire surface of the chip but also on a noise or a mesh below the wavelength of noise. It may be only on active elements sensitive to. Further, when it is arranged around the chip, the effect of reducing the mechanical strain due to the difference in thermal expansion between the mold material and silicon can be expected.

[0021]

As described above, according to the present invention, since the magnetic material shields the surface of the semiconductor chip electromagnetically, the electromagnetic noise from the surface of the semiconductor chip is not emitted to the outside. Further, the semiconductor chip has an effect of preventing malfunction and destruction of the semiconductor chip due to external noise.

[Brief description of drawings]

FIG. 1 is a sectional view of a chip of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a chip cross-sectional view of a semiconductor device which is another embodiment of the present invention.

FIG. 3 is a chip cross-sectional view of a semiconductor device which is still another embodiment of the present invention.

FIG. 4 is a chip cross-sectional view of a semiconductor device which is still another embodiment of the present invention.

FIG. 5 is a chip cross-sectional view of a semiconductor device which is still another embodiment of the present invention.

6 is a simplified cross-sectional view of a chip of the semiconductor device of FIG. 7 in a conventional example.

FIG. 7 is a chip cross-sectional view of a semiconductor device in a conventional example.

[Explanation of symbols]

1 is a metal wiring layer. 2 is a bonding pad section. 3 is an electrically insulating layer. 4 is another electrically insulating layer. 5 is a magnetic layer. 6 is an electrically conductive layer different from the metal wiring layer 1. 7 is an electrically insulating layer. 31 is the other region below the electrically insulating layer 3 and 21 is the electrically conductive layer 6 and the external electrode 22 is the same as the bonding pad section 2 is the electrically conductive layer 6 when the magnetic layer 5 is electrically conductive. External electrode

Claims (4)

[Claims] 1. A semiconductor device having a single layer or a plurality of metal wiring layers for connecting active elements, wherein a magnetic layer is disposed above the metal wiring layers with an electrically insulating layer interposed between the metal wiring layers and the metal wiring layers. A semiconductor device, wherein different electrically conductive layers are present adjacent to the magnetic layer. 2. A semiconductor device, wherein the electrically conductive layer according to claim 1 is connected to a power supply wiring of the semiconductor device. 3. A semiconductor device, wherein the electrically conductive layer according to claim 2 has a lead-out terminal independent of a power supply terminal of the semiconductor device. 4. A method of manufacturing a semiconductor device having a single layer or a plurality of metal wiring layers for connecting active elements, wherein a magnetic layer is formed above the metal wiring layers with an electrically insulating layer interposed therebetween. A step of forming an electrically conductive layer different from the metal wiring layer adjacent to the magnetic layer, the electrically conductive layer being formed by coating, sputtering or vapor deposition. .