JP2991168B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a packaged or modular semiconductor device used for a microwave / millimeter wave communication device and the like, and a method of manufacturing the device.

[0002]

2. Description of the Related Art FIG. 7 is a perspective view of a conventional semiconductor device.

[0003] Microwave and millimeter wave band communication devices and the like include:
A packaged or modularized semiconductor device is used. Conventionally, in such a semiconductor device, FIG.
As shown in FIG. 2, an individual transistor and a microwave monolithic integrated circuit (hereinafter referred to as MMIC) chip 2 are connected to a metal or ceramic package 75 having microwave / millimeter wave input / output lead terminals 71 and 72 and bias lead terminals 73 and 74. Mounted inside, connected to these terminals by bonding, covered with a cap 76 and sealed.

[0004]

However, in such a method, the package is expensive and the assembling process is complicated, which is disadvantageous for mass production, low cost, and ultra miniaturization. Furthermore, in order to assemble the MMIC or the like after forming it into a chip, these steps are performed after the semiconductor substrate of the MMIC is thinned.
SUMMARY OF THE INVENTION The present invention provides a packaged or modularized semiconductor device and a method of manufacturing the same, which solve the above-mentioned drawbacks in the prior art.

[0005]

According to the present invention, there is provided a semiconductor device comprising:
Individual transistors on a semiconductor substrate, an insulating wall surrounding an active region of a semiconductor device such as an MMIC is provided, and a cover substrate is mounted on the upper surface of the insulating wall, and the semiconductor device is packaged or modularized. It is a semiconductor device.

In the semiconductor device of the present invention, it is preferable that the cover substrate is a Si substrate, the cover substrate is a ceramic substrate, or the cover substrate is a metal plate.

Preferably, a metallized or conductive cover substrate and a metallization on an insulator wall are used to ground the cover substrate, and the input / output electrodes are formed by beam leads. It is also preferable that bumps are formed on the input / output electrodes.

The method of manufacturing a semiconductor device according to the present invention includes: a) a step of forming a semiconductor device such as a transistor or an MMIC on the surface of a semiconductor wafer; b) forming a wall surrounding an active region of the device with an insulator such as a resin. C) a step of bonding a cover substrate to the upper surface of the wall; d) a step of thinning the semiconductor substrate, forming a via hole connecting the front electrode and the back surface, forming a back metal film, and the like; and e) the semiconductor substrate. And a step of cutting a cover substrate and separating each semiconductor device.

[0009]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1A is a perspective view of an embodiment of a semiconductor device according to the present invention, and FIG. 1B is a vertical sectional view passing right and left through a central portion of FIG.

In this embodiment, the FE which is an individual transistor is used.
T (field-effect transistor) is packaged. In FIG. 7A, the center of the cover is omitted for convenience so that the inside can be seen. In the present embodiment, the FET chip 1 is formed on a semiconductor substrate 11 in FIG. 1, and a ground back metal film 12, a gate (input) terminal 13, a drain (output) terminal 14, a source (ground) terminal 15, Insulator wall 16 and cover substrate 17 are shown. An insulator wall 16 is formed around the body portion of the FET, that is, the active area, and a cover substrate 17 is mounted thereon. Therefore, the body portion of the FET, that is, the active region is sealed, and is packaged at a chip level.

FIG. 2 is a perspective view of a second embodiment, in which the technique of the present invention is applied to an MMIC. FIGS. 3 (a) to 3 (e) show the production of this embodiment. It is a vertical sectional view which passes a center part right and left, and shows a method in order of a process.

As shown in FIG. 2, the MMIC chip 2 in this case uses a microstrip line as a transmission line or a matching circuit. A gold-plated heat radiation layer 21 also serving as a back surface ground layer, an input terminal 22, an output terminal 23, a ground terminal 24 connected to the gold plating heat radiation layer by a via hole, and bias terminals 25 and 26 are shown. Here, the configuration of the input / output terminals 22 and 23 is such that characteristics can be measured with an RF prober. Similarly to the first embodiment, an insulator wall 16 is formed around the active area of the MMIC 2, and a cover substrate 17 is mounted and sealed thereon. Therefore. When the MMIC is a transmission or reception circuit, it is in a state of being modularized at a chip level.

Each of the steps shown in FIGS.
(A) a step of forming a large number of MMICs _{2 on the} surface of a semiconductor wafer 11 ₁ ; (b) a wall 1 surrounding an active area of the MMIC 2
(C) bonding a cover substrate 17 such as a Si wafer or a ceramic substrate to the upper surface of the wall, (d) thinning the semiconductor wafer, surface electrodes And (e) a step of cutting the semiconductor substrate and the cover substrate to separate each MMIC.

As can be seen from the above embodiments, in the present invention, since it is packaged or modularized in an individual transistor or MMIC chip, it is possible to miniaturize it, and since these can be manufactured by a semiconductor wafer process. , Mass production and cost reduction are possible. Further, in a state where a cover substrate such as an Si wafer or an alumina substrate is bonded, that is, using the cover substrate as a support plate, a back surface process such as thinning of a semiconductor wafer, formation of a via hole, formation of a gold plating heat radiation layer, and chip formation can be performed. Handling of wafers and chips is easy. Where S
If an i-wafer is used, the semiconductor wafer process is completely performed, so that mass production and high yield can be expected.

FIG. 4 is a perspective view of the third embodiment in a state immediately before the cover substrate is mounted.

In this embodiment, the cover substrate is connected to a ground electrode 41 provided on the MMIC 2 by a via hole 42 in the wall 16 in order to provide an electric shield by the cover substrate and the wall 16 surrounding the active area. . Here, in this example, the grounding metal film 43 is provided on the cover substrate, but the metal plate itself may be used for better shielding. Here, the input / output terminals 22 and 23
Uses an Au thick plating layer and is a beam lead type to facilitate connection to an external circuit.

FIG. 5 is a perspective view of the fourth embodiment just before the cover substrate is mounted.

In this embodiment, the cover substrate is connected by a surface metallization 51 (at the wall 16) to a ground electrode 41 provided on the MMIC 2 to provide electrical shielding by the cover substrate and the wall 16 surrounding the active area. ing. Here, in this example, the conductive low-resistance Si substrate 52 is used as the cover substrate, but the metal plate itself may be used for better shielding. Here, in the case of this example, a coplanar line is used as the line type of the MMIC, and the ground electrode 41 is widely used to facilitate grounding of the cover substrate.

FIG. 6 is a vertical sectional view similar to FIG. 1B of the MMIC of the fifth embodiment.

Here, input / output electrodes 62 and 63 and a bias electrode (not shown) are formed on the back side of the substrate of the MMIC 2 by via holes 61 in the semiconductor substrate. Further, bumps 64 and 65 are provided so that connection with an external circuit and mounting are easy and high reliability is provided. With this configuration, the entire wall 16 surrounding the active area can be metallized,
Electric shield is good. In addition, when the above-described step of FIG. 3 is applied, the semiconductor substrate 11 and the cover substrate 17 can be cut at the same time, so that the MMICs 2 can be easily separated.

An embodiment with specific dimensions will be described below.

The first embodiment (FIG. 1) corresponds to the first embodiment, in which a low-noise FET formed on a GaAs substrate 11 is surrounded by a polyimide 50 μm wide and 50 μm high. Surrounded by wall 16. It is covered with an alumina substrate 17 having a thickness of 250 μm. The GaAs substrate 11
Has a thickness of 150 μm, and an Au layer 12 for grounding and mounting is formed on the back surface. Therefore, the active authority is sealed and a packaged state can be realized.

The second embodiment (FIG. 2) corresponds to the second embodiment, in which an AlG
A base band signal input terminal 2 of a transmission MMIC chip 2 comprising a voltage controlled oscillator for FM modulation and an output amplifier using an aAs / InGaAs heterojunction FET as an active element.
2. The inside of the RF output terminal 23 and the bias terminals 25 and 26 is surrounded by an amorphous carbon fluoride wall having a width of 80 μm and a height of 100 μm. On top of that, a 300 μm thick Si substrate 17
Cover with. The thickness of the GaAs substrate 11 is 50 μm.
Thus, an Au plating layer for grounding and heat radiation is formed on the back surface. Thereby, a very small transmission module is realized.

The third embodiment (FIG. 3) is similar to the second embodiment.
It corresponds to the manufacturing process of the embodiment and has a thickness of 660 μm.
epitaxial growth of active layer on m-type GaAs substrate 11
Wafer 11₁ The surface process of MMIC2 using
U. Wafer 11₁ 100μ by CVD over the entire surface
m thick amorphous carbon fluoride film and 0.5 μm thick
Sano SiO_Two Form a film. Surrounds the active area of MMIC2
80 μm wide SiO _Two Form the pattern of the film and
O on the mask_Two Fluorination by plasma etching
The insulating film 16 is formed by etching the carbon film.
Next, a 300 μm thick Si substrate 17 is bonded thereon.
You. Next, a GaAs substrate is used as the Si substrate 17 as a support plate.
11 is polished to a thickness of 50 μm to form a via hole for grounding.
Au plating layer 2 for grounding and heat dissipation
Form one. Next, the Si substrate 17 and the GaAs base
If the board 11 is cut, the modularized MMIC 2
Complete.

The fourth embodiment (FIG. 4) corresponds to the third embodiment, and has a width 80 surrounding the active region of the MMIC 2.
A large number of via holes having a diameter of 20 μm are provided in the insulator wall 16 of an amorphous carbon fluoride film having a thickness of 30 μm and a height of 30 μm, and the ground electrode 41 of the MMIC 2 is connected to the Si cover substrate 17 by metallizing Au. Here, Si cover substrate 1
7, an Au layer 43 is formed. The input / output terminals 22 and 23 are formed as a beam lead type by forming a 20 μm thick Au plating layer on the GaAs substrate 11. In this manufacturing process, in the third embodiment (FIG. 3), when the insulator wall 16 of the amorphous carbon fluoride film is formed by O ₂ plasma etching using a SiO ₂ film mask, the opening of the via hole is formed. If the pattern is formed on the SiO ₂ film mask, a via hole can be formed at the same time, and then the via hole and the upper surface of the insulator wall 16 may be metallized.

The fifth embodiment (FIG. 5) corresponds to the fourth embodiment, and has a width 8 surrounding the active region of the MMIC 2.
An Au film is provided on the upper and side surfaces of the insulator wall of the amorphous carbon fluoride film having a thickness of 0 μm and a height of 30 μm other than the lead-out portions of the input / output electrodes and the bias electrodes. .01 Ωcm n-type low resistance S
An electric shield is obtained using i.

The sixth embodiment (FIG. 6) corresponds to the fifth embodiment. An amorphous carbon fluoride film having a width of 80 .mu.m and a height of 30 .mu.m is formed on the outside of the surface electrode of the MMIC 2 by metallization. Of the input / output electrode 6
GaAs having a thickness of 40 .mu.m
It is provided on the back side of the substrate 11 and is connected to the line on the front side by a via hole having a diameter of 30 μm. Further, each electrode 62 on the back surface,
63 has a height of 40 μm and a diameter of 50 μm by Au plating.
m bumps 64 and 65 are provided.

[0029]

As described above, according to the present invention, individual transistors and MMICs can be formed in a chip by using a semiconductor wafer process by providing an insulator wall surrounding the active region of the semiconductor device and a structure for providing these covers. Ultra-small, low-cost packaged or modularized semiconductor devices can be mass-produced.
This has the effect of providing a semiconductor device and a method of manufacturing the same that greatly contribute to mass production and cost reduction of the millimeter wave communication device.

[Brief description of the drawings]

FIG. 1A is a perspective view of an embodiment of a semiconductor device according to the present invention, and FIG. 1B is a vertical sectional view passing right and left through a central portion of FIG.

FIG. 2 is a second embodiment example, in which the technique of the present invention is applied to M
It is a perspective view at the time of applying to MIC.

FIGS. 3A to 3E are vertical cross-sectional views showing a manufacturing method according to a second embodiment in the order of steps and passing right and left through a central portion.

FIG. 4 is a perspective view of a state immediately before a cover substrate is mounted according to a third embodiment.

FIG. 5 is a perspective view of a state immediately before a cover substrate is mounted according to a fourth embodiment.

FIG. 6 is a vertical sectional view similar to FIG. 1B, showing an MMIC according to a fifth embodiment;

FIG. 7 is a perspective view of a conventional semiconductor device.

[Explanation of symbols]

Reference Signs List 1 FET chip 2 MMIC chip 11 Semiconductor substrate 11 ₁ Semiconductor wafer 12 Backside metal film 13 Gate (input) terminal 14 Drain (output) terminal 15 Source (ground) terminal 16 Insulator wall 17 Cover substrate 21 Gold-plated heat radiation layer 22 Input terminal 23 Output terminal 24 Ground terminal 25, 26 Bias terminal 41 Ground electrode 42 Via hole 43 Ground metal film 51 Metallize 52 Low resistance Si cover substrate 61 Via hole in semiconductor substrate 62 Input electrode 63 Output electrode 64, 65 Bambu 71 Input lead terminal 72 Output Lead terminal 73, 74 Bias lead terminal 75 Package 76 Cap 77 Metal base

Claims (9)

(57) [Claims] An insulator wall surrounding an active region of a semiconductor device such as an individual transistor or a microwave monolithic integrated circuit on a semiconductor substrate, and a cover substrate is mounted on an upper surface of the insulator wall. A semiconductor device, wherein the semiconductor device is packaged or modularized. 2. The semiconductor device according to claim 1, wherein the cover substrate is a Si substrate. 3. The semiconductor device according to claim 1, wherein the cover substrate is a ceramic substrate. 4. The semiconductor device according to claim 1, wherein the cover substrate is a metal plate. 5. The semiconductor device according to claim 1, wherein a metallized or conductive cover substrate and metallization on an insulator wall are used to ground the cover substrate. 6. The semiconductor device according to claim 1, wherein the input / output electrode is a beam lead. 7. The semiconductor device according to claim 1, wherein a bump is formed on the input / output electrode. 8. The semiconductor device according to claim 1, wherein the input / output electrode is provided on a back surface of the semiconductor substrate. 9. A method of manufacturing a semiconductor device, comprising: a) a step of forming a semiconductor device such as a transistor or a microwave monolithic integrated circuit on a surface of a semiconductor wafer; b) a wall surrounding an active region of the device with an insulator such as a resin. C) a step of bonding a cover substrate to the upper surface of the wall, d) a step of thinning the semiconductor substrate, forming a via hole connecting the front electrode and the back surface, forming a back metal film, and e). A method for manufacturing a packaged or modularized semiconductor device, comprising a step of cutting a semiconductor substrate and a cover substrate at predetermined positions and separating the cut semiconductor devices.