JP2986391B2 - High frequency semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency semiconductor device having an active semiconductor element such as a transistor and a passive element formed of an inductor or a transmission line on the same semiconductor substrate.

[0002]

2. Description of the Related Art Conventionally, an IC (hereinafter, referred to as an IC) comprising an active semiconductor element such as a transistor and an impedance matching circuit formed of passive elements such as a spiral inductor, a transmission line, and a capacitor on the same semiconductor substrate. ,
MMIC: Microwave MonolithicIC)
It is used in high-frequency devices such as mobile phones that operate at frequencies of up to 2 GHz. In these MMICs, since an active semiconductor element and an impedance matching circuit are formed on the same semiconductor substrate, it is expected that suppression of variations in the high-frequency characteristics of the entire MMIC, improvement of the yield, and downsizing of the high-frequency device will be expected.

On the other hand, as a semiconductor substrate constituting an MMIC, a silicon (Si) substrate can be used, but conventionally, gallium arsenide (hereinafter, referred to as GaAs) which is a compound semiconductor is generally used.
s) is mainly used. This is because G
a semi-insulating substrate can be formed from an aAs substrate;
Since the relative dielectric constant of the aAs substrate is about 12, the wavelength is shortened when a high-frequency transmission line is formed, which is suitable for miniaturization. This wavelength shortening characteristic is specifically expressed by the following equation (1).

Λa = λo ÷ √ (ε) (1) where λo: wavelength in vacuum λa: shortened wavelength
ε: relative permittivity of the material.

As can be seen from the above equation (1), it is understood that the use of a material having a large relative dielectric constant as a material constituting the transmission line can reduce the size of the circuit due to the effect of shortening the wavelength. For this reason, in the conventionally proposed MMIC,
Utilizing the characteristic that the relative dielectric constant of a GaAs substrate is about 12, an impedance matching circuit and an active semiconductor element are formed on a chip of several mm square.

Here, a specific structure of an MMIC using a semi-insulating GaAs substrate as a conventional high-frequency semiconductor device will be described. FIGS. 10A and 10B are a plan view and a cross-sectional view taken along line Xb-Xb of a conventional MMIC. As shown in FIGS. 10A and 10B, semi-insulating Ga
On the main surface side of the As substrate 1, an active region 14 of the FET is formed by ion implantation. The active region 14 is composed of two N + regions 2 (source / drain) for lowering the contact resistance and an N- region 3 (channel region) of the intrinsic FET. Further, the source electrode 5, the gate electrode 7, and the drain electrode 6 are formed on the FET by vapor deposition, respectively. With the above configuration,
The FET operates as a transistor as an active semiconductor element. In addition, each of the electrodes 5, 7 is bonded using a bonding wire.
A source electrode pad 12 and a gate electrode pad 11 for electrically connecting the semiconductor device to a package and external terminals are formed. Further, on the main surface side of the semi-insulating GaAs substrate 1, a matching spiral inductor 8 is formed adjacent to the FET. One end of the spiral inductor 8 is connected to the drain electrode 6, and the other end is connected to the electrode of the output electrode pad 13. Further, a part of the spiral inductor 8 is in a state of straddling the output electrode pad 13 with the insulating layer interposed therebetween in the overlapping region Rovlp.
Further, a ground metal 10 is provided on the back surface of the semi-insulating semi-insulating GaAs substrate 1 so that the semi-insulating GaAs substrate 1 functions as a high dielectric film for the matching spiral inductor 8. .

In the case of a general MMIC, the source electrode pad 12 is grounded via a bonding wire, an input signal is applied to the gate electrode pad 11 via a bonding wire, and the output electrode pad 13 is supplied via a bonding wire. The amplified signal is extracted to the outside. In this case, the matching spiral inductor 8 is F
The function of converting the impedance of the drain, which is the output of the ET, into a predetermined impedance and matching it, preventing reflection of high-frequency signals and efficiently extracting high-frequency power to the outside is achieved.

In some cases, a transmission line is provided instead of the matching spiral inductor 8.

[0009]

However, FIG.
The structure of the conventional MMIC shown in (1) has the following problems. For example, when the operating frequency of the device is 1 GHz, the wavelength in vacuum corresponding to the frequency is about 300 mm. Assuming that the relative dielectric constant of the GaAs semiconductor substrate is 12, the GaAs semiconductor substrate can be obtained by the above equation (1). Is about 87 mm. 1/4 for high frequency signals
Since the short circuit and the open circuit occur alternately in the cycle of the wavelength, the phase rotation is usually used within a quarter wavelength range. Therefore, since the shortened quarter wavelength on the GaAs semiconductor substrate is about 22 mm, it is necessary to form a transmission line or a spiral inductor having a length of 22 mm.

However, in consideration of the width of the transmission line and the size of the pad for the bonding wire, even if the entire main surface of the semiconductor chip is used as the transmission line, a GaAs semiconductor chip of about 3 mm square has a size of 22 mm. Drawing tracks is difficult. Moreover, capacitors and other semiconductor elements must be integrated on the semiconductor substrate.
Therefore, the MMIC operating in such a high frequency region
In order to form the semiconductor chip, the size of the semiconductor chip needs to be about 7 mm square. Note that by making the inductor into a spiral shape, the equivalent inductance is increased to some extent, but the same chip size is still required. In the case of using a GaAs substrate, such an increase in chip size causes a significant increase in cost and almost no industrial value.

As described above, in the conventional structure, even if the characteristic that the relative dielectric constant of the GaAs substrate is about 12 is used, or the inductance is improved as much as possible by using a spiral shape, the impedance matching circuit can be improved. If it is provided on a semiconductor substrate, the area occupied by the inductor portion on the semiconductor chip becomes very large, and there is a problem that it is difficult to reduce the size and cost of the semiconductor chip.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has a structure in which an active semiconductor element and a passive element including an inductor or a transmission line are integrally formed on a semiconductor substrate. It is an object of the present invention to provide an excellent high-frequency semiconductor device in which the phase rotation angle can be significantly increased and the size and cost of the semiconductor chip can be reduced.

[0013]

Means for Solving the Problems In order to achieve the above object, the present invention employs the measures described in claims 1 to 9 .

A first high-frequency semiconductor device according to the present invention comprises:
As described in claim 1, a semiconductor substrate, an active semiconductor element such as a transistor formed on the main surface side of the semiconductor substrate, and an inductor and a transmission line formed on the main surface side of the semiconductor substrate. And a high-dielectric film having a relative permittivity of 10 or more formed on the passive element, and a ground metal electrode formed on the high-dielectric film.

With this configuration, since the passive element is made of a material having a high relative dielectric constant, the inductance value or the phase rotation angle of the passive element can be significantly increased, and the semiconductor chip can be reduced in size and cost. Reduction is possible.

According to a second aspect of the present invention, in the high frequency semiconductor device according to the first aspect, a package having at least a terminal and a ground electrode for mounting the semiconductor substrate with its main surface side up. And the corresponding terminals of each of the electrode pads on the semiconductor substrate and the package are connected by bonding wires,
The ground metal electrode and the ground electrode of the package may be connected to each other by a bonding wire.

According to this structure, a high dielectric film having a high relative dielectric constant can be formed thickly, so that the destruction of the semiconductor substrate due to the impact during wire bonding can be prevented.
The semiconductor substrate can be housed in a package.

According to a third aspect of the present invention, in the high frequency semiconductor device of the first aspect, a package is further provided for mounting the semiconductor substrate on which the above-described members are formed with the main surface thereof down. The ground metal electrode on the semiconductor substrate also functions as a bump, and each of the electrode pads and the corresponding terminal of the package are directly connected via a bump, and the ground metal electrode and the ground of the package are connected. The electrode may be directly connected by the bump.

According to this configuration, since each terminal on the semiconductor substrate and the terminal on the package are directly connected via the bump, the gain of the high-frequency signal is improved, and the change in impedance is suppressed. Further, since the ground metal electrode on the semiconductor substrate functions as a bump and is connected to the ground metal on the package, the ground potential and high-frequency characteristics are stabilized. In addition, since the change in the high-frequency characteristics at the time of accommodation in the package is smaller than that in the case of wire bonding, it is possible to obtain the high-frequency characteristics as designed.

A second high-frequency semiconductor device according to the present invention comprises:
As described in claim 4, a semiconductor substrate, an active semiconductor element such as a transistor formed on the main surface side of the semiconductor substrate, and an inductor and a transmission line formed on the main surface side of the semiconductor substrate. A plurality of passive elements formed of any one of the above, a plurality of high dielectric films each having a relative dielectric constant of 10 or more formed and separated on each of the passive elements, and formed on each of the high dielectric films, respectively. And a plurality of grounded metal electrodes separated from each other.

According to this configuration, since the plurality of high dielectric films and the laminated film of the ground metal electrode are separated from each other, the input side impedance matching circuit composed of a spiral inductor or a transmission line is connected to the output side impedance matching circuit. It can be formed separately. Therefore, it is possible to reliably prevent the oscillation and the decrease in the isolation caused by the coupling between the input and output generated in the high-frequency semiconductor device in which the ground metal for the high dielectric film is formed on the back surface of the conventional compound semiconductor substrate or the like. it can.

According to a fifth aspect of the present invention, in the high frequency semiconductor device of the fourth aspect, it is preferable that each of the high dielectric films is made of a material having a different dielectric constant from each other.

With this configuration, the relative permittivity of the high dielectric film can be selected according to the characteristics of the circuit on the semiconductor substrate, and the degree of freedom in designing a high-frequency semiconductor device is greatly improved.
For example, a high dielectric film with a relative dielectric constant of about 20 is attached to an inductor that requires matching to low impedance and requires high precision, and a relative dielectric constant is used for an inductor of a matching circuit that requires only a large phase rotation angle. It can be selectively used such that a high dielectric film having a rate of about 100 is additionally provided. Therefore, miniaturization and high accuracy of the high-frequency semiconductor device can be realized at the same time.

As described in claim 6 , claim 1 or claim 2
In the high-frequency semiconductor device of 4 , the thickness of the ground metal electrode can be formed so as to be larger as the operating frequency is lower.

With this configuration, an appropriate thickness of the ground metal electrode according to the frequency used can be secured by utilizing the skin effect that the high-frequency signal flows only in the region near the surface of the conductor.

As described in claim 7 , claim 1 or 2
In the high-frequency semiconductor device of 4 , when the semiconductor substrate is a compound semiconductor substrate, it is preferable that the high dielectric film is made of a material having a relative dielectric constant of 20 or more.

With this configuration, the area occupied by passive elements such as inductors is significantly larger than that of a conventional high-frequency semiconductor device using a semi-insulating GaAs substrate or the like having a relative dielectric constant of about 12 as a high dielectric film. The effects of each claim, such as reduction and improvement of high frequency characteristics, can be effectively obtained.

As described in claim 8 , claim 1 or 2
In the high frequency semiconductor device described in 4 , the high dielectric film is preferably made of strontium titanate (SrTiO3).

With this configuration, the effects of the respective claims can be remarkably obtained by utilizing the characteristic of strontium titanate that the relative dielectric constant is high and the relative dielectric constant can be adjusted depending on the deposition conditions.

[0030] As described in claim 9 , claim 1 or
Is a high frequency semiconductor device according to 5 , wherein the semiconductor substrate is
It can be made of silicon single crystal.

According to this configuration, while using an inexpensive silicon substrate, reduction of the occupied area and improvement of high-frequency characteristics by an inductor having a high wavelength shortening effect can be realized.

[0032]

BEST MODE FOR CARRYING OUT THE INVENTION

First Embodiment FIG. 1A shows a semi-insulating GaAs according to a first embodiment.
FIG. 1B is a plan view of an MMIC using a substrate, and FIG.
FIG. 2 is a sectional view taken along the line Ib-Ib shown in FIG.
It is a plane perspective view in the II-II line shown to (b). In the present embodiment, a basic configuration of the present invention will be described.

The MMIC according to the present embodiment includes an FET, which is an active semiconductor element, and an impedance matching circuit connected to a drain, which is an output of the FET. FIG.
As shown in FIGS. 2A and 2B and FIG.
An FET and a matching spiral inductor 8 are formed on the main surface side of the s substrate 1. The structure of the FET is the FE of the conventional MMIC shown in FIGS. 10A and 10B.
Since the structure is the same as that of T, the same reference numerals as those in FIGS. 10A and 10B are assigned and the description is omitted.

On the other hand, as a feature of this embodiment, a high dielectric film 9 and a high dielectric film ground electrode 10 are sequentially formed on the spiral inductor 8. That is, the matching spiral inductor 8 is located below the high dielectric film ground electrode 10 and the high dielectric film 9 shown by a virtual line in FIG. This matching spiral inductor 8
Is connected to the output electrode pad 13 at the tip after straddling the output electrode pad 13 via the insulating film in the overlap region Rovlp. A high dielectric film 9 and a high dielectric film ground metal 10 are continuously formed on substantially the entire surface of the matching spiral inductor 8.

Here, the ground metal 10 for a high dielectric film can be easily formed to a thickness of 1 μm to 2 μm by a commonly used method such as gold plating, and a thickness of 5 μm or more is possible. Therefore, the ground potential does not become unstable due to the problem of the high-frequency resistance component. In particular, the thickness of the high-dielectric-film grounding metal 10 can be changed in accordance with the operating frequency in consideration of the skin effect that a current relating to a high-frequency signal flows only near the surface of the conductor. The thickness of the area near the surface where the current related to the high-frequency signal flows due to the skin effect (skin
depth) δ is given by the following equation (2) δ = √ (2 / (ω · μ · σ)) (2) (where ω = 2πf (f is a frequency value), μ is magnetic permeability,
σ is the electrical conductivity. ). Table 1 below shows the skin effect thickness δ calculated from the above equation (2) for each frequency value, particularly when the ground metal 10 for a high dielectric film is made of gold (Au).

[0036]

[Table 1]

Since the step of forming the grounding metal 10 for a high dielectric film is close to the final step in the manufacturing process of the semiconductor device, it is not necessary to consider the influence of steps, and it is easy to form it by gold plating or the like. Can be.

The high dielectric film 9 is made of strontium titanate (SrTiO 3), of which the relative dielectric constant is about 20 to 300. The relative dielectric constant of strontium titanate (SrTiO3) is 20 to 3 depending on the deposition conditions for sputtering this material, specifically, the substrate heating temperature or the annealing temperature after sputtering.
Up to 00 can be changed with good controllability. For example, by depositing a high dielectric film 9 having a relative dielectric constant of 100 on the spiral inductor 8 for matching, the shortened wavelength becomes
As shown in FIG. 10, semi-insulating Ga having a relative dielectric constant of 12
The wavelength is reduced to about one-third compared with the wavelength shortened when only the spiral inductor is formed on the As substrate 1.
That is, if the line lengths of the spiral inductors in both structures are the same, the structure of the present embodiment can triple the phase rotation angle as compared with the conventional structure. Conversely, to obtain the same phase rotation angle, the line length can be reduced to one third by using the first embodiment shown in FIG. Therefore, by adopting the structure of the present embodiment,
The area of a passive element formed of a spiral inductor or a transmission line can be greatly reduced in the range of one third to one ninth of the conventional device, and the semiconductor chip can be reduced in size and cost.

In this embodiment, a similar effect can be obtained even if a transmission line is provided instead of the spiral inductor.

Second Embodiment Next, a second embodiment will be described. In the present embodiment, an example in which terminals between an MMIC having a basic configuration of the present invention and a package are connected by wire bonding will be described. FIG. 3A illustrates an MM according to the present embodiment.
FIG. 3 is a plan view showing a state in which an IC is mounted on a package, and FIG.
FIG. 3B is a cross-sectional view taken along the line IIIb-IIIb of FIG. However, the structure of the semiconductor chip shown in FIGS. 3A and 3B is the same as that of the semiconductor chip shown in FIG.
This is the same as the structure shown in FIGS.

As shown in FIGS. 3A and 3B, the package substrate 23 is provided with a package ground metal 22 and a source terminal 15 connected to the package ground electrode 22. Gate terminal 1 as terminal
6 and an output terminal 17 are provided. The semiconductor chip is fixed to the package ground electrode 22 using solder or resin with its main surface side facing up.

Here, the source electrode pad 12 on the semiconductor chip side and the source terminal 15 on the package side are connected via the source wire 18, and the gate electrode pad 11 on the semiconductor chip side and the gate terminal 16 on the package side are connected to the input wire 19. , The output electrode pad 13 on the semiconductor chip side and the output terminal 17 on the package side are connected via the output wire 20, and the ground metal 10 for the high dielectric film on the semiconductor chip side and the package ground metal 22 are connected to the ground wire 21. Through
Each is connected.

In the present embodiment, with such a structure, the spiral inductor 8 is formed by using the high dielectric film 9.
A semiconductor chip having a significantly reduced passive element area can be mounted on a package, and since the semiconductor chip is mounted on the package, soldering to a printed circuit board can be performed very easily. Also, the high dielectric film 9
Since the upper ground metal electrode 10 can be formed to have a thickness of 5 μm or more as described above, it is possible to reliably prevent the semiconductor chip from being damaged by an impact when connecting a bonding wire.

In this embodiment, a similar effect can be obtained even if a transmission line is provided instead of the spiral inductor.

The package used in this embodiment may be either a ceramic package or a resin-sealed package.

Third Embodiment Next, a third embodiment will be described. In the present embodiment, an example in which terminals between the MMIC having the basic configuration of the present invention and a package are connected by bumps will be described. FIG. 4A is a plan view showing a state in which the MMIC according to the present embodiment is mounted on a package, and FIG.
It is sectional drawing in the IVb-IVb line of (a). However,
The structure of the semiconductor chip shown in FIGS. 4A and 4B is basically different from the structure shown in FIGS. 1A, 1B and 2 described in the first embodiment, although the pad positions are different. Is the same.

Here, in the present embodiment, FIG.
As shown in (b), several μm is applied to the electrode pad on the MMIC side.
The protrusion-like bumps made of gold plating of m or more are formed. That is, the source bump 27 is formed on the source electrode pad 12, the gate bump 28 is formed on the gate electrode pad (not shown), and the output bump is formed on the output electrode pad (not shown) connected to the spiral inductor 8 for matching. 29 are provided respectively. Here, as a feature of the present embodiment, the high dielectric film ground electrode 10 located above the matching spiral inductor 8 is formed to be thick, and the ground electrode 10 itself functions as a bump.

On the other hand, a ceramic substrate 30 functioning as a support substrate for a semiconductor chip is provided on the package side. On the surface of the ceramic substrate 30, a source terminal 24, a gate terminal 25, and an output terminal 26 functioning as a package-side ground metal are provided at positions corresponding to the respective bump positions of the MMIC on the semiconductor chip side. Is provided. The source electrode pad 12, the gate electrode pad, and the output electrode pad on the semiconductor chip side are:
The source terminal 24, the gate terminal 25, and the output terminal 26 on the ceramic substrate are connected via the bumps 27, 28, 29, respectively. On the other hand, the ground electrode 10 for a high dielectric film on the semiconductor chip itself is a bump, and is directly connected to the source terminal 24 on the ceramic substrate and grounded.

As in the present embodiment, by employing the configuration shown in FIG. 4, each electrode of the semiconductor chip and the ground electrode 10 for the high dielectric film can be directly connected to each electrode of the support substrate without a bonding wire. Therefore, since no inductance is connected to the source of the FET, the gain is improved. In addition, since the high dielectric film ground metal 10 provided on the spiral inductor 8 via the high dielectric film 9 is directly connected to the package-side ground metal (source terminal 24),
The ground potential is more stable. In addition, there is no particular limitation on the location of the spiral inductor 8 on the GaAs substrate 1, and the ground metal 10 can be stably grounded regardless of the layout. Further, since the ground potential is extremely stable and the ground metal 10 formed on the high dielectric film 9 can be formed thick, for example,
An MMIC that can operate at a high frequency of about 0 GHz can be configured. As described above, in the present embodiment, it is possible to improve the gain of the high-frequency signal, eliminate the change in impedance due to the inductance of the bonding wire, and stabilize the ground potential and the characteristics. The remarkable effect can be exhibited.

In this embodiment, a similar effect can be obtained even if a transmission line is provided instead of the spiral inductor.

(Fourth Embodiment) Next, a fourth embodiment will be described. FIG. 5 (a)
FIG. 5B is a plan view of an MMIC using a semi-insulating GaAs substrate according to the fourth embodiment, and FIG. 5B is Vb-Vb of FIG.
6 is a cross-sectional view taken along line VI-VI of FIG. 5B. In the present embodiment, an MMIC with an input / output impedance matching circuit in which an impedance matching circuit is connected to a gate on the input side of the FET and a drain side on the output side of the FET will be described.

As shown in FIGS. 5A, 5B and 6, on the main surface side of the semi-insulating GaAs substrate 1, an FET and first and second matching spiral inductors 8a and 8b are formed. Have been. First matching spiral inductor 8
A first high-dielectric film 9a made of strontium titanate and a first high-dielectric film ground electrode 10a are sequentially stacked on top of the second matching spiral inductor 8b. The second high dielectric film 9b and the second high dielectric film ground electrode 10b are sequentially laminated, and both laminated films are formed separately on the semiconductor chip. The first matching spiral inductor 8a matches the impedance of the output signal, and the second matching spiral inductor 8b matches the impedance of the input signal.

In this embodiment, as shown in FIGS. 5A, 5B and 6, an active element (FE) is provided on a semiconductor chip.
The matching spiral inductors 8a and 8b are provided on the input side and the output side of T), respectively. The high-dielectric films 9a and 9b and the high-dielectric Body film grounding electrodes 10a, 10
b are laminated. Therefore, similarly to the first embodiment, the area of the passive element can be greatly reduced, and the high dielectric films 9a and 9b and the high dielectric film ground electrodes 10a and 10b of the input / output impedance matching circuit can be reduced.
Are separated from each other, so that the separation (isolation) between the input signal and the output signal is improved, and therefore, there is an advantage that no oscillation of the high frequency signal is caused and oscillation can be prevented.

In this embodiment, the same effect can be obtained even if a transmission line is provided instead of the spiral inductor.

Fifth Embodiment Next, a fifth embodiment will be described. The shape structure of the MMIC according to the present embodiment corresponds to the MMI shown in FIGS. 5A, 5B and 6 described in the fourth embodiment.
It has the same structure as C. However, the MM according to the present embodiment
In the IC, the relative dielectric constants of the first high dielectric film 9a and the second high dielectric film 10a are not the same. For example, the first high dielectric film 9a of the output impedance matching circuit is deposited first, and then the input impedance matching is performed. By depositing the second high dielectric film 9b of the circuit under different conditions, two high dielectric films 9a and 9b having different relative dielectric constants are formed on the same semiconductor chip.

In the present embodiment, by forming the spiral inductors 10a and 10b under the high dielectric films 9a and 9b having different relative dielectric constants as described above, for example, matching to low impedance is required and accuracy is improved. Is necessary for the part where the relative permittivity is about 20. For the matching part where only the phase rotation angle or the inductance component is large such as the quarter wavelength choke circuit of the bias part, the relative permittivity is required. Approximately one hundred can be used properly, and both miniaturization and high accuracy can be achieved. Also, the degree of freedom in design can be greatly improved. However, in the present embodiment, a similar effect can be exerted even if a transmission line is provided instead of the spiral inductor.

Sixth Embodiment Next, a sixth embodiment will be described. In the present embodiment, a structure in which a ground electrode for a high dielectric film, a high dielectric film, and a spiral inductor are sequentially stacked on a GaAs substrate will be described. FIG. 7A is a plan view of an MMIC using a semi-insulating GaAs substrate according to the sixth embodiment.
FIG. 8B is a cross-sectional view taken along line IIXb-IIXb in FIG. The MMIC according to the present embodiment has a structure with an input / output matching circuit in which an impedance matching circuit is connected to a gate on the input side and a drain on the output side of an FET which is an active semiconductor element.

As shown in FIGS. 7A and 7B, an FET is formed on the main surface of the semi-insulating GaAs substrate 1, and the FE is formed.
On the semi-insulating GaAs substrate 1 adjacent to the drain side of T, the first high dielectric film ground electrode 10a
High dielectric film 9a composed of strontium titanate and strontium
And a first matching spiral inductor 8a are sequentially laminated, and a second high dielectric film ground electrode 10b, a second high dielectric film 9b, and a second high dielectric film 9b are formed on the GaAs substrate 1 adjacent to the source side of the FET. Two matching spiral inductors 8b are sequentially stacked.

That is, the first spiral inductor 8
As in the fourth embodiment, a is connected to the drain of the FET to form an output impedance matching circuit, and the second spiral inductor 8b is connected to the gate of the FET to form an input impedance matching circuit. However, in the present embodiment, the grounding metals 10a and 10b for the high dielectric film are formed on the GaAs substrate 1 with the insulating film 4 interposed therebetween.
The fourth embodiment differs from the fourth embodiment in that high dielectric films 9a and 9b and spiral inductors 8a and 8b are deposited thereon. A part of the ground electrodes 10a and 10b for the first and second high dielectric films is formed so as to protrude outside the first and second high dielectric films 9a and 9b, respectively. The structure makes it easy to connect to a ground electrode such as a package through a portion.

In this embodiment, since the matching spiral inductors 8a and 8b are formed later on the high dielectric films 9a and 9b, an active semiconductor element such as an FET and a spiral inductor (or a transmission circuit) are formed. And can be formed in a common step. That is, by using the high dielectric films 9a and 9b having a relative dielectric constant of 20 or more, it is possible to easily and inexpensively manufacture an MMIC that can realize improvement of high frequency characteristics and downsizing. Therefore, practical use of the MMIC that can exhibit the above-described characteristics is facilitated.

(Seventh Embodiment) Next, a seventh embodiment will be described. In the present embodiment, the structure of the MMIC in shape is the same as the structure shown in FIGS. 7A and 7B described in the sixth embodiment. However, in the present embodiment, the relative dielectric constants of the first high dielectric film 10a and the second high dielectric film 10b are not the same but different. As described above, by changing the deposition conditions of the high dielectric film, high dielectric films having different relative dielectric constants are formed on the same semiconductor chip, and a matching spiral inductor is formed thereon.

Therefore, in the present embodiment, similarly to the fifth embodiment, a portion that requires matching to a low impedance and requires high accuracy, and a simple configuration such as a quarter-wave choke circuit of a bias portion. In the matching part where only the phase rotation angle or the inductance component is required to be large, the relative permittivity of the high dielectric films 9a and 9b can be properly used, and both miniaturization and high precision can be achieved.

(Eighth Embodiment) Next, an eighth embodiment will be described. In the present embodiment, a structure in which the MMIC according to the sixth or seventh embodiment is housed in a package will be described. FIG.
(A) is a plan view showing a state in which an MMIC using a semi-insulating GaAs substrate having the structure of the sixth or seventh embodiment is mounted on a package, and (b) of FIG.
It is sectional drawing in the IXb line.

As shown in FIGS. 8A and 8B, the package substrate 23 is provided with a package ground metal 22 and a source terminal 15 connected to the package ground electrode 22. A terminal 16 and an output terminal 17 are provided. The semiconductor chip is fixed to the package ground electrode 22 using solder or resin with its main surface side facing up. The structure of the MMIC is as described in the sixth or seventh embodiment.

Here, the source electrode pad 12 on the semiconductor chip side and the source terminal 15 on the package side are connected via the source wire 18 to the input electrode pad 1 on the semiconductor chip side.
3b and the input terminal 16 on the package side are the input wire 1
9, the output electrode pad 13a on the semiconductor chip side and the output terminal 17 on the package side are connected to the ground metal 10a, 10b for the first and second high dielectric films on the semiconductor chip side and the package via the output wire 20. The first ground metal 22
They are connected via the second ground wires 21a and 21b, respectively. However, the ground wires 21a, 21b are provided on the portions of the first and second high dielectric film grounding metals 10a, 10b which protrude outward from the first and second high dielectric films 9a, 9b.
Is bonded.

In the present embodiment, the configuration shown in FIGS. 8A and 8B allows the high-dielectric film grounding metals 10a and 10b, the high-dielectric films 9a and 9b and the matching A semiconductor chip having a structure in which spiral inductors 8a and 8b are sequentially stacked can be easily mounted on a package. At this time, the ground metal 10 for the first and second high dielectric films is used.
Since a and 10b are bonded at portions protruding outside of the high dielectric films 9a and 9b, destruction of the semiconductor chip due to impact when connecting the bonding wires does not pose a problem. Further, since the semiconductor chip is mounted on the package in this manner, it is possible to make the soldering to the printed board very easy.

(Ninth Embodiment) Next, a ninth embodiment will be described. In the present embodiment, a case will be described in which the input circuit, the output circuit, and the bias circuit are provided with impedance matching circuits each having an inductor, and the relative permittivity of each inductor is different.

FIGS. 9A and 9B show three inductances L1 and L in an input circuit, an output circuit and a bypass circuit.
FIGS. 2A and 2B are Smith chart diagrams and circuit diagrams showing the behavior of impedance in the case where L2 and L3 and capacitors C1, C2 and C0 are provided. FIGS. 9A and 9B, the impedance of the gate terminal of the FET is indicated by a point A, and the input inductor L1 and the input capacitance C1 can be matched so that the input impedance is 50Ω. Similarly, the impedance of the drain terminal of the FET is indicated by a point B, and matching can be achieved by the output inductor L2 and the output capacitance C2 so that the output impedance is 50Ω. The DC bias line of the drain is set so that the impedance of the high-frequency signal from the point B toward the DC bias line becomes infinite by connecting one end of the choke inductor L3 to the bypass capacitor C0 having a capacitance of several thousand pF. And the high frequency power is DC
It is configured to prevent leakage to the bias line. As shown in FIG. 7A, the movements of the input inductor L1, the output inductor L2, and the choke inductor L3 on the Smith chart are greatly different from each other, and the required accuracy is also different. That is, although the choke inductor L3 requires a large phase rotation angle, the accuracy may be coarse. Therefore, the spiral inductor (or transmission line) using a very high dielectric film having a relative dielectric constant of about 300 is used. ) Can achieve downsizing. On the other hand, the input inductor L1 has a high accuracy of 50Ω.
Since it is necessary to match the impedance, it is not possible to use a high-dielectric film having a very large relative dielectric constant, and to suppress the relative dielectric constant to about 50 to 100 to appropriately satisfy miniaturization and accuracy. Is preferred. Further, by setting the relative dielectric constant of the high dielectric film used for the output inductor L2 to a value different from those of the inductors L1 and L3, the phase rotation angle and accuracy required for the output inductor L2 can be secured. In addition, the size of the inductor can be reduced.

(Other Embodiments) In each of the above embodiments, the semiconductor substrate is a GaAs substrate. However, the present invention is not limited to such an embodiment, and for example, a silicon substrate can be used.
In that case, the FE in the structure of the MMIC in each embodiment
Only the structure of T is different, and the structure of the spiral inductor, the high dielectric film, the ground metal for the high dielectric film, and each electrode pad can be the same as the structure in each embodiment. The relative dielectric constant of a silicon nitride film conventionally used as a high dielectric film is about 7.5, whereas the high dielectric film is made of a material having a relative dielectric constant of 10 or more as in the present invention. Thus, the effect of significantly reducing the area occupied by the inductor or the transmission line and improving the high frequency characteristics can be exhibited. When a compound semiconductor substrate is used, not only GaAs but also AlP, AlAs, Al
Needless to say, Sb, GaP, InP, InAs, InSb, etc. can be used as the substrate.

Further, in each of the above embodiments, the high dielectric film is made of strontium titanate. However, the material forming the high dielectric film of the present invention is not limited to strontium titanate. As a material having a relative dielectric constant of 10 or more, for example, lead titanate, lead titanium zirconate (PZ
T), lead bismuth titanate, potassium niobate, lithium niobate, strontium barium niobate (S
BN-75), strontium niobate, potassium tantalate, potassium tantalum niobate (KTN), etc., and these can be used in a single layer or a plurality of materials can be laminated to obtain a necessary relative dielectric constant as needed. .

In each of the above embodiments, only the spiral inductor is used as the passive element in order to facilitate the description of the structure. However, it goes without saying that a capacitor and the like may be formed on the same substrate.

Further, in each of the above embodiments, the shape of the inductor is a spiral shape. However, the shape of the inductor according to the present invention is not limited to such an embodiment, and may be a folded shape or the like.

[0073]

As described above, the following effects can be obtained according to the invention of each claim.

According to the first aspect, a high dielectric film having a relative dielectric constant of 10 or more and a ground metal electrode are continuously formed on a passive element such as an inductor or a transmission line formed on the main surface side of the semiconductor substrate. Since the stacked structure is adopted, the inductance value or the phase rotation angle of the passive element can be significantly increased, and the size and cost of the semiconductor chip can be reduced. Further, since the ground metal electrode can be formed thick on the high dielectric film having a relative dielectric constant of 10 or more, the instability of the ground potential which is a problem at high frequencies can be solved.

According to a second aspect, in the first aspect, the semiconductor substrate is mounted on the package with the main surface side of the semiconductor substrate facing upward, and the ground metal electrode formed on the high dielectric film and the ground of the package are grounded. The structure is such that the electrodes are connected to each other by bonding wires, making use of the fact that the ground metal electrode can be formed thicker, preventing damage to the semiconductor substrate due to the impact during wire bonding and easily storing the semiconductor substrate in a package. can do.

According to a third aspect of the present invention, in the first aspect, the semiconductor substrate is fixed to the package in a state where the main surface side of the semiconductor substrate is faced down, and the ground metal electrode functions as a bump. Directly connected to the ground electrode of the IGBT, thereby stabilizing the ground potential and improving the degree of freedom in the layout design of the passive elements, stabilizing the ground potential and expanding the upper limit of the usable frequency. be able to.

According to the fourth aspect, a plurality of high dielectric films having a relative dielectric constant of 10 or more and a ground metal electrode are formed on a passive element formed of an inductor or a transmission line formed on the main surface side of the semiconductor substrate. Since the layers are stacked while being separated from each other, it is possible to improve the separability of signals on the input side from signals on the output side. Can be prevented.

According to claim 5, in claim 4, since the high dielectric films are made of materials having different relative dielectric constants, the relative dielectric constant is selected according to the characteristics of the circuit on the same semiconductor substrate. Therefore, it is possible to improve the degree of freedom in designing the MMIC, and to reduce the size and accuracy of the MMIC.

According to the sixth aspect , in the first or fourth aspect , the thickness of the ground metal electrode is formed to be thicker as the operating frequency is lower. The thickness of the ground metal electrode can be set.

[0080] According to claim 7, in claim 1 or 4, when the semiconductor substrate is a compound semiconductor substrate, since the high dielectric film relative dielectric constant was composed of 20 or more materials, the effect of each claim It can be used effectively.

According to claim 8 , since the high dielectric film is made of strontium titanate according to claim 1 or 4 , the strontium titanate has a high dielectric constant and can be adjusted by the deposition conditions. The effect of each claim can be remarkably exhibited by utilizing the characteristics of (1).

According to claim 9 , in claim 1 or 4 , the semiconductor substrate is made of silicon single crystal.
The cost can be reduced by using an inexpensive silicon substrate, the size of the high-frequency semiconductor device can be reduced by reducing the area occupied by passive elements such as inductors, and the high-frequency characteristics can be improved.

[Brief description of the drawings]

FIG. 1 is a plan view and a cross-sectional view of an MMIC according to a first embodiment.

FIG. 2 is a perspective plan view taken along line II-II of FIG.

FIG. 3 is a plan view and a sectional view of an MMIC according to a second embodiment.

FIG. 4 is a plan view and a cross-sectional view of an MMIC mounted on a package according to a third embodiment.

FIG. 5 is a plan view and a sectional view of an MMIC according to fourth and fifth embodiments.

FIG. 6 is a perspective plan view taken along the line VI-VI of FIG. 5;

FIG. 7 is a plan view and a sectional view of an MMIC according to sixth and seventh embodiments.

FIG. 8 is a plan view and a cross-sectional view of an MMIC mounted on a package according to an eighth embodiment.

FIG. 9 is a Smith chart diagram and a circuit diagram of an MMIC according to a ninth embodiment provided with a plurality of high dielectric films having different relative dielectric constants.

FIG. 10 is a plan view and a sectional view of a conventional MMIC.

[Description of Signs] 1 Semi-insulating GaAs substrate 2 N + region 3 N- region 4 Insulating film 5 Source electrode 6 Drain electrode 7 Gate electrode 8 Matching spiral inductor 9 High dielectric film 10 Ground metal for high dielectric film DESCRIPTION OF SYMBOLS 11 Gate electrode pad 12 Source electrode pad 13 Output electrode pad 14 Active area 15 Source terminal 16 Gate terminal 17 Output terminal 18 Source wire 19 Input wire 20 Output wire 21 Ground wire 22 Package ground electrode 23 Package substrate 24 Source terminal 25 Gate terminal 26 Output terminal 27 Source bump 28 Gate bump 29 Output bump 30 Ceramic substrate ROVLP Overlap area

Claims (9)

(57) [Claims] 1. A semiconductor substrate, an active semiconductor element such as a transistor formed on a main surface side of the semiconductor substrate, and an active semiconductor element formed on a main surface side of the semiconductor substrate, wherein one of an inductor and a transmission line is provided. Comprising: a passive element comprising: a high-dielectric film having a relative permittivity of 10 or more formed on the passive element; and a ground metal electrode formed on the high-dielectric film. Semiconductor device. 2. The high-frequency semiconductor device according to claim 1, further comprising a package having at least a terminal and a ground electrode, wherein the package mounts the semiconductor substrate with its main surface side up. A corresponding terminal of each of the upper electrode pads and the package is connected by a bonding wire, and the ground metal electrode and a ground electrode of the package are connected to each other by a bonding wire. High frequency semiconductor device. 3. The high-frequency semiconductor device according to claim 1, further comprising a package for mounting the semiconductor substrate on which the respective members are formed with the main surface thereof facing down, wherein the ground on the semiconductor substrate is provided. The metal electrode also functions as a bump. The respective electrode pads and the corresponding terminals of the package are directly connected via the bump, and the ground metal electrode and the ground electrode of the package are connected by the bump. A high-frequency semiconductor device which is directly connected. 4. A semiconductor substrate, an active semiconductor element such as a transistor formed on the main surface side of the semiconductor substrate, and an active semiconductor element formed on the main surface side of the semiconductor substrate, wherein one of an inductor and a transmission line is provided. A plurality of passive elements, a plurality of high dielectric films each having a relative dielectric constant of 10 or more formed and separated from each other on each of the passive elements, and separated from each other formed on each of the high dielectric films. A high-frequency semiconductor device comprising a plurality of ground metal electrodes. 5. The high-frequency semiconductor device according to claim 4, wherein each of said high-dielectric films is made of materials having different relative dielectric constants. 6. The high-frequency semiconductor device according to claim 1, wherein the thickness of the ground metal electrode is increased as the operating frequency decreases. 7. The high-frequency semiconductor device according to claim 1 , wherein said semiconductor substrate is a compound semiconductor substrate, and said high dielectric film is made of a material having a relative permittivity of 20 or more. A high-frequency semiconductor device characterized by the following. 8. The high frequency semiconductor device according to claim 1 , wherein said high dielectric film is made of strontium titanate (SrTi).
O3). 9. The high-frequency semiconductor device according to claim 1 , wherein said semiconductor substrate is made of silicon single crystal.