JP2985413B2 - Method for manufacturing compound semiconductor device - Google Patents

Method for manufacturing compound semiconductor device

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Publication number
JP2985413B2
JP2985413B2 JP3227568A JP22756891A JP2985413B2 JP 2985413 B2 JP2985413 B2 JP 2985413B2 JP 3227568 A JP3227568 A JP 3227568A JP 22756891 A JP22756891 A JP 22756891A JP 2985413 B2 JP2985413 B2 JP 2985413B2
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Japan
Prior art keywords
substrate
group
compound semiconductor
temperature
source gas
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Japanese (ja)
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JPH06224120A (en
Inventor
利一 井上
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Fujitsu Ltd
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Fujitsu Ltd
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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】本発明は化合物半導体装置の製造
方法に係り，特に，Ｓｉ基板上に化合物半導体膜を成長
する方法に関する。The present invention relates to a method for manufacturing a compound semiconductor device, and more particularly to a method for growing a compound semiconductor film on a Si substrate.

【０００２】近年，Ｓｉに比べて高い電子移動度を有す
る化合物半導体を用いる電子デバイスの開発が進められ
ている。ところが，化合物半導体基板はＳｉ基板に比べ
て小口径のものしか開発されていないし，Ｓｉ基板に比
べて脆くて割れやすい。In recent years, electronic devices using a compound semiconductor having higher electron mobility than Si have been developed. However, only a compound semiconductor substrate having a smaller diameter than the Si substrate has been developed, and it is fragile and easily broken as compared with the Si substrate.

【０００３】そのため，Ｓｉ基板上に化合物半導体膜を
形成することが試みられている。For this reason, attempts have been made to form a compound semiconductor film on a Si substrate.

【０００４】[0004]

【従来の技術】従来，Ｓｉ基板上に化合物半導体膜を形
成する際，まずＳｉ基板上の自然酸化膜を除去するため
に水素中熱処理が行われていた。ところが 900℃以下で
は自然酸化膜の除去が行えず，表面に酸化膜が残ってし
まうといった問題があった。2. Description of the Related Art Conventionally, when forming a compound semiconductor film on a Si substrate, first, a heat treatment in hydrogen has been performed to remove a natural oxide film on the Si substrate. However, when the temperature is lower than 900 ° C., there is a problem that the natural oxide film cannot be removed and the oxide film remains on the surface.

【０００５】1000℃以上の高温で水素中熱処理を行え
ば，自然酸化膜は除去されるが，この処理をＳｉ基板に
Ｓｉデバイスを作製した後行えば，Ｓｉデバイスが劣化
してしまうといった問題がある。If a heat treatment in hydrogen at a high temperature of 1000 ° C. or more is performed, a natural oxide film is removed. However, if this treatment is performed after fabricating a Si device on a Si substrate, there is a problem that the Si device is deteriorated. is there.

【０００６】これに対して，800 ℃以上の温度でＳｉを
成長するための原料ガスを流しながらＳｉ基板を熱処理
して自然酸化膜は除去し，そのあと，Ｓｉを成長するた
めの原料ガスを流しながら化合物半導体膜を形成する温
度まで降温することが知られている（例えば特開平３−
55826 ）。On the other hand, while flowing a source gas for growing Si at a temperature of 800 ° C. or more, the Si substrate is heat-treated to remove the natural oxide film, and then the source gas for growing Si is removed. It is known that the temperature is lowered to a temperature at which a compound semiconductor film is formed while flowing (see, for example,
55826).

【０００７】[0007]

【発明が解決しようとする課題】しかし，この方法も欠
陥の少ない化合物半導体膜を形成するためには必ずしも
十分ではなく，反応管の管壁やサセプタに付着した不純
物が降温中にＳｉ基板に取り込まれ，表面欠陥の原因に
なるといった問題がある。However, this method is not always enough to form a compound semiconductor film having few defects, and impurities adhering to the tube wall of the reaction tube and the susceptor are taken into the Si substrate during the temperature drop. This may cause surface defects.

【０００８】それゆえ，さらに改良された方法が必要と
される。本発明は上記の問題に鑑み，Ｓｉ基板上に欠陥
の少ない化合物半導体膜を形成する方法を提供すること
を目的とする。[0008] Therefore, a need exists for a further improved method. The present invention has been made in view of the above problems, and has as its object to provide a method for forming a compound semiconductor film with few defects on a Si substrate.

【０００９】[0009]

【課題を解決するための手段】図１は本発明を実施する
装置を説明するための図である。上記課題は，Ｓｉ基板
１を 800℃以上の温度でＳｉを含む雰囲気に曝す第１の
工程と，その後，該Ｓｉ基板１をＶ族元素を含む原料ガ
スを含む雰囲気中で，III−Ｖ族化合物半導体を成長す
る温度まで降温する第２の工程と，その後，該Ｓｉ基板
１を III族元素を含む原料ガスとＶ族元素を含む原料ガ
スとを含む雰囲気に曝して，該Ｓｉ基板１上に III−Ｖ
族化合物半導体膜を成長する第３の工程とを有する化合
物半導体装置の製造方法によって解決される。FIG. 1 is a diagram for explaining an apparatus embodying the present invention. The above-mentioned problem is caused by a first step of exposing the Si substrate 1 to an atmosphere containing Si at a temperature of 800 ° C. or higher, and thereafter, subjecting the Si substrate 1 to an atmosphere containing a source gas containing a group V element. A second step of lowering the temperature to a temperature at which the compound semiconductor is grown, and thereafter exposing the Si substrate 1 to an atmosphere containing a source gas containing a group III element and a source gas containing a group V element, III-V
And a third step of growing a group III compound semiconductor film.

【００１０】また，Ｓｉ基板１を 800℃以上の温度でＳ
ｉを含む雰囲気に曝す第１の工程と，その後，該Ｓｉ基
板１をVI族元素又はＶ族元素を含む原料ガスを含む雰囲
気中で，II−VI族化合物半導体を成長する温度まで降温
する第２の工程と，その後，該Ｓｉ基板１をII族元素を
含む原料ガスとVI族元素を含む原料ガスとを含む雰囲気
に曝して該Ｓｉ基板１上にII−VI族化合物半導体膜を成
長する第３の工程とを有する化合物半導体装置の製造方
法によって解決される。The Si substrate 1 is heated at a temperature of 800 ° C.
a first step of exposing the substrate to an atmosphere containing i, and thereafter, a step of lowering the temperature of the Si substrate 1 to a temperature for growing a II-VI compound semiconductor in an atmosphere containing a source gas containing a group VI element or a group V element. Step 2, and thereafter, the Si substrate 1 is exposed to an atmosphere containing a source gas containing a group II element and a source gas containing a group VI element to grow a II-VI group compound semiconductor film on the Si substrate 1. A third method is a method for manufacturing a compound semiconductor device.

【００１１】また，Ｓｉ基板１を 800℃以上の温度でＳ
ｉを含む雰囲気に曝す第１の工程と，その後，該Ｓｉ基
板１をＶ族元素を含む原料ガスを含む雰囲気中で， III
−Ｖ族化合物半導体を成長する温度まで降温する第２の
工程と，その後，該Ｓｉ基板１を III族元素を含む原料
ガスとＶ族元素を含む原料ガスとを含む雰囲気に曝して
該Ｓｉ基板１上に III−Ｖ族化合物半導体膜を成長する
第３の工程と，その後，該Ｓｉ基板１をII族元素を含む
原料ガスとVI族元素を含む原料ガスとを含む雰囲気に曝
して該 III−Ｖ族化合物半導体膜上にII−VI族化合物半
導体膜を成長する第４の工程とを有する化合物半導体装
置の製造方法によって解決される。The Si substrate 1 is heated at a temperature of 800.degree.
a first step of exposing the Si substrate 1 to an atmosphere containing a source gas containing a group V element.
A second step of lowering the temperature to a temperature at which a group V compound semiconductor is grown, and thereafter exposing the Si substrate 1 to an atmosphere containing a source gas containing a group III element and a source gas containing a group V element. A third step of growing a group III-V compound semiconductor film on the substrate 1, and thereafter exposing the Si substrate 1 to an atmosphere containing a source gas containing a group II element and a source gas containing a group VI element. And a fourth step of growing a II-VI compound semiconductor film on the group V compound semiconductor film.

【００１２】[0012]

【作用】本発明では，Ｓｉ基板１を 800℃以上の温度で
Ｓｉを含む雰囲気に曝す第１の工程で自然酸化膜を除去
し，その後，第２の工程では，Ｓｉ基板１をＶ族元素を
含む原料ガスを含む雰囲気中で III−Ｖ族化合物半導体
を成長する温度まで降温することによりＶ族元素をＳｉ
基板１表面に付着させて，Ｓｉ基板１が酸化されたり不
純物に汚染されたりすること防止している。このように
すれば，Ｓｉ基板１を III族元素を含む原料ガスとＶ族
元素を含む原料ガスとを含む雰囲気に曝して，Ｓｉ基板
１上に III−Ｖ族化合物半導体膜を成長する第３の工程
で，欠陥の少ない III−Ｖ族化合物半導体膜を形成する
ことができる。According to the present invention, a natural oxide film is removed in a first step of exposing the Si substrate 1 to an atmosphere containing Si at a temperature of 800 ° C. or higher. The temperature is lowered to a temperature at which a group III-V compound semiconductor is grown in an atmosphere containing a source gas containing
The Si substrate 1 is attached to the surface of the substrate 1 to prevent the Si substrate 1 from being oxidized or contaminated by impurities. In this case, the Si substrate 1 is exposed to an atmosphere containing a source gas containing a group III element and a source gas containing a group V element, and a third III-V compound semiconductor film is grown on the Si substrate 1. In this step, a group III-V compound semiconductor film with few defects can be formed.

【００１３】また，Ｓｉ基板１を 800℃以上の温度でＳ
ｉを含む雰囲気に曝す第１の工程で自然酸化膜を除去
し，その後，第２の工程では，Ｓｉ基板１をVI族元素又
はＶ族元素を含む原料ガスを含む雰囲気中でII−VI族化
合物半導体を成長する温度まで降温することによりVI族
元素又はＶ族元素をＳｉ基板１表面に付着させて，Ｓｉ
基板１が酸化されたり不純物に汚染されたりすること防
止している。このようにすれば，Ｓｉ基板１をII族元素
を含む原料ガスとVI族元素を含む原料ガスとを含む雰囲
気に曝して，Ｓｉ基板１上にII−VI族化合物半導体膜を
成長する第３の工程で，欠陥の少ないII−VI族化合物半
導体膜を形成することができる。The Si substrate 1 is heated at 800 ° C. or
In a first step of exposing to an atmosphere containing i, the natural oxide film is removed, and then, in a second step, the Si substrate 1 is placed in an atmosphere containing a source gas containing a group VI element or a group V element in a II-VI group atmosphere. By lowering the temperature to the temperature at which the compound semiconductor is grown, the group VI element or the group V element is attached to the surface of the Si
The substrate 1 is prevented from being oxidized or contaminated by impurities. In this manner, the third step of exposing the Si substrate 1 to an atmosphere containing a source gas containing a group II element and a source gas containing a group VI element to grow a II-VI group compound semiconductor film on the Si substrate 1 is performed. In this step, a II-VI group compound semiconductor film with few defects can be formed.

【００１４】さらに，Ｓｉ基板上の III−Ｖ族化合物半
導体膜上にII−VI族化合物半導体膜を成長するようにす
れば，欠陥の少ないII−VI族化合物半導体結晶のエピタ
キシャル膜が形成できる。Further, if a group II-VI compound semiconductor film is grown on a group III-V compound semiconductor film on a Si substrate, an epitaxial film of a group II-VI compound semiconductor crystal with few defects can be formed.

【００１５】[0015]

【実施例】図１は本発明を実施する装置を説明するため
の図で，減圧ＭＯＣＶＤ装置を模式的に示すものであ
り，１はＳｉ基板，２は石英トレイ，３はサセプタ，４
はガス供給管，4a〜4dはガス導入口, ５は反応管，６は
ＲＦコイル，７はガス排気口，８は弁を表す。1 is a view for explaining an apparatus for carrying out the present invention, schematically showing a reduced pressure MOCVD apparatus, wherein 1 is a Si substrate, 2 is a quartz tray, 3 is a susceptor, and 4 is a susceptor.
Represents a gas supply pipe, 4a to 4d represent gas inlets, 5 represents a reaction tube, 6 represents an RF coil, 7 represents a gas exhaust port, and 8 represents a valve.

【００１６】サセプタ３はカーボン製で，表面にＳｉＣ
コートを施してある。反応管５は石英製である。第１の
実施例について説明する。The susceptor 3 is made of carbon and has a surface made of SiC.
Coated. The reaction tube 5 is made of quartz. A first embodiment will be described.

【００１７】（１００）Ｓｉ基板１を石英トレイ２に導
入し，水素（Ｈ2 ）とモノシラン（ＳｉＨ4 ）をガス導
入口から反応管５内に流す。水素流量は１２ SLM(stand
ardliter per ｍinute), モノシラン流量は１SCCM(stan
dard cubic centimeter perｍinute)とし，圧力は７６T
orrとする。(100) The Si substrate 1 is introduced into the quartz tray 2, and hydrogen (H 2 ) and monosilane (SiH 4 ) are flowed into the reaction tube 5 from the gas inlet. Hydrogen flow rate is 12 SLM (stand
ardliter per minute, monosilane flow rate is 1 SCCM (stan
dard cubic centimeter per minute), pressure is 76T
orr.

【００１８】サセプタ３をＲＦコイル６により加熱し，
Ｓｉ基板１を 850℃で１０分間保持し，Ｓｉ基板１の自
然酸化膜を除去した。次いで，アルシン（ＡｓＨ3 ）を
２０〜５０ SCCM 流し，水素とモノシランを遮断し，そ
の状態でＳｉ基板温度を 450℃まで降温する。Ｓｉ基板
１表面には，Ａｓの単層が生じてＳｉ基板１を酸化や汚
染から保護する。この処理において，水素とモノシラン
とアルシンを流した状態が 850℃である時間つづくよう
にし，それから水素とモノシランを遮断して降温するよ
うにしてもい。The susceptor 3 is heated by the RF coil 6,
The Si substrate 1 was kept at 850 ° C. for 10 minutes, and the natural oxide film on the Si substrate 1 was removed. Next, arsine (AsH 3 ) is flown at 20 to 50 SCCM to shut off hydrogen and monosilane, and the temperature of the Si substrate is lowered to 450 ° C. in this state. A single layer of As is formed on the surface of the Si substrate 1 to protect the Si substrate 1 from oxidation and contamination. In this treatment, the flow of hydrogen, monosilane, and arsine may be continued for a period of time at 850 ° C., and then the temperature may be lowered by cutting off hydrogen and monosilane.

【００１９】次いで， 450℃で，ＴＭＧ（トリメチルガ
リウム）とアルシンを，それぞれ，8.9 SCCM，200 SCCM
流し，非晶質ＧａＡｓを約 100Åの厚さに成長させ，次
いで，Ｓｉ基板温度を 700℃に昇温し，トリメチルガリ
ウムとアルシンを，それぞれ，2.5 SCCM，100 SCCM流
し，ＧａＡｓ結晶を約３μｍ成長させた。先に形成した
非晶質ＧａＡｓも結晶化し，（１００）Ｓｉ基板１にエ
ピタキシャルに接合された（１００）ＧａＡｓ結晶膜が
得られた。Then, at 450 ° C., TMG (trimethylgallium) and arsine were respectively added to 8.9 SCCM and 200 SCCM.
To grow the amorphous GaAs to a thickness of about 100 °, then raise the temperature of the Si substrate to 700 ° C., and flow trimethylgallium and arsine at 2.5 SCCM and 100 SCCM, respectively, to grow the GaAs crystal to about 3 μm. I let it. The previously formed amorphous GaAs was also crystallized, and a (100) GaAs crystal film epitaxially bonded to the (100) Si substrate 1 was obtained.

【００２０】その後，水素雰囲気中で 850℃，１０分間
のポストアニールを行った。この処理によりＳｉ基板１
とＧａＡｓ結晶膜との界面の転位が減少する。このよう
にして得られたＧａＡｓ結晶膜の表面欠陥密度を顕微鏡
観察により測定した結果を表１に示す。表１には水素雰
囲気中で1000℃，１０分間の熱処理をした後， 700℃で
成長させたＧａＡｓ結晶膜の表面欠陥密度も比較のため
に示している。Thereafter, post-annealing was performed at 850 ° C. for 10 minutes in a hydrogen atmosphere. By this processing, the Si substrate 1
Dislocation at the interface between the silicon and the GaAs crystal film is reduced. Table 1 shows the results of measuring the surface defect density of the GaAs crystal film thus obtained by microscopic observation. Table 1 also shows the surface defect density of the GaAs crystal film grown at 700 ° C. after heat treatment at 1000 ° C. for 10 minutes in a hydrogen atmosphere for comparison.

【００２１】[0021]

【表１】 表面欠陥密度 H2/SiH4 ，AsH3処理 ５cm-2以下 H2処理（従来例） 約３０cm-2 表１に見るように，本発明の方法によれば，表面欠陥密
度を著しく減少させたＧａＡｓ結晶膜を得ることができ
る。TABLE 1 surface defect density H 2 / SiH 4, AsH 3 processing 5 cm -2 or less H 2 treatment as (conventional example) seen in approximately 30 cm -2 Table 1, according to the method of the present invention, the surface defect density A significantly reduced GaAs crystal film can be obtained.

【００２２】上記の実施例ではＳｉ基板１の自然酸化膜
を除去する熱処理のために水素とモノシランの混合ガス
を用いたが，モノシランに替えてジシラン，トリシラン
を使用してもよい。この熱処理の温度は 800℃以上であ
る必要がある。 800℃に達しないと自然酸化膜の除去が
不完全になる。In the above embodiment, a mixed gas of hydrogen and monosilane was used for the heat treatment for removing the natural oxide film of the Si substrate 1, but disilane and trisilane may be used instead of monosilane. The temperature of this heat treatment must be 800 ° C or higher. If the temperature does not reach 800 ° C., the removal of the native oxide film becomes incomplete.

【００２３】また，上記の実施例ではＳｉ基板１上にＧ
ａＡｓ膜の成長について説明したが，ＡｌＡｓ膜，Ｉｎ
Ａｓ膜の成長にも本発明の方法は適用できる。本発明の
方法によりＧａＰ膜，ＧａＳｂ膜のような III−Ｖ族化
合物半導体膜をＳｉ基板１上に成長することもできる
が，この場合はアルシン（ＡｓＨ3 ）に替えて，フォス
フィン（ＰＨ3 ），スチビン（ＳｂＨ3 ）のようなＶ族
元素を含む原料ガスを降温の際及び III−Ｖ族化合物半
導体膜成長の際用いる。Further, in the above embodiment, G
The growth of the aAs film has been described.
The method of the present invention can be applied to the growth of an As film. GaP film by the method of the present invention, can also be grown a group III-V compound semiconductor layer such as a GaSb film on the Si substrate 1, in this case instead of arsine (AsH 3), phosphine (PH 3) A raw material gas containing a group V element such as stibine (SbH 3 ) is used for lowering the temperature and for growing a III-V compound semiconductor film.

【００２４】次に，第２の実施例について説明する。
（１００）Ｓｉ基板１を石英トレイ２に導入し，水素
（Ｈ2 ）とモノシラン（ＳｉＨ4 ）をガス導入口から反
応管５内に流す。水素流量は１２ SLM(standardliter
perｍinute), モノシラン流量は１SCCM(standard cubic
centimeter perｍinute)とし，圧力は７６Torrとす
る。Next, a second embodiment will be described.
(100) The Si substrate 1 is introduced into the quartz tray 2, and hydrogen (H 2 ) and monosilane (SiH 4 ) are flowed into the reaction tube 5 from the gas inlet. Hydrogen flow rate is 12 SLM (standardliter)
perminute), Monosilane flow rate is 1 SCCM (standard cubic)
centimeter per minute) and the pressure is 76 Torr.

【００２５】サセプタ３をＲＦコイル６により加熱し，
Ｓｉ基板１を 850℃で１０分間保持し，Ｓｉ基板１の自
然酸化膜を除去した。次いで，アルシン（ＡｓＨ3 ）を
２０〜５０SCCM流し，水素とモノシランを遮断し，その
状態でＳｉ基板温度を 450℃まで降温する。Ｓｉ基板１
表面にはＡｓの単層が生じて，Ｓｉ基板１を酸化や汚染
から保護する。この処理において，水素とモノシランと
アルシンを流した状態が 850℃である時間つづくように
し，それから水素とモノシランを遮断して降温するよう
にしてもい。The susceptor 3 is heated by the RF coil 6,
The Si substrate 1 was kept at 850 ° C. for 10 minutes, and the natural oxide film on the Si substrate 1 was removed. Next, arsine (AsH 3 ) is flown at 20 to 50 SCCM to cut off hydrogen and monosilane, and the temperature of the Si substrate is lowered to 450 ° C. in this state. Si substrate 1
A single layer of As is formed on the surface to protect the Si substrate 1 from oxidation and contamination. In this treatment, the flow of hydrogen, monosilane, and arsine may be continued for 850 ° C for a period of time, and then the temperature may be lowered by cutting off hydrogen and monosilane.

【００２６】なお，Ｖ族元素を含むアルシン（Ａｓ
Ｈ3 ）に替えてVI族元素を含むセレン化水素（Ｈ2 Ｓ
ｅ）を使用することもできる。次いで， 250℃で，ＤＥ
Ｚｎ（ジエチルジンク）とセレン化水素を，それぞれ，
９SCCM，１８SCCM流し，非晶質ＺｎＳｅを約 100Åの厚
さに成長させ，次いで，Ｓｉ基板温度を 450℃に昇温
し，ジエチルジンクとセレン化水素を，それぞれ，９SC
CM，２０SCCM流し，ＺｎＳｅ結晶を約３μｍ成長させ
た。先に形成した非晶質ＺｎＳｅも結晶化した。It should be noted that arsine containing a group V element (As
Hydrogen selenide (H 2 S) containing a group VI element instead of H 3 )
e) can also be used. Then, at 250 ° C, DE
Zn (diethyl zinc) and hydrogen selenide
9 SCCM and 18 SCCM are flowed, and amorphous ZnSe is grown to a thickness of about 100 °. Then, the temperature of the Si substrate is raised to 450 ° C.
By flowing CM and 20 SCCM, ZnSe crystal was grown to about 3 μm. The previously formed amorphous ZnSe also crystallized.

【００２７】その後，水素雰囲気中で 850℃，１０分間
のポストアニールを行った。このようにしてＳｉ基板１
上にＺｎＳｅ結晶の単結晶膜を成長した。なお，原料ガ
スを替えることにより，ＺｎＳ，ＣｄＴｅのようなII−
VI族化合物半導体膜をＳｉ基板１上に成長することがで
きる。この場合は，セレン化水素（Ｈ2 Ｓｅ）に替え
て，硫化水素（Ｈ2 Ｓ），テルル化水素（Ｈ2 Ｔｅ）の
ようなVI族元素を含む原料ガスを降温の際及びII−VI族
化合物半導体膜成長の際用いるようにする。降温の際は
VI族元素を含むガスに替えてアルシン（ＡｓＨ3 ）のよ
うなＶ族元素を含むガスを使用してもよい。Thereafter, post annealing was performed at 850 ° C. for 10 minutes in a hydrogen atmosphere. Thus, the Si substrate 1
A ZnSe single crystal film was grown thereon. In addition, by changing the source gas, II-
A group VI compound semiconductor film can be grown on the Si substrate 1. In this case, instead of the hydrogen selenide (H 2 Se), hydrogen (H 2 S) sulfide, upon cooling a raw material gas containing a Group VI element such as hydrogen telluride (H 2 Te) and II-VI It is used when growing a group III compound semiconductor film. When the temperature falls
A gas containing a group V element such as arsine (AsH 3 ) may be used instead of the gas containing a group VI element.

【００２８】次に，第３の実施例について説明する。
（１００）Ｓｉ基板１を石英トレイ２に導入し，水素
（Ｈ2 ）とモノシラン（ＳｉＨ4 ）をガス導入口から反
応管５内に流す。水素流量は１２ SLM(standardliter p
er ｍinute), モノシラン流量は１０ SCCM(standard cu
bic centimeterper ｍinute)とし，圧力は７６Torrとす
る。Next, a third embodiment will be described.
(100) The Si substrate 1 is introduced into the quartz tray 2, and hydrogen (H 2 ) and monosilane (SiH 4 ) are flowed into the reaction tube 5 from the gas inlet. Hydrogen flow rate is 12 SLM (standardliter p
er minute), the flow rate of monosilane is 10 SCCM (standard cu
bic centimeter per minute) and the pressure is 76 Torr.

【００２９】サセプタ３をＲＦコイル６により加熱し，
Ｓｉ基板１を 850℃で１０分間保持し，Ｓｉ基板１の自
然酸化膜を除去した。次いで，アルシン（ＡｓＨ3 ）を
２０〜５０ SCCM 流し，水素とモノシランを遮断し，そ
の状態でＳｉ基板温度を 450℃まで降温する。Ｓｉ基板
１表面には，Ａｓの単層が生じてＳｉ基板１を酸化や汚
染から保護する。この処理において，水素とモノシラン
を遮断してアルシンを流した状態が 850℃である時間つ
づくようにし，それから降温するようにしてもい。The susceptor 3 is heated by the RF coil 6,
The Si substrate 1 was kept at 850 ° C. for 10 minutes, and the natural oxide film on the Si substrate 1 was removed. Next, arsine (AsH 3 ) is flown at 20 to 50 SCCM to shut off hydrogen and monosilane, and the temperature of the Si substrate is lowered to 450 ° C. in this state. A single layer of As is formed on the surface of the Si substrate 1 to protect the Si substrate 1 from oxidation and contamination. In this process, hydrogen and monosilane may be cut off and arsine flowed at 850 ° C for a certain period of time, and then the temperature may be lowered.

【００３０】次いで， 450℃で，ＴＭＧ（トリメチルガ
リウム）とアルシンを，それぞれ，8.9 SCCM，200 SCCM
流し，非晶質ＧａＡｓを約 100Åの厚さに成長させ，次
いで，Ｓｉ基板温度を 700℃に昇温し，トリメチルガリ
ウムとアルシンを，それぞれ，2.5 SCCM，100 SCCM流
し，ＧａＡｓ結晶を約0.5 μｍ成長させた。先に形成し
た非晶質ＧａＡｓも結晶化し，（１００）Ｓｉ基板１に
エピタキシャルに接合された（１００）ＧａＡｓ結晶膜
が得られた。Then, at 450 ° C., TMG (trimethylgallium) and arsine were added at 8.9 SCCM and 200 SCCM, respectively.
Then, the amorphous GaAs is grown to a thickness of about 100 °, then the Si substrate temperature is raised to 700 ° C., trimethylgallium and arsine are flowed at 2.5 SCCM and 100 SCCM, respectively, and the GaAs crystal is grown at about 0.5 μm. Grew. The previously formed amorphous GaAs was also crystallized, and a (100) GaAs crystal film epitaxially bonded to the (100) Si substrate 1 was obtained.

【００３１】次いで， 450℃で，ＤＥＺｎ（ジエチルジ
ンク）とセレン化水素を，それぞれ，９SCCM，２０SCCM
流し，ＺｎＳｅ結晶を約2.5 μｍ成長させた。その後，
水素雰囲気中で 850℃，１０分間のポストアニールを行
った。Then, at 450 ° C., DEZn (diethyl zinc) and hydrogen selenide were added at 9 SCCM and 20 SCCM, respectively.
Then, a ZnSe crystal was grown to about 2.5 μm. afterwards,
Post annealing was performed at 850 ° C. for 10 minutes in a hydrogen atmosphere.

【００３２】このようにしてＳｉ基板１上に形成された
ＧａＡｓ結晶膜の上にＺｎＳｅ結晶の単結晶膜を成長す
ることができた。In this manner, a single crystal film of ZnSe crystal could be grown on the GaAs crystal film formed on the Si substrate 1.

【００３３】[0033]

【発明の効果】以上説明したように，本発明によれば，
大口径のＳｉ基板の上に欠陥の少ないIII−Ｖ族化合物
半導体単結晶膜或いはII−VI族化合物半導体単結晶膜を
形成することができる。As described above, according to the present invention,
A III-V compound semiconductor single crystal film or a II-VI compound semiconductor single crystal film with few defects can be formed on a large-diameter Si substrate.

【００３４】本発明は大口径化合物半導体基板の開発に
寄与するものである。The present invention contributes to the development of a large-diameter compound semiconductor substrate.

【００３５】[0035]

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明を実施する装置を説明するための図であ
る。FIG. 1 is a diagram for explaining an apparatus for implementing the present invention.

【符号の説明】[Explanation of symbols]

１はＳｉ基板 ２は石英トレイ ３はサセプタ ４はガス供給管 4a〜4dはガス導入口 ５は反応管 ６はＲＦコイル ７はガス排気口 ８は弁 1 is a Si substrate 2 is a quartz tray 3 is a susceptor 4 is a gas supply pipe 4a to 4d is a gas inlet 5 is a reaction tube 6 is an RF coil 7 is a gas exhaust port 8 is a valve

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 Ｓｉ基板(1) を 800℃以上の温度でＳｉ
を含む雰囲気に曝す第１の工程と， その後，該Ｓｉ基板(1) をＶ族元素を含む原料ガスを含
む雰囲気中で， III−Ｖ族化合物半導体を成長する温度
まで降温する第２の工程と， その後，該Ｓｉ基板(1) を III族元素を含む原料ガスと
Ｖ族元素を含む原料ガスとを含む雰囲気に曝して，該Ｓ
ｉ基板(1) 上に III−Ｖ族化合物半導体膜を成長する第
３の工程とを有することを特徴とする化合物半導体装置
の製造方法。An Si substrate (1) is heated at a temperature of 800 ° C. or more to a Si substrate (1).
A first step of exposing the Si substrate (1) to a temperature at which a III-V compound semiconductor is grown in an atmosphere containing a source gas containing a group V element. And then exposing the Si substrate (1) to an atmosphere containing a source gas containing a group III element and a source gas containing a group V element.
a third step of growing a group III-V compound semiconductor film on the i-substrate (1). 【請求項２】 Ｓｉ基板(1) を 800℃以上の温度でＳｉ
を含む雰囲気に曝す第１の工程と， その後，該Ｓｉ基板(1) をVI族元素又はＶ族元素を含む
原料ガスを含む雰囲気中で，II−VI族化合物半導体を成
長する温度まで降温する第２の工程と， その後，該Ｓｉ基板(1) をII族元素を含む原料ガスとVI
族元素を含む原料ガスとを含む雰囲気に曝して該Ｓｉ基
板(1) 上にII−VI族化合物半導体膜を成長する第３の工
程とを有することを特徴とする化合物半導体装置の製造
方法。2. The method according to claim 1, wherein the Si substrate is heated at a temperature of 800 ° C. or more.
A first step of exposing the Si substrate (1) to an atmosphere containing a source gas containing a group VI element or a group V element, and then lowering the temperature to a temperature at which a II-VI compound semiconductor is grown. A second step, and thereafter, the Si substrate (1) is mixed with a source gas containing a group II element and VI gas.
A step of growing a group II-VI compound semiconductor film on said Si substrate (1) by exposing to an atmosphere containing a source gas containing a group element. 【請求項３】 Ｓｉ基板(1) を 800℃以上の温度でＳｉ
を含む雰囲気に曝す第１の工程と， その後，該Ｓｉ基板(1) をＶ族元素を含む原料ガスを含
む雰囲気中で， III−Ｖ族化合物半導体を成長する温度
まで降温する第２の工程と， その後，該Ｓｉ基板(1) を III族元素を含む原料ガスと
Ｖ族元素を含む原料ガスとを含む雰囲気に曝して該Ｓｉ
基板(1) 上に III−Ｖ族化合物半導体膜を成長する第３
の工程と， その後，該Ｓｉ基板(1) をII族元素を含む原料ガスとVI
族元素を含む原料ガスとを含む雰囲気に曝して該 III−
Ｖ族化合物半導体膜上にII−VI族化合物半導体膜を成長
する第４の工程とを有することを特徴とする化合物半導
体装置の製造方法。3. The method according to claim 1, wherein the Si substrate is heated at a temperature of 800 ° C. or more.
A first step of exposing the Si substrate (1) to a temperature at which a III-V compound semiconductor is grown in an atmosphere containing a source gas containing a group V element. And then exposing the Si substrate (1) to an atmosphere containing a source gas containing a group III element and a source gas containing a group V element.
Third growth of III-V compound semiconductor film on substrate (1)
And then the Si substrate (1) is mixed with a raw material gas containing a group II element
Exposure to an atmosphere containing a source gas containing a group III element.
A fourth step of growing a group II-VI compound semiconductor film on the group V compound semiconductor film.
JP3227568A 1991-09-09 1991-09-09 Method for manufacturing compound semiconductor device Expired - Fee Related JP2985413B2 (en)

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JP3227568A JP2985413B2 (en) 1991-09-09 1991-09-09 Method for manufacturing compound semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3227568A JP2985413B2 (en) 1991-09-09 1991-09-09 Method for manufacturing compound semiconductor device

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Publication Number Publication Date
JPH06224120A JPH06224120A (en) 1994-08-12
JP2985413B2 true JP2985413B2 (en) 1999-11-29

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ID=16862960

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