JPH08264455A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

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Publication number
JPH08264455A
JPH08264455A JP6101595A JP6101595A JPH08264455A JP H08264455 A JPH08264455 A JP H08264455A JP 6101595 A JP6101595 A JP 6101595A JP 6101595 A JP6101595 A JP 6101595A JP H08264455 A JPH08264455 A JP H08264455A
Authority
JP
Japan
Prior art keywords
substrate
layer
temperature
sic substrate
gan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6101595A
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Japanese (ja)
Other versions
JP3654307B2 (en
Inventor
Kazuhiko Horino
和彦 堀野
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Fujitsu Ltd
Original Assignee
Fujitsu Ltd
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Priority to JP06101595A priority Critical patent/JP3654307B2/en
Publication of JPH08264455A publication Critical patent/JPH08264455A/en
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Publication of JP3654307B2 publication Critical patent/JP3654307B2/en
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Abstract

PURPOSE: To enable the formation of a GaN compound semiconductor layer on a SiC substrate by depositing a GaAlInN layer on the top of the substrate while gradually increasing the temperature of the SiC substrate from a first value to a specified second value, and keeping the substrate at the second temperature and further depositing another GaAlInN layer thereon. CONSTITUTION: A high-frequency coil 3 is wound around the circumference of a processing chamber 1 in such a way that a substrate holder 2 is surrounded therewith. A high-frequency current is passed through the high-frequency coil 3 to heat the substrate holder 2, and a substrate 7 is heated by heat conducted by the substrate holder 2. While the temperature of a SiC substrate 7 is gradually increased from a first value to a second value, 300 deg.C or more higher tan the first value, a Ga1-x-y Alx Iny N layer (0<=x<=0.2, 0<=y<=0.3) is deposited on the top of the SiC substrate 7. Then, while the SiC substrate 7 is kept at the second temperature, a Ga1-i-j Ali Inj N layer (0<=i<=0.2, 0<=j<=0.3) is deposited on the Ga1-x-y Alx Iny N layer.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、GaN系の化合物半導
体層を形成する方法、及びGaN系の化合物半導体層を
有する半導体装置に関する。GaN系の化合物半導体
は、青色から紫外領域の発光をする材料として注目され
ている。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a GaN compound semiconductor layer and a semiconductor device having a GaN compound semiconductor layer. GaN-based compound semiconductors are attracting attention as materials that emit light in the blue to ultraviolet region.

【0002】[0002]

【従来の技術】従来、GaN層は有機金属気相成長法を
用いて、サファイア(α−Al2 3)基板上に形成さ
れていた。サファイア基板上へのGaN層の形成は、例
えば、基板温度を500℃とし、トリメチルガリウム
(TMGa)とアンモニア(NH 3 )を供給して厚さ約
30nmの多結晶のGaNバッファ層を堆積する。次に
基板温度を1030℃とし、上記と同じ原料ガスを用い
てGaN層を堆積する。このように、GaN層堆積開始
時の基板温度を500℃程度として多結晶のバッファ層
を形成しておくことにより、その上に高品質な単結晶の
GaN層を形成することができる。
2. Description of the Related Art Conventionally, a GaN layer is formed by a metal organic chemical vapor deposition method.
Using sapphire (α-Al2O3) Formed on the substrate
It was Example of forming a GaN layer on a sapphire substrate
For example, the substrate temperature is 500 ° C., and trimethylgallium is used.
(TMGa) and ammonia (NH 3) Supply about thickness
Deposit a 30 nm polycrystalline GaN buffer layer. next
The substrate temperature is 1030 ° C., and the same source gas as above is used.
To deposit a GaN layer. In this way, the start of GaN layer deposition
When the substrate temperature is about 500 ° C, a polycrystalline buffer layer
By forming a high quality single crystal on it.
A GaN layer can be formed.

【0003】[0003]

【発明が解決しようとする課題】従来の技術を用いてサ
ファイア基板上に単結晶のGaN層を形成することがで
きる。しかし、サファイア基板には導電性がないため、
基板裏面から電極を取り出すことができない。基板の表
面のみから電極を引き出すと、正負両方の電極形成領域
を確保する必要があるため、チップ面積の縮小が困難に
なる。
A single crystal GaN layer can be formed on a sapphire substrate using conventional techniques. However, since the sapphire substrate is not conductive,
The electrode cannot be taken out from the back surface of the substrate. If the electrodes are drawn out only from the surface of the substrate, it is necessary to secure both positive and negative electrode formation regions, which makes it difficult to reduce the chip area.

【0004】また、サファイア基板には劈開性がない。
劈開により反射面を形成することができないため、レー
ザダイオードへの適用が困難になる。本発明の目的は、
導電性及び劈開性を有するSiC基板上にGaN系の化
合物半導体層を形成する技術を提供することである。
Further, the sapphire substrate has no cleavage property.
Since the reflecting surface cannot be formed by cleavage, it is difficult to apply it to a laser diode. The purpose of the present invention is to
It is an object of the present invention to provide a technique for forming a GaN-based compound semiconductor layer on a SiC substrate having electrical conductivity and cleavage.

【0005】[0005]

【課題を解決するための手段】本発明の半導体装置の製
造方法は、上面を有するSiC基板を準備する工程と、
前記SiC基板の温度を第1の温度から、該第1の温度
よりも300℃以上高い第2の温度まで徐々に上昇させ
ながら、前記SiC基板の上面にGa1-x-y Alx In
y N層(0≦x≦0.2、0≦y≦0.3)を堆積する
工程と、前記SiC基板の温度を前記第2の温度に維持
したまま、前記Ga1-x-y Alx InyN層の上に他の
Ga1-i-j Ali Inj N層(0≦i≦0.2、0≦j
≦0.3)を堆積する工程とを含む。
A method of manufacturing a semiconductor device according to the present invention comprises a step of preparing a SiC substrate having an upper surface,
While gradually increasing the temperature of the SiC substrate from the first temperature to the second temperature which is higher than the first temperature by 300 ° C. or more, Ga 1-xy Al x In is formed on the upper surface of the SiC substrate.
depositing y N layer (0 ≦ x ≦ 0.2,0 ≦ y ≦ 0.3), while maintaining the temperature of the SiC substrate to the second temperature, the Ga 1-xy Al x In On top of the y N layer, another Ga 1 -ij Al i In j N layer (0 ≦ i ≦ 0.2, 0 ≦ j
≦ 0.3) is deposited.

【0006】本発明の他の半導体装置の製造方法は、上
面を有するSiC基板を準備する工程と、前記SiC基
板の上に、III族元素としてAlを含み、V族元素が
Nであり、III族元素中のAlの組成比が0.5以上
であるIII−V族化合物半導体層を堆積する工程と、
前記III−V族化合物半導体層の上に、Ga1-x-y
x Iny N層(0≦x≦0.2、0≦y≦0.3)を
エピタキシャル成長させる工程とを含む。
Another method of manufacturing a semiconductor device according to the present invention comprises the steps of preparing an SiC substrate having an upper surface, and including Al as a group III element on the SiC substrate, wherein the group V element is N, and III Depositing a group III-V compound semiconductor layer in which the composition ratio of Al in the group element is 0.5 or more;
Ga 1-xy A is formed on the III-V group compound semiconductor layer.
and a step of epitaxially growing an l x In y N layer (0 ≦ x ≦ 0.2, 0 ≦ y ≦ 0.3).

【0007】前記SiC基板として、{0001}、
{10−10}、{11−20}面のうち少なくとも1
つの面に垂直な面が表出した上面を有する基板を用いて
もよい。
As the SiC substrate, {0001},
At least one of {10-10} and {11-20} planes
You may use the board | substrate which has the upper surface which the surface perpendicular | vertical to two surfaces was exposed.

【0008】本発明の半導体装置は、SiC基板と、前
記SiC基板の上に形成され、III族元素としてAl
を含み、V族元素がNであり、III族元素中のAlの
組成比が0.5以上であるIII−V族化合物半導体層
と、前記III−V族化合物半導体層の上に形成された
Ga1-x-y Alx Iny N層(0≦x≦0.2、0≦y
≦0.3)とを有する。
A semiconductor device of the present invention is formed on a SiC substrate and the SiC substrate, and is made of Al as a group III element.
A group III-V compound semiconductor layer in which the group V element is N and the composition ratio of Al in the group III element is 0.5 or more; and the group III-V compound semiconductor layer. Ga 1-xy Al x In y N layer (0 ≦ x ≦ 0.2, 0 ≦ y
≦ 0.3).

【0009】[0009]

【作用】SiC基板の表面に比較的低温でGa1-x-y
x Iny N層(0≦x≦0.2、0≦y≦0.3)を
形成すると、多結晶のGaAlInN層が得られる。さ
らに、基板温度をエピタキシャル成長する温度まで徐々
に上昇させながらGaAlInN層を形成し、エピタキ
シャル成長する温度で一定時間GaAlInN層を形成
すると、高品質のGaAlInN層を得ることができ
る。
[Function] Ga 1-xy A on the surface of the SiC substrate at a relatively low temperature
When a l x In y N layer (0 ≦ x ≦ 0.2, 0 ≦ y ≦ 0.3) is formed, a polycrystalline GaAlInN layer is obtained. Furthermore, a high quality GaAlInN layer can be obtained by forming the GaAlInN layer while gradually raising the substrate temperature to the temperature for epitaxial growth and forming the GaAlInN layer at the temperature for epitaxial growth for a certain period of time.

【0010】これは、基板温度を徐々に上昇させるた
め、多結晶のGaAlInN層の特定の一部の結晶粒の
みが大きく成長することなく、各結晶粒が平均的に成長
するためと考えられる。
It is considered that this is because the substrate temperature is gradually increased, so that only some specific crystal grains of the polycrystalline GaAlInN layer do not grow significantly, but the respective crystal grains grow on average.

【0011】SiC基板の表面にバッファ層としてII
I族元素としてAlを含み、V族元素がNであり、II
I族元素中のAlの組成比が0.5以上であるIII−
V族化合物半導体層を形成し、このバッファ層の上にG
aAlInN層を形成すると、高品質のGaAlInN
層を得ることができる。
II as a buffer layer on the surface of the SiC substrate
Al is contained as a group I element, a group V element is N, and II
III- where the composition ratio of Al in the group I element is 0.5 or more
A group V compound semiconductor layer is formed, and G is formed on this buffer layer.
When the aAlInN layer is formed, high quality GaAlInN is formed.
Layers can be obtained.

【0012】SiC基板として、{0001}、{10
−10}、{11−20}面のうち少なくとも1つの面
に垂直な面が表出した上面を有する基板を用いると、上
面に垂直な面で劈開することができる。従って、レーザ
共振器の作製が容易になる。
As SiC substrates, {0001}, {10
When a substrate having an upper surface in which a surface perpendicular to at least one of the −10} and {11-20} planes is exposed is used, the cleavage can be performed on the surface perpendicular to the upper surface. Therefore, the fabrication of the laser resonator becomes easy.

【0013】[0013]

【実施例】まず、サファイア基板上にGaN層を成長さ
せる方法と同様の方法で、SiC基板上にGaN層を形
成する予備実験を行った結果について説明する。
EXAMPLES First, the results of a preliminary experiment of forming a GaN layer on a SiC substrate by a method similar to the method of growing a GaN layer on a sapphire substrate will be described.

【0014】図1は、GaN層の形成に用いた有機金属
気相成長(MOCVD)装置の概略断面図を示す。内部
空間を有する処理容器1の一端から、原料ガス導入管4
及びパージ用ガス導入管5が挿入されており、処理容器
1の内部に原料ガス及びパージ用ガスが導入される。処
理容器1の他端にはガス排気管6が接続されており、ガ
ス排気管6から処理容器1内のガスが排気される。
FIG. 1 is a schematic sectional view of a metal organic chemical vapor deposition (MOCVD) apparatus used for forming a GaN layer. From one end of the processing container 1 having an internal space, the raw material gas introduction pipe 4
Also, a purging gas introduction pipe 5 is inserted, and the raw material gas and the purging gas are introduced into the processing container 1. A gas exhaust pipe 6 is connected to the other end of the processing container 1, and the gas in the processing container 1 is exhausted from the gas exhaust pipe 6.

【0015】処理容器1の内部空間にはカーボン製の基
板保持台2が配置されており、GaN層形成時には、基
板保持台2の下面に基板7が保持される。処理容器1の
外部には、基板保持台2を取り囲むように高周波コイル
3が巻かれている。高周波コイル3に高周波電流を流す
ことにより、基板保持台2を加熱し、基板保持台2から
の熱伝導により基板7を加熱することができる。
A substrate holder 2 made of carbon is arranged in the internal space of the processing container 1, and the substrate 7 is held on the lower surface of the substrate holder 2 when the GaN layer is formed. A high-frequency coil 3 is wound around the processing container 1 so as to surround the substrate holder 2. By applying a high-frequency current to the high-frequency coil 3, the substrate holder 2 can be heated and the substrate 7 can be heated by heat conduction from the substrate holder 2.

【0016】図6は、GaN層成長中の基板温度の時間
変化及び原料ガスの供給時期を示す。横軸は成長開始時
からの時間、縦軸は基板温度を表す。SiC基板を基板
保持台に保持し、基板を500℃に加熱する。処理容器
内にH2 ガスをキャリアガスとしてトリメチルガリウム
(TMGa)とアンモニア(NH3 )を導入し約30n
mのGaNバッファ層を形成する。TMGaの供給を停
止し基板温度が1030℃になるまで加熱する。
FIG. 6 shows the time change of the substrate temperature during the growth of the GaN layer and the supply timing of the source gas. The horizontal axis represents the time from the start of growth, and the vertical axis represents the substrate temperature. The SiC substrate is held on a substrate holder and the substrate is heated to 500 ° C. About 30 n of trimethylgallium (TMGa) and ammonia (NH 3 ) were introduced into the processing container using H 2 gas as a carrier gas.
m GaN buffer layer is formed. The supply of TMGa is stopped, and heating is performed until the substrate temperature reaches 1030 ° C.

【0017】基板温度が1030℃になると再びTMG
aを供給し、GaN層を成長させる。所望の厚さのGa
N層が形成されるとTMGaの供給及び基板の加熱を停
止する。基板温度が約500℃まで低下するとNH3
供給を停止する。
When the substrate temperature reaches 1030 ° C., TMG is again generated.
a is supplied to grow a GaN layer. Ga of desired thickness
When the N layer is formed, the supply of TMGa and the heating of the substrate are stopped. When the substrate temperature drops to about 500 ° C., the NH 3 supply is stopped.

【0018】サファイア基板を用いた場合には、図6に
示す条件で良好なGaN層を形成することができる。し
かし、SiC基板上に形成されたGaN層を顕微鏡で観
察したところ、層内に隙間が多く見られた。また、Si
C基板表面には、小さな結晶粒が観察された。
When a sapphire substrate is used, a good GaN layer can be formed under the conditions shown in FIG. However, when the GaN layer formed on the SiC substrate was observed with a microscope, many gaps were seen in the layer. Also, Si
Small crystal grains were observed on the surface of the C substrate.

【0019】顕微鏡による観察結果から、図6に示す方
法によるGaN層の成長過程は以下のように推察でき
る。図7は、GaN層の成長過程を説明するための基板
断面図を示す。基板温度500℃でTMGaとNH3
供給すると、図7(A)に示すようにSiC基板7の表
面に小さな結晶粒8が堆積する。基板温度を1030℃
に上昇してTMGaとNH3 を供給すると、図7(B)
に示すように結晶粒が成長する。さらに成長を続ける
と、図7(C)に示すように、特定の結晶粒9aのみが
大きく成長すると考えられる。
From the observation result with the microscope, the growth process of the GaN layer by the method shown in FIG. 6 can be inferred as follows. FIG. 7 is a substrate cross-sectional view for explaining the growth process of the GaN layer. When TMGa and NH 3 are supplied at a substrate temperature of 500 ° C., small crystal grains 8 are deposited on the surface of the SiC substrate 7 as shown in FIG. 7 (A). Substrate temperature is 1030 ℃
As shown in FIG. 7B, when TMGa and NH 3 are supplied to
Crystal grains grow as shown in FIG. When the growth is further continued, it is considered that only the specific crystal grain 9a grows large, as shown in FIG. 7 (C).

【0020】図7(D)に示すように、特定の結晶粒9
aが横方向に成長して形成されたGaNの塊9bによっ
て基板表面が覆われるものと考えられる。このとき、基
板表面の小さな結晶粒8の隙間が完全には埋まらず、G
aN層内に隙間が形成されるものと考えられる。
As shown in FIG. 7D, specific crystal grains 9
It is considered that the substrate surface is covered with the GaN lump 9b formed by lateral growth of a. At this time, the gap between the small crystal grains 8 on the substrate surface is not completely filled, and G
It is considered that a gap is formed in the aN layer.

【0021】次に、図2、図3を参照して、本発明の実
施例について説明する。使用したMOCVD装置は図1
に示すものと同様のものである。(0001)面が表出
したSiC基板を洗浄し乾燥させた後、基板表面の酸化
と酸化膜除去とを繰り返し実行し、清浄な表面を露出さ
せる。このSiC基板を図1に示すMOCVD装置の基
板保持台2に取り付け、圧力40Torrの水素雰囲気
中で1100℃、10分間の熱処理を行う。その後、基
板温度を500℃まで低下させ、GaNがエピタキシャ
ル成長しない温度とする。
Next, an embodiment of the present invention will be described with reference to FIGS. The MOCVD equipment used is shown in Fig. 1.
It is similar to that shown in. After cleaning and drying the SiC substrate with the exposed (0001) plane, oxidation of the substrate surface and removal of the oxide film are repeatedly performed to expose a clean surface. This SiC substrate is attached to the substrate holder 2 of the MOCVD apparatus shown in FIG. 1, and heat treatment is performed at 1100 ° C. for 10 minutes in a hydrogen atmosphere at a pressure of 40 Torr. Then, the substrate temperature is lowered to 500 ° C. so that GaN does not grow epitaxially.

【0022】図2は、GaN層成長中の基板温度の時間
変化及び原料ガスの供給時期を示す。処理容器1内の圧
力が200Torrになるようにキャリアガスとして水
素を流し、原料ガスとして流量0.5sccmのTMG
aと流量4slmのNH3 とを供給する。キャリアガス
及び原料ガスを流しながら基板温度を1030℃まで徐
々に上昇させ、GaNがエピタキシャル成長する温度と
する。基板温度の上昇速度は、約35℃/分である。こ
の条件におけるGaN層の成長速度は約2μm/hであ
る。
FIG. 2 shows the time variation of the substrate temperature during the growth of the GaN layer and the supply timing of the source gas. Hydrogen is flown as a carrier gas so that the pressure in the processing container 1 is 200 Torr, and TMG having a flow rate of 0.5 sccm is used as a source gas.
a and NH 3 with a flow rate of 4 slm are supplied. The substrate temperature is gradually raised to 1030 ° C. while flowing the carrier gas and the raw material gas to a temperature at which GaN is epitaxially grown. The substrate temperature rising rate is about 35 ° C./min. The growth rate of the GaN layer under this condition is about 2 μm / h.

【0023】基板温度が1030℃に達すると、この温
度を維持しGaN層の成長を行う。所望の厚さのGaN
層が形成された後、TMGaの供給を停止し、基板温度
を徐々に低下させる。基板温度が500℃になったとこ
ろでNH3 の供給を停止する。
When the substrate temperature reaches 1030 ° C., this temperature is maintained and the GaN layer is grown. GaN of desired thickness
After the layer is formed, the supply of TMGa is stopped and the substrate temperature is gradually lowered. The supply of NH 3 is stopped when the substrate temperature reaches 500 ° C.

【0024】図2に示す条件で形成した厚さ約2μmの
GaN層を干渉顕微鏡で観察したところ、10×10m
2 以上の領域にわたって隙間の発生はなく表面は鏡面
であった。また、X線回折によりGaN層はc軸配向し
ていることがわかった。このときのGaN層の成長過程
は、以下のように推察される。
When a GaN layer having a thickness of about 2 μm formed under the conditions shown in FIG. 2 is observed with an interference microscope, it is 10 × 10 m.
No gap was generated over the area of m 2 or more, and the surface was a mirror surface. Further, it was found by X-ray diffraction that the GaN layer was c-axis oriented. The growth process of the GaN layer at this time is presumed as follows.

【0025】図3は、GaN層の成長過程を説明するた
めの基板断面図を示す。基板温度500℃でTMGaと
NH3 を供給すると、GaNはエピタキシャル成長しな
いため、図3(A)に示すようにSiC基板7の表面に
小さな結晶粒8が堆積する。基板温度を徐々に上昇させ
ると、図3(B)に示すように各結晶粒8が徐々に成長
する。このとき、温度上昇が緩やかであるため、特定の
結晶粒のみが大きく成長することなく、各結晶粒が平均
的に成長するものと考えられる。
FIG. 3 is a sectional view of the substrate for explaining the growth process of the GaN layer. When TMGa and NH 3 are supplied at a substrate temperature of 500 ° C., GaN does not grow epitaxially, so that small crystal grains 8 are deposited on the surface of the SiC substrate 7 as shown in FIG. When the substrate temperature is gradually raised, each crystal grain 8 gradually grows as shown in FIG. At this time, since the temperature rise is gradual, it is considered that each crystal grain grows on average without the particular crystal grain growing large.

【0026】さらに成長が進むと、図3(C)に示すよ
うに、結晶粒8が表面全体を覆いGaN層10が形成さ
れる。基板温度がGaNのエピタキシャル成長温度まで
上昇すると、図3(D)に示すようにGaN層10の上
にさらにGaN層が層状にエピタキシャル成長すると考
えられる。このように、GaN層が層状に堆積するた
め、隙間がなく表面が鏡面のGaN層を得ることができ
るものと考えられる。
As the growth progresses further, as shown in FIG. 3C, the crystal grains 8 cover the entire surface and a GaN layer 10 is formed. When the substrate temperature rises to the epitaxial growth temperature of GaN, it is considered that a GaN layer is further epitaxially grown in layers on the GaN layer 10 as shown in FIG. 3 (D). Thus, since the GaN layers are deposited in layers, it is considered that a GaN layer having a mirror surface with no gap can be obtained.

【0027】上記考察から、GaN層成長開始時の基板
温度は、SiC表面上にエピタキシャル成長せず多結晶
が形成される温度であることが好ましく、GaN層が層
状に成長するときにはエピタキシャル成長する程度の温
度とすることが好ましいと考えられる。従って、成長開
始時の基板温度は、GaN層がエピタキシャル成長する
温度よりも約300℃以上低くすることが好ましいであ
ろう。
From the above consideration, it is preferable that the substrate temperature at the start of the growth of the GaN layer is a temperature at which a polycrystal is formed without epitaxial growth on the SiC surface, and a temperature at which the GaN layer grows epitaxially when grown in layers. It is considered preferable to set Therefore, it is preferable that the substrate temperature at the start of growth is about 300 ° C. or more lower than the temperature at which the GaN layer is epitaxially grown.

【0028】また、図3(B)から図3(C)の成長過
程で、特定の結晶粒のみが大きく成長しないようにする
ためには、基板温度を徐々に上昇させる必要がある。図
2では、温度上昇速度が約35℃/分である場合を示し
たが、20℃/分〜100℃/分程度の温度上昇速度が
好適であろう。
In the growth process of FIGS. 3B to 3C, it is necessary to gradually raise the substrate temperature in order to prevent only specific crystal grains from growing large. Although FIG. 2 shows the case where the temperature rising rate is about 35 ° C./minute, a temperature rising rate of about 20 ° C./minute to 100 ° C./minute may be suitable.

【0029】図2では、基板温度をほぼ一定の速度で上
昇させる場合を示したが、温度上昇速度は必ずしも一定
である必要はない。例えば、温度の変化率が一定になる
ように時間に対して双曲線にそって温度を上昇させても
よいであろう。また、階段状に温度を上昇させてもよい
であろう。
Although FIG. 2 shows the case where the substrate temperature is raised at a substantially constant rate, the temperature rising rate does not necessarily have to be constant. For example, the temperature could be increased along a hyperbola with time so that the rate of change of temperature is constant. Also, the temperature may be increased stepwise.

【0030】図4は、基板温度を階段状に上昇させる場
合の基板温度の時間変化及び原料ガスの供給時期を示
す。図4に示すように、基板温度を500℃から103
0℃まで、階段状に温度を上昇させている。なお、図4
では温度を急激に上昇させる期間、TMGaの供給を一
時停止している場合を示しているが、TMGaを連続的
に供給してもよい。
FIG. 4 shows the time change of the substrate temperature and the supply timing of the source gas when the substrate temperature is raised stepwise. As shown in FIG. 4, the substrate temperature is changed from 500 ° C. to 103 ° C.
The temperature is increased stepwise up to 0 ° C. Note that FIG.
In the above, the case where the supply of TMGa is temporarily stopped during the period in which the temperature is rapidly raised is shown, but TMGa may be supplied continuously.

【0031】このように、GaN層の成長開始温度とエ
ピタキシャル成長温度との間に少なくとも1つの階段状
部分を設けることにより、特定の結晶粒のみが大きく成
長することを抑制でき、良好なGaN層を得ることがで
きると考えられる。
As described above, by providing at least one step-like portion between the growth start temperature of the GaN layer and the epitaxial growth temperature, it is possible to suppress large growth of only specific crystal grains, and to form a good GaN layer. It seems that you can get it.

【0032】上記実施例では、GaN層を成長させる場
合を説明したが、上記成長方法はGa1-x-y Alx In
y N層(0≦x≦0.2、0≦y≦0.3)を成長させ
る場合にも適用できるであろう。III族元素としてA
lもしくはInを添加することにより、バンドギャップ
が変化する。従って、発光素子として使用する場合に
は、発光波長を変化させることができる。
In the above embodiment, the case of growing a GaN layer has been described, but the growth method is Ga 1 -xy Al x In.
could also be applied when growing y N layer (0 ≦ x ≦ 0.2,0 ≦ y ≦ 0.3). A as group III element
The band gap is changed by adding 1 or In. Therefore, when used as a light emitting element, the emission wavelength can be changed.

【0033】次に、本発明の他の実施例について説明す
る。上記実施例ではバッファ層としてGaNの多結晶層
を用いたが、本実施例ではAlN層を用いる。まず、S
iC基板上に、原料ガスとしてトリメチルアルミニウム
(TMAl)とアンモニア(NH3 )を使用し、MOC
VDにより厚さ約30nmのAlN層を形成する。成長
時の基板温度は約1150℃である。次に、基板温度を
1030℃とし、原料ガスとしてTMGaとNH3 を使
用したMOCVDにより厚さ約2μmのGaN層を形成
する。
Next, another embodiment of the present invention will be described. Although a polycrystal layer of GaN is used as the buffer layer in the above-mentioned embodiment, an AlN layer is used in this embodiment. First, S
On the iC substrate, trimethyl aluminum (TMAl) and ammonia (NH 3 ) are used as source gases, and MOC
An AlN layer having a thickness of about 30 nm is formed by VD. The substrate temperature during growth is about 1150 ° C. Next, the substrate temperature is set to 1030 ° C., and a GaN layer having a thickness of about 2 μm is formed by MOCVD using TMGa and NH 3 as source gases.

【0034】このように、バッファ層としてAlN層を
用いることにより、隙間のない良好なGaN層を形成す
ることができた。X線回折により、このGaN層はc軸
配向していることが確認された。この場合のGaN層の
成長の過程は以下のように推察される。
Thus, by using the AlN layer as the buffer layer, it was possible to form a good GaN layer with no gap. It was confirmed by X-ray diffraction that the GaN layer was c-axis oriented. The process of growth of the GaN layer in this case is presumed as follows.

【0035】図5は、SiC基板上にAlN層、つづい
てGaN層が成長する過程を説明するための基板断面図
を示す。図5(A)に示すように、SiC基板7の上に
AlN層11が形成される。AlN層11は、SiC基
板7の表面上に比較的均一に成長すると考えられる。A
lN層11の上に1030℃でGaN層を堆積すると、
まず、図5(B)に示すように小さい結晶粒12が形成
される。成長を続けると、図5(C)に示すように結晶
粒12が横方向に成長し結晶粒同士がつながると考えら
れる。
FIG. 5 is a substrate cross-sectional view for explaining a process of growing an AlN layer and then a GaN layer on a SiC substrate. As shown in FIG. 5A, an AlN layer 11 is formed on the SiC substrate 7. It is considered that the AlN layer 11 grows relatively uniformly on the surface of the SiC substrate 7. A
When a GaN layer is deposited on the 1N layer 11 at 1030 ° C.,
First, small crystal grains 12 are formed as shown in FIG. It is considered that when the growth is continued, the crystal grains 12 grow laterally as shown in FIG. 5C and the crystal grains are connected to each other.

【0036】さらに成長を続けると、図5(D)に示す
ようにほとんどの結晶粒がつながりGaN層12aにな
る。その後、GaN層12aの上に層状に成長が進み、
図5(E)に示すように隙間がなく表面が鏡面のGaN
層12bが形成されると考えられる。
When the growth is further continued, as shown in FIG. 5D, most of the crystal grains are connected to form the GaN layer 12a. After that, the growth proceeds in layers on the GaN layer 12a,
As shown in FIG. 5 (E), there is no gap and the surface has a mirror-finished GaN.
It is believed that layer 12b is formed.

【0037】上記他の実施例では、バッファ層としてA
lN層を用いる場合を説明したが、III族元素として
Alを含み、V族元素がNであり、III族元素中のA
lの組成比が0.5以上であるIII−V族化合物半導
体層をバッファ層として使用しても同様の効果が得られ
ると考えられる。また、AlN層の上に、GaN層の代
わりにGa1-x-y Alx Iny N層(0≦x≦0.2、
0≦y≦0.3)を形成する場合にも同様の効果が期待
できるであろう。
In the other embodiments described above, A is used as the buffer layer.
Although the case where the 1N layer is used has been described, Al is contained as the group III element, the group V element is N, and A in the group III element is used.
It is considered that the same effect can be obtained by using a III-V group compound semiconductor layer having a composition ratio of 1 of 0.5 or more as a buffer layer. Further, on the AlN layer, instead of the GaN layer, a Ga 1-xy Al x In y N layer (0 ≦ x ≦ 0.2,
The same effect can be expected when 0 ≦ y ≦ 0.3) is formed.

【0038】バッファ層としてAlN層を用いた積層構
造において、SiC基板の裏面とGaN層の表面にIn
を接触させて電極とし、厚さ方向の導電性を確認でき
た。また、バッファ層として多結晶GaN層を用いる場
合にも導電性を有することは当業者に自明であろう。上
記実施例のように、基板としてSiCを用いれば基板自
体が導電性を有するため、基板裏面から電極を取り出す
ことができる。
In the laminated structure using the AlN layer as the buffer layer, In is formed on the back surface of the SiC substrate and the front surface of the GaN layer.
Was contacted to form an electrode, and the conductivity in the thickness direction was confirmed. It will be apparent to those skilled in the art that even when a polycrystalline GaN layer is used as the buffer layer, it has conductivity. If SiC is used as the substrate as in the above embodiment, the substrate itself has conductivity, and therefore the electrode can be taken out from the back surface of the substrate.

【0039】また、SiC基板として、{0001}、
{10−10}、{11−20}面のうち少なくとも1
つの面に垂直な面が表出した上面を有する基板を用いる
ことにより、上面に垂直な面で劈開することができる。
GaN層をレーザダイオードに適用する場合には、基板
の劈開を利用することにより、容易にレーザ共振器を作
製することができる。
As the SiC substrate, {0001},
At least one of {10-10} and {11-20} planes
By using the substrate having the upper surface in which the surface perpendicular to the two surfaces is exposed, the cleavage can be achieved in the surface perpendicular to the upper surface.
When the GaN layer is applied to the laser diode, the laser resonator can be easily manufactured by utilizing the cleavage of the substrate.

【0040】以上実施例に沿って本発明を説明したが、
本発明はこれらに制限されるものではない。例えば、種
々の変更、改良、組み合わせ等が可能なことは当業者に
自明であろう。
The present invention has been described above with reference to the embodiments.
The present invention is not limited to these. For example, it will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.

【0041】[0041]

【発明の効果】以上説明したように、本発明によれば、
SiC基板の上に高品質なGaAlInN層を得ること
ができる。SiC基板は導電性を有するため、基板の裏
面から電極を取り出すことができる。このため、チップ
面積を縮小することが可能になる。また、SiCは劈開
性を有するため、劈開により、レーザ共振器を容易に作
製することができる。GaAlInN層のレーザダイオ
ードへの応用が可能になり、青色から紫外領域の発光素
子の実現が期待される。
As described above, according to the present invention,
A high quality GaAlInN layer can be obtained on the SiC substrate. Since the SiC substrate has conductivity, the electrodes can be taken out from the back surface of the substrate. Therefore, the chip area can be reduced. Moreover, since SiC has a cleavage property, a laser resonator can be easily manufactured by cleavage. The GaAlInN layer can be applied to a laser diode, and it is expected to realize a light emitting element in the blue to ultraviolet region.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例で使用したMOCVD装置の概
略断面図である。
FIG. 1 is a schematic sectional view of an MOCVD apparatus used in an example of the present invention.

【図2】本発明の実施例によるGaN層成長方法におけ
る基板温度の時間変化及び原料の供給時期を示すグラフ
である。
FIG. 2 is a graph showing a time change of a substrate temperature and a material supply timing in a GaN layer growth method according to an embodiment of the present invention.

【図3】本発明の実施例によるGaN層の成長過程を説
明するための基板の断面図である。
FIG. 3 is a cross-sectional view of a substrate illustrating a growth process of a GaN layer according to an exemplary embodiment of the present invention.

【図4】本発明の実施例によるGaN層成長方法におい
て、基板温度の上昇を階段状にした場合の基板温度の時
間変化及び原料の供給時期を示すグラフである。
FIG. 4 is a graph showing a time change of a substrate temperature and a supply time of a raw material when the substrate temperature rises stepwise in the GaN layer growth method according to the embodiment of the present invention.

【図5】本発明の他の実施例によるGaN層の成長過程
を説明するための基板の断面図である。
FIG. 5 is a cross-sectional view of a substrate illustrating a growth process of a GaN layer according to another embodiment of the present invention.

【図6】SiC基板状にGaN層を成長させる予備実験
における基板温度の時間変化及び原料の供給時期を示す
グラフである。
FIG. 6 is a graph showing a time change of a substrate temperature and a material supply timing in a preliminary experiment for growing a GaN layer on a SiC substrate.

【図7】図6に示す予備実験におけるGaN層の成長過
程を説明するための基板の断面図である。
FIG. 7 is a cross-sectional view of a substrate for explaining a GaN layer growth process in the preliminary experiment shown in FIG.

【符号の説明】[Explanation of symbols]

1 処理容器 2 基板保持台 3 高周波コイル 4 原料ガス導入管 5 パージ用ガス導入管 6 ガス排気管 7 SiC基板 8、12 結晶粒 9a、9b GaNの塊 10、12a、12b GaN層 11 AlN層 DESCRIPTION OF SYMBOLS 1 Processing container 2 Substrate holding stand 3 High frequency coil 4 Raw material gas introduction pipe 5 Purging gas introduction pipe 6 Gas exhaust pipe 7 SiC substrate 8, 12 Crystal grains 9a, 9b GaN mass 10, 12a, 12b GaN layer 11 AlN layer

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 上面を有するSiC基板を準備する工程
と、 前記SiC基板の温度を第1の温度から、該第1の温度
よりも300℃以上高い第2の温度まで徐々に上昇させ
ながら、前記SiC基板の上面にGa1-x-y Alx In
y N層(0≦x≦0.2、0≦y≦0.3)を堆積する
工程と、 前記SiC基板の温度を前記第2の温度に維持したま
ま、前記Ga1-x-y Al x Iny N層の上に他のGa
1-i-j Ali Inj N層(0≦i≦0.2、0≦j≦
0.3)を堆積する工程とを含む半導体装置の製造方
法。
1. A step of preparing a SiC substrate having an upper surface.
And changing the temperature of the SiC substrate from the first temperature to the first temperature.
Gradually increase to a second temperature, which is 300 ° C higher than
On the upper surface of the SiC substrate, Ga1-xyAlxIn
yDeposit N layer (0 ≦ x ≦ 0.2, 0 ≦ y ≦ 0.3)
And, maintaining the temperature of the SiC substrate at the second temperature.
Well, the Ga1-xyAl xInyOther Ga on N layer
1-ijAliInjN layers (0 ≦ i ≦ 0.2, 0 ≦ j ≦
A method of manufacturing a semiconductor device including the step of depositing 0.3).
Law.
【請求項2】 前記SiC基板は、{0001}、{1
0−10}、{11−20}面のうち少なくとも1つの
面に垂直な面が表出した上面を有する請求項1に記載の
半導体装置の製造方法。
2. The SiC substrate comprises {0001}, {1}
The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device has an upper surface having a surface perpendicular to at least one of the 0-10} and {11-20} surfaces.
【請求項3】 上面を有するSiC基板を準備する工程
と、 前記SiC基板の上に、III族元素としてAlを含
み、V族元素がNであり、III族元素中のAlの組成
比が0.5以上であるIII−V族化合物半導体層を堆
積する工程と、 前記III−V族化合物半導体層の上に、Ga1-x-y
x Iny N層(0≦x≦0.2、0≦y≦0.3)を
エピタキシャル成長させる工程とを含む半導体装置の製
造方法。
3. A step of preparing a SiC substrate having an upper surface, wherein Al is included as a group III element, the group V element is N, and the composition ratio of Al in the group III element is 0 on the SiC substrate. A step of depositing a III-V group compound semiconductor layer of 0.5 or more; and Ga 1-xy A on the III-V group compound semiconductor layer.
a step of epitaxially growing an l x In y N layer (0 ≦ x ≦ 0.2, 0 ≦ y ≦ 0.3).
【請求項4】 前記化合物半導体層のIII族元素中の
Alの組成比が1である請求項3に記載の半導体装置の
製造方法。
4. The method for manufacturing a semiconductor device according to claim 3, wherein the composition ratio of Al in the group III element of the compound semiconductor layer is 1.
【請求項5】 前記SiC基板は、{0001}、{1
0−10}、{11−20}面のうち少なくとも1つの
面に垂直な面が表出した上面を有する請求項3または4
に記載の半導体装置の製造方法。
5. The SiC substrate comprises {0001}, {1}
The surface perpendicular to at least one of the 0-10} and {11-20} planes has an exposed upper surface.
A method of manufacturing a semiconductor device according to item 1.
【請求項6】 SiC基板と、 前記SiC基板の上に形成され、III族元素としてA
lを含み、V族元素がNであり、III族元素中のAl
の組成比が0.5以上であるIII−V族化合物半導体
層と、 前記III−V族化合物半導体層の上に形成されたGa
1-x-y Alx Iny N層(0≦x≦0.2、0≦y≦
0.3)とを有する半導体装置。
6. A SiC substrate and A formed as a group III element formed on the SiC substrate.
Al in the group III element containing l, the group V element being N
III-V compound semiconductor layer having a composition ratio of 0.5 or more, and Ga formed on the III-V compound semiconductor layer.
1-xy Al x In y N layer (0 ≦ x ≦ 0.2, 0 ≦ y ≦
0.3).
JP06101595A 1995-03-20 1995-03-20 Manufacturing method of semiconductor device Expired - Lifetime JP3654307B2 (en)

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JP2011187965A (en) * 1998-07-31 2011-09-22 Sharp Corp Nitride semiconductor structure, method of manufacturing the same, and light emitting element
JP2005167099A (en) * 2003-12-04 2005-06-23 Shigeya Narizuka Semiconductor device and its manufacturing method
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