JP2975910B2 - Method of manufacturing discrete substrate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a discrete substrate having a two-layer structure in which one surface is a diffusion layer and the other surface is a non-diffusion layer whose surface is polished, and more particularly to a transistor. The present invention relates to a method for controlling dislocations in a non-diffusion layer generated in a diffusion step when a discrete substrate such as a diode is manufactured by diffusing a material wafer.

[0002]

[Prior art]

Conventional method (1) A conventional method of manufacturing a discrete substrate will be briefly described with an example of a transistor. A minimum material wafer thickness is determined by adding a machining allowance to a product thickness. (A) Diffusion method Forming a diffusion layer of a required depth from both sides (B) completely removing the diffusion layer on one side of the wafer by grinding means;
Polishing and Finishing (C) A discrete substrate having a predetermined diffusion layer thickness (referred to as Xj) and a polished surface having a predetermined non-diffusion layer thickness (referred to as Xi) has been manufactured. In many examples of the diode, the steps from (A) to (C) are basically the same, although there are differences in the thickness of the diffusion layer, the degree of finish of the non-diffusion surface, the thickness, and the like.

Conventional method (2) In the conventional method (1), one of the diffusion layers formed on both surfaces of the wafer is removed by grinding and polishing, and as a result, half of the diffusion process is wasted. The following method has recently been adopted because of the fact that it is an example of a transistor. In this method, a diffusion layer is formed in the same manner from both sides of a wafer having a thickness approximately twice that of the conventional method (1) as a material wafer, and then the wafer is divided into two parts from the center in the wafer thickness direction. In this method, two cut substrates are manufactured by grinding and polishing the cut surface.

[0004] Even if two discrete substrates are obtained, a thick wafer is originally used, and it seems that this does not seem to lead to a reduction in raw materials at first glance. It is a method that should be taken into consideration, and that the reduction of raw materials is surely ensured throughout the entire process from the material (ingot) at that time to the completion of the product (discrete substrate). As described above, the conventional methods (1) and (2) have been described. In any case, the thickness of the wafer of the material before diffusion is naturally the thickness of the product (thickness of the discrete substrate). In order to reduce the amount of raw materials, the minimum possible machining cost (and consequently, chips) up to that point was added to make the thickness of the material wafer.

[0005]

When a discrete substrate is manufactured by a diffusion method, a high temperature (for example, 1280 ° C.) and a long time (for example,
(165 hours). When this heat treatment is performed, phosphorus and boron, which are typical N-type and P-type impurities for forming a diffusion layer, also have a smaller atomic radius than that of silicon, and a contraction force is generated in the diffusion layer to cause non-diffusion. To create stress in a layer. (Similar stress is generated also in the diffusion layer, but the subject of the present invention is directed to the non-diffusion layer, and hence the diffusion layer will not be referred to hereinafter.) When the wafer is taken in and out of the diffusion furnace, Due to the special circumstance that the groups are in close contact with each other, the temperature difference between the outer peripheral portion and the central portion of the wafer becomes larger, especially in the case of a wafer having a certain thickness or more, and thermal stress is generated in the non-diffusion layer. Dislocations necessarily occur in the undiffused layer of the wafer for one or both of these main reasons. The dislocations existing in the non-diffusion layer have a great effect on the electrical characteristics of the device when it finally becomes a device.

In general, it is said that when a dislocation becomes a final device, the dislocation serves as a gathering place of contaminants and deteriorates electrical characteristics such as withstand voltage. Accordingly, there is a tendency to require a substrate having a lower dislocation density. On the other hand, a substrate having a higher level of dislocation density is required from the aspect that the (uniform) presence of the dislocation can improve the high frequency characteristics. In some cases, the purpose of use of the discrete substrate is quite diverse. As described above, the requirement of the dislocation level is not uniform, and the manufacturing side is required to manufacture at the dislocation level according to the required characteristics of the final product.

However, with regard to the dislocation level, only when a dislocation lower than the conventional one is targeted, the lap-finished wafer is used, and the dislocation is absorbed and reduced to some extent by the gettering effect of substantially uniform processing strain. Although it is possible to use such a means, if a crystal having a dislocation density close to a defect-free crystal having a dislocation density of almost 0 is required, or a method of adjusting the level to the level required for each request is used in the next step, the diffusion step, as described above. It is impossible to cope with the factor (1) regarding the dislocation, and the dislocation generated after the diffusion has a serious problem that the desired characteristics cannot be obtained when the final element is obtained, so to speak. The present invention has been made in view of the above circumstances, and has as its object to provide a manufacturing method that can be freely adjusted to a required dislocation density level for a discrete substrate having a low dislocation density.

[0008]

In order to achieve the above object, the present invention provides a method for manufacturing a discrete substrate having a dislocation density of 5,000 or less per cm ^{2 which} is generally called a low level of dislocation density. Based on the characteristics of the final device, the thickness of the material wafer before diffusion is adjusted (determined) within a certain range so as to be able to cope with different dislocation levels required individually. Means that can easily produce a discrete substrate having a target dislocation density. More specifically, the thickness (T) of the material wafer is represented by T = 2Xj + Xi + α. Since the diffusion layer is formed from both surfaces of the wafer (only one surface cannot be formed at present), at least one discrete substrate is required. In order to obtain the material wafer thickness, a minimum thickness of (2Xj + Xi) is required, and α added thereto is an adjustment allowance for determining the material wafer thickness. From the expected low dislocation density of 330 μm, which is referred to as above, the limit value at which no slip (described later) can be confirmed to be 930 μm
This is a manufacturing method in which the objective is achieved (attainment of the target numerical value) by determining in accordance with the required dislocation density within the range of m, adjusting the thickness of the material wafer in advance, and entering the diffusion step. It is to be noted that the most reliable method for determining the adjustment margin α is basically based on the Xj value (diffusion depth or diffusion layer thickness) or from a diagram confirmed (experimented) in advance.

The thickness of the material wafer before diffusion and the dislocation generated at that time, which are the basis of the above means, will be described with reference to the conceptual diagram of FIG.
Xj, the thickness of the non-diffusion layer when the substrate becomes a discrete substrate is Xi, and the thickness of a part of the central non-diffusion layer is α, FZ method, N-type , <11
1>, under the same specified diffusion conditions for 100φ wafers,
The graph shows a change in the dislocation density on the surface of the non-diffusion layer when the value of α is changed using Xj, which is the largest factor for determining the density of generated dislocations, as a parameter. Xj (diffusion depth) is conceptually regarded as “shallow”, “intermediate”, or “deep”, and is here changed to shallow (Xj <120)
μm), middle one (120 μm ≦ Xj <250), deep one (Xj ≧ 250 μm), and as typical examples thereof, a curve (80 μm), a curve (170 μm), and a curve (300 μm)
m) shows three examples. It can be seen that the dislocation density is significantly reduced by increasing the value of α (thickening the material wafer) as the diffusion depth increases. However, when the thickness of the material wafer is unilaterally increased, another problem as described below occurs.

[0010] The diffusion layer required for the substrate for the discrete is usually deep and must be processed at a high temperature for a long time. Therefore, considering the cost, naturally, the number of sheets to be prepared per batch in the diffusion furnace is large. It is desired that the wafers are prepared in a special state in which the wafers are in close contact with each other via a buffer (quartz powder or the like). Therefore, unlike a state in which a plurality of wafers to be subjected to normal heat treatment are taken in and out of the diffusion furnace in a state where the wafers are arranged at regular intervals.
The temperature difference between the center and the outer periphery of the wafer increases, and thermal stress is generated. As a result, the occurrence of dislocations (slips) in another form that continues on a straight line becomes more pronounced as the material wafer thickness exceeds about 1400 μm. Because it goes. This is shown by the curve in the figure. (However, in FIG. 1, the slip is partially concentrated and is hardly converted into a numerical value, so it is shown only in terms of strength.) The above is the reason why the α value in the present invention is within a certain range, and the determination of the α value The reason is that the dislocation density after the completion of diffusion, that is, the dislocation density counted on the surface of the non-diffusion layer when the substrate becomes a discrete substrate, can be freely controlled by (determination of the thickness of the material wafer).

Further, the means according to the second aspect of the present invention is characterized in that, when the diffusion layer thickness (Xj) is less than the lower limit value of 120 μm, dislocations are generated as shown by an example of a curve (90 μm) in FIG. Since it is originally small, the effect obtained even when the wafer thickness is increased is small. Therefore, the lower limit of Xj is set to 120 μm, the upper limit is set to a practically diffusible depth of 450 μm, and the lower limit is set to 20 μm for the practical Xi layer. It shows a typical range.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a discrete substrate according to the present invention will be described below. [Example 1] A substrate having a typical diameter as a substrate for discrete
In the embodiment of 100φ wafer, product specifications are FZ method, N type,
<111>, 30-40 Ω · cm, Xj = 170 μm, Xi =
An example in which the dislocation density is required to be 300 / cm ² or less at 50 μm will be described. In addition, the material wafer (before diffusion) originally uses a wafer that has been subjected to a surface finishing having a processing distortion called to suppress the generation of dislocation, that is, a lapping finished wafer.
For the required dislocation density standard, the determination of the α value in [Example 1] is based on past actual data (α = 600 µm).
Was set, and the results were also satisfactory. However, for reference, the results of Reference a and Reference b where α was set to the upper and lower limits thereof are also shown in Table 1 as a comparative example. In the example of adoption, the dislocation is remarkably reduced only by increasing the thickness of the material wafer by 270 μm as compared with the reference (a), and the required dislocation density is “300
cm ² or less ”can be sufficiently satisfied. Reference (b) is a case where the thickness of the material wafer is increased by 330 μm from the adopted example. Although the standard is sufficiently satisfied,
Dislocations are scarcely observed under a microscope, and can be said to be a special case adopted when an Xi layer close to a perfect crystal is required, but are not adopted in [Example 1] because other purposes directly lead to an increase in cost. . Regarding the setting of the α value, in the case of a new product specification that cannot be estimated from past results or the like, in addition to Xj (diffusion depth), the ingot manufacturing method (F
(Z method or CZ method), aperture, resistivity, conductivity type (N type or P type), etc., have been confirmed to be more subtly affected, and it is the most robust method to check in advance. .

[Embodiment 2] An embodiment of a wafer having a diameter of 125φ as a substrate for discrete use is designed by the FZ method.
N-type, <111>, 50-65Ω · cm, Xj = 180 μm,
An example is shown in which Xi = 70 μm and the dislocation density is required in the range of 1000 / cm ² ± 15%. In the same manner as described above, the material wafer (before diffusion) originally uses a wafer which has been subjected to a surface finishing having a processing distortion which is said to suppress generation of dislocation, ie, a lapping finished wafer. Also, as in [Example 1],
Examples in which the value of α of the present invention is intentionally set to the upper and lower limits are also shown in Table 1 for reference (a) and reference (b) for comparison. In the adoption example, dislocations are remarkably reduced only by increasing the thickness of the material wafer by 250 μm as compared to the reference (a), and the required dislocation density of “1000 / cm ² ± 15%” is sufficiently satisfied. And reference (b) shows the case where the thickness of the material wafer was increased by 350 μm from the adopted example. Although the specification was sufficiently satisfied, dislocations were hardly observed under a microscope, and Xi was close to a perfect crystal. It can be said that this is a special case that is adopted when a layer is required, but the cost is increased for other purposes.
Is the same as

[0014]

[Table 1]

As can be seen from [Example 1] and [Example 2], by changing the thickness of the material wafer within a certain range, it is possible to extremely effectively measure the discrete substrate (measured on the surface of the non-diffusion layer). Dislocation density) can be controlled.

[0016]

The method of manufacturing a discrete substrate according to the present invention is directed to a discrete substrate requiring a relatively low level of dislocation density of 5,000 / cm ² by the structure described in claims 1 and 2. In addition, the conventional method, which is considered to be the limit of the low dislocation, covers a level close to defect-free, which cannot be reached by the conventional method, and the thickness of the material wafer is limited within a certain range according to the required dislocation level. It is possible to freely adjust to the level of dislocation density that is easily required only by changing it, and it is possible to sufficiently exhibit the required characteristics when the final element is obtained.

[Brief description of the drawings]

FIG. 1 is a conceptual diagram showing a relationship between a thickness of a material wafer before diffusion and a dislocation density generated at that time.

FIG. 2 is a sectional view of a wafer after diffusion is completed.

[Explanation of symbols]

 Xj: thickness of diffusion layer Xi: thickness of non-diffusion layer α: adjustment allowance T: thickness of material wafer

Claims (2)

(57) [Claims] 1. A method for manufacturing a discrete substrate, which is an intermediate product comprising an undiffused layer (Xi), one surface of which is a diffusion layer (Xj) and the other surface of which is polished, is manufactured by a diffusion method. The dislocation density counted on the surface of the undiffused layer is 50
In the method of manufacturing a discrete substrate of not more than 00 / cm ^2, the thickness (T) (unit μm) of the base wafer before diffusion is represented by the following formula (1), and T = 2Xj + Xi + α (1) 1) The value of α in the expression is determined within the range of 330 ≦ α ≦ 930, and the target dislocation density after diffusion is obtained by adjusting the thickness of the material wafer before diffusion in advance. Substrate manufacturing method. 2. The diffusion layer (Xj) has a value of 120 μm ≦ Xj.
2. The method of claim 1, wherein ≦ 450 μm and the value of the non-diffusion layer (Xi) is 20 μm ≦ Xi.