JP2971993B2 - Multilayer ceramic capacitors - Google Patents

Multilayer ceramic capacitors

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Publication number
JP2971993B2
JP2971993B2 JP3181756A JP18175691A JP2971993B2 JP 2971993 B2 JP2971993 B2 JP 2971993B2 JP 3181756 A JP3181756 A JP 3181756A JP 18175691 A JP18175691 A JP 18175691A JP 2971993 B2 JP2971993 B2 JP 2971993B2
Authority
JP
Japan
Prior art keywords
internal electrode
multilayer ceramic
electrode
inorganic filler
palladium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP3181756A
Other languages
Japanese (ja)
Other versions
JPH053135A (en
Inventor
石川  浩
伸一 岩田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TOOKIN KK
Original Assignee
TOOKIN KK
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Filing date
Publication date
Application filed by TOOKIN KK filed Critical TOOKIN KK
Priority to JP3181756A priority Critical patent/JP2971993B2/en
Publication of JPH053135A publication Critical patent/JPH053135A/en
Application granted granted Critical
Publication of JP2971993B2 publication Critical patent/JP2971993B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、積層セラミックコンデ
ンサに係り、特に内部電極の構造に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer ceramic capacitor, and more particularly to a structure of an internal electrode.

【0002】[0002]

【従来の技術】従来、積層セラミックコンデンサ(以下
コンデンサと称す)は、小型大容量であり、半永久的な
寿命を有し、高周波に於て低抵抗であるなど、その優れ
た特性から広い範囲で使用されており、特に交換機の電
源等に多く使用されている。その製造方法は強誘電体セ
ラミックス粉末を有機バインダと溶剤を用いて混合分散
させてスラリーを得た後、ドクターブレード法等により
一定の厚さのグリーンシートを作成する。そのグリーン
シート上に金(Au)、パラジウム(Pd)、銀(A
g)、銅(Cu)、ニッケル(Ni)などの低抵抗金属
粉末を有機ビヒクルに分散させた金属粉末入りペースト
を、ある一定の形状で交互に外部電極を接続する取り出
し口を得られるようスクリーン印刷を行い、そのグリー
ンシートを打ち抜き、後の外部電極成形の際、コンデン
サの並列構造を取るように積層することにより積層セラ
ミックコンデンサの生チップを得る。その後脱バインダ
した後焼成を行い、内部電極に接続する外部電極を焼付
けてコンデンサ素子を得ている。図5に従来の積層セラ
ミックコンデンサの断面図を示す。積層セラミックコン
デンサは、強誘電体セラミックス1と内部電極2aが交
互に積層された構造であり、内部電極が印刷された部分
と印刷されない部分は、内部電極の厚さ分だけ差を生じ
ること、又焼成の際に内部電極を形成する低抵抗金属と
強誘電体セラミックの収縮率が異なる故、クラックや剥
離を発生し、電気的な短絡の発生や信頼性の点で不十分
な製品となってしまう。そこでコンデンサを構成する強
誘電体セラミックス(以下セラミックスと称す)粉末と
同じセラミックス粉末などの無機質充填材を混入した内
部電極ペーストを用いてコンデンサ素子の形成を行う試
みがなされていたが、内部電極全面の中に無機質充填材
を有するため、又、セラミックスへの内部電極金属の拡
散による電極切れなどにより、等価直列抵抗(以下ES
Rと称す)が増大し、交流電圧が加えられた時リップル
電流を大きくし、コンデンサ素子そのものが発熱し、使
用上で障害を起こしやすいという問題があった。
2. Description of the Related Art Conventionally, multilayer ceramic capacitors (hereinafter referred to as "capacitors") have a wide range of excellent characteristics, such as small size, large capacity, semi-permanent life, and low resistance at high frequencies. It is widely used, especially as a power source for exchanges. In the manufacturing method, a ferroelectric ceramic powder is mixed and dispersed using an organic binder and a solvent to obtain a slurry, and then a green sheet having a constant thickness is formed by a doctor blade method or the like. Gold (Au), palladium (Pd), silver (A
g) A paste containing a metal powder in which a low-resistance metal powder such as copper (Cu), nickel (Ni) or the like is dispersed in an organic vehicle is screened so as to obtain an outlet for alternately connecting external electrodes in a certain shape. Printing is performed, the green sheet is punched out, and when forming the external electrodes later, the capacitors are laminated so as to take a parallel structure of the capacitors, thereby obtaining a raw chip of a multilayer ceramic capacitor. Thereafter, after removing the binder, firing is performed, and the external electrode connected to the internal electrode is baked to obtain a capacitor element. FIG. 5 shows a cross-sectional view of a conventional multilayer ceramic capacitor. The multilayer ceramic capacitor has a structure in which the ferroelectric ceramics 1 and the internal electrodes 2a are alternately laminated, and a difference occurs between a portion where the internal electrodes are printed and a portion where the internal electrodes are not printed by the thickness of the internal electrodes. Since the contraction rate of the low-resistance metal and the ferroelectric ceramic, which form the internal electrodes during firing, differ, cracks and delaminations occur, resulting in products with insufficient electrical shorts and reliability. I will. Therefore, attempts have been made to form a capacitor element using an internal electrode paste mixed with an inorganic filler such as a ceramic powder which is the same as a ferroelectric ceramic (hereinafter referred to as ceramics) powder constituting the capacitor. Has an equivalent series resistance (hereinafter referred to as ES) due to the presence of an inorganic filler in
R) increases, and when an AC voltage is applied, the ripple current increases, and the capacitor element itself generates heat, which causes a problem in use.

【0003】[0003]

【発明が解決しようとする課題】本発明の目的は、この
ような強誘電体セラミックと内部電極の収縮差から生じ
るデラミネーションの発生を減少させ、かつ等価直列抵
抗の小さい信頼性に優れた積層セラミックコンデンサを
提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to reduce the occurrence of delamination caused by a difference in shrinkage between a ferroelectric ceramic and an internal electrode, and to provide a highly reliable laminate having a small equivalent series resistance. It is to provide a ceramic capacitor.

【0004】[0004]

【課題を解決するための手段】本発明は、積層セラミッ
クコンデンサ内部の内部電極の周辺を取り囲むように、
コンデンサ素子を形成する強誘電体セラミックス材と同
一組成の微細なセラミックス粉末を添加混入した内部電
極材と、銀パラジウム等からなる従来と同一の材料の金
属ペーストを、印刷塗布して形成した積層セラミックコ
ンデンサの内部電極としたことを特徴とする。
SUMMARY OF THE INVENTION The present invention provides a multilayer ceramic capacitor which surrounds a periphery of an internal electrode.
A multilayer ceramic formed by printing and applying an internal electrode material mixed with a fine ceramic powder of the same composition as the ferroelectric ceramic material forming the capacitor element, and a metal paste of the same material as the conventional material consisting of silver palladium etc. It is characterized by being used as an internal electrode of a capacitor.

【0005】即ち本発明は、強誘電体セラミックス層と
低抵抗金属からなる内部電極層が交互に積層され、前記
内部電極層が互いに1つおきに異なる外部電極に接続さ
れてなる積層セラミックコンデンサにおいて、内部電極
層の周辺を囲むように、前記内部電極を構成する低抵抗
金属に対し、強誘電体セラミック層を構成するセラミッ
クス粉末を重量比で5%ないし75%添加混練した無機
質充填材入り内部電極を、外部電極取り出し口を除き内
部電極の周辺を囲むように、内部電極端面より200ミ
クロンないし内部電極巾に対し20%以下の巾で形成し
たことを特徴とする積層セラミックコンデンサである。
That is, the present invention relates to a multilayer ceramic capacitor in which ferroelectric ceramic layers and internal electrode layers made of a low-resistance metal are alternately stacked, and the internal electrode layers are connected to different external electrodes every other one. An inorganic filler containing 5% to 75% by weight of a ceramic powder forming a ferroelectric ceramic layer added to a low resistance metal forming the internal electrode so as to surround the inner electrode layer; A multilayer ceramic capacitor characterized in that the electrodes are formed to have a width of 200 microns or less than 20% of the width of the internal electrode from the end surface of the internal electrode so as to surround the periphery of the internal electrode except for the external electrode outlet.

【0006】[0006]

【作用】本発明による積層セラミックコンデンサの内部
電極は、従来の積層セラミックコンデンサの金属のみの
内部電極の周囲に、外部電極への取り出し口を除き、U
字形に金属の内部電極の周囲に、コンデンサを構成して
いる強誘電体セラミックス粉末を金属電極材に対し重量
比で5%ないし75%添加した無機質充填材入り内部電
極を金属電極に接続し、成形巾は、200ミクロン以上
で最大巾は片巾で内部電極巾の20%以下とした内部電
極とすることにより、ESRの値は従来の金属の内部電
極の際の値とほぼ同じで、デラミネーションの発生率を
1/3以下とした積層セラミックコンデンサとするもの
である。本発明の積層セラミックコンデンサの内部電極
に於て、金属内部電極の部分はESRの値を低くし、金
属内部電極に接続し金属内部電極の周囲に形成するセラ
ミックス粉末を添加した無機質充填材入り内部電極部分
は、積層するセラミックス部分のセラミックス間の部分
焼結を促進し、デラミネーションの発生率を低下する作
用をする。無機質充填材入り内部電極に添加されるセラ
ミックスの量は、金属内部電極の重量に対し少なすぎる
とデラミネーションの発生率が高くなり、又添加量が多
い時はコンデンサとしての容量にばらつきの発生が大き
くなり、又ESRの値も大きくなる故、本発明の効果の
あるセラミック粉末の添加量は金属電極材に対し重量比
で5%ないし75%の範囲であり、好ましくは15%な
いし40%の範囲である。又、本発明の内部電極の金属
内部電極の周囲に形成する無機質充填材入り内部電極の
巾の値は、コンデンサの大きさにより変わるもので、容
量の小さいコンデンサでは巾200ミクロン、容量の大
きいコンデンサでは片巾の値で内部電極巾の20%もあ
ればよい。
The internal electrodes of the multilayer ceramic capacitor according to the present invention have a U shape around the metal-only internal electrodes of the conventional multilayer ceramic capacitor, except for the outlet to the external electrodes.
An inner electrode containing an inorganic filler in which 5% to 75% by weight of a ferroelectric ceramic powder constituting a capacitor is added to the metal electrode material is connected to the metal electrode around the metal internal electrode in the shape of a letter. By forming the inner electrode with a forming width of at least 200 microns and a maximum width of one side and not more than 20% of the width of the internal electrode, the ESR value is almost the same as that of the conventional metal internal electrode. The laminated ceramic capacitor has a lamination generation rate of 1/3 or less. In the internal electrode of the multilayer ceramic capacitor of the present invention, the metal internal electrode portion has a low ESR value, is connected to the metal internal electrode, and has an inorganic filler containing an inorganic filler added with ceramic powder formed around the metal internal electrode. The electrode portion promotes partial sintering between ceramics of the ceramic portion to be laminated, and acts to reduce the rate of occurrence of delamination. If the amount of ceramics added to the inorganic filler-containing internal electrode is too small relative to the weight of the metal internal electrode, the rate of delamination will increase, and if the amount is large, the capacitance of the capacitor will vary. Therefore, the addition amount of the ceramic powder having the effect of the present invention is in the range of 5% to 75%, preferably 15% to 40% by weight based on the metal electrode material. Range. In addition, the width value of the internal electrode containing the inorganic filler formed around the metal internal electrode of the internal electrode of the present invention varies depending on the size of the capacitor. In this case, the value of one width may be 20% of the width of the internal electrode.

【0007】[0007]

【実施例】本発明は、従来の積層セラミックコンデンサ
に生じていた内部電極とセラミックス間の焼結時の収縮
差を緩和するため、通常は積層セラミックコンデンサを
構成する誘電体セラミックスを充填材料として混入した
金属ペーストを、金属からなる内部電極に接続して内部
電極のまわりに、ある巾を持った無機質充填材入り内部
電極を設けることを特徴とする。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In order to reduce the difference in shrinkage during sintering between internal electrodes and ceramics, which has occurred in conventional multilayer ceramic capacitors, the present invention usually mixes dielectric ceramics constituting the multilayer ceramic capacitors as a filling material. The obtained metal paste is connected to an internal electrode made of a metal, and an internal electrode having a certain width and containing an inorganic filler is provided around the internal electrode.

【0008】今回の実施例では、コンデンサの母材とな
る強誘電体セラミックスに、鉛(Pb)系複合ペロブス
カイト構造を持つ粒径が1ミクロン以下の粉末を使用
し、内部電極には銀(Ag)とパラジウム(Pd)が7
0:30の割合の合金粉末を用いたペーストを用い、内
部電極の周囲に印刷塗布する。無機質充填材入り内部電
極ペーストには、前記AgPd合金粉末に対して重量比
で30%の前記コンデンサの母材の誘電体セラミックス
粉末を添加混練したペーストを用いた。図2に示すよう
に作成にはドクターブレード法により厚みを20ミクロ
ンに誘電体セラミックスからなるグリーンシート4を作
成し、グリーンシート4上に、外部電極への接続部分を
除きセラミックスの端面よりほぼ巾が0.9mm内側
に、先ず内部電極2の金属ペーストを5ミクロンの厚さ
に印刷を行い、ドライヤーにて仮乾燥後、スクリーンに
設けたピンガイドを利用しもう1枚のスクリーンをつけ
かえて先に塗布された内部電極の周囲に、セラミックス
粉末を金属の内部電極の重量に対し30%添加混練して
作られた無機質充填材入り内部電極ペースト3を一部を
重ねて周囲0.5mmの巾で電極取付部分を除きU字形
に5ミクロン厚さに印刷した。形状は5mm×5mmの
チップを使用し、上下両面に強誘電体セラミックスをお
き、強誘電体セラミックスと内部電極板とを交互に50
層積層を行い、図1に示す内部電極2の周囲に無機質充
填材入り内部電極3を設けた本発明の実施例による積層
セラミックコンデンサを得た。
In the present embodiment, a powder having a lead (Pb) -based composite perovskite structure and a particle diameter of 1 μm or less is used as a ferroelectric ceramic serving as a base material of a capacitor, and silver (Ag) is used as an internal electrode. ) And palladium (Pd) are 7
A paste using an alloy powder at a ratio of 0:30 is used to print and apply around the internal electrodes. As the internal electrode paste containing the inorganic filler, a paste obtained by adding and kneading 30% by weight of the dielectric ceramic powder as the base material of the capacitor with respect to the AgPd alloy powder was used. As shown in FIG. 2, a green sheet 4 made of a dielectric ceramic was formed to a thickness of 20 μm by a doctor blade method, and the width of the green sheet 4 was substantially equal to the width of the end face of the ceramic except for a portion connected to an external electrode. First, print the metal paste of the internal electrode 2 to a thickness of 5 μm on the inner side of 0.9 mm, temporarily dry it with a drier, and replace it with another screen using a pin guide provided on the screen. A part of the internal electrode paste 3 containing an inorganic filler, which is formed by adding and kneading 30% of the ceramic powder to the weight of the metal internal electrode and kneading it around the internal electrode applied to Then, a 5 micron thick print was formed in a U-shape except for the electrode mounting portion. A 5 mm x 5 mm chip is used, ferroelectric ceramics are placed on both the upper and lower surfaces, and the ferroelectric ceramics and the internal electrode plate are alternately placed on the surface.
Layer stacking was performed to obtain a multilayer ceramic capacitor according to an embodiment of the present invention in which an internal electrode 3 containing an inorganic filler was provided around the internal electrode 2 shown in FIG.

【0009】本実施例による積層セラミックコンデンサ
を、1000ケ用意し、先ずデラミネーション発生率と
等価直列抵抗(ESR)変化率の値を測定した。内部電
極形成条件とデラミネーション発生率の結果を図3に、
等価直列抵抗(ESR)変化率を図4に示す。図3に示
すデラミネーション発生率は、内部電極が、銀パラジウ
ム電極の場合、内部電極を銀パラジウムに誘電体セラミ
ックス粉末を重量比で30%添加した100%無機質充
填材入り内部電極を銀パラジウムのみの内部電極の場
合、本発明による銀パラジウムの内部電極の周囲に外部
電極取付口を除き、銀パラジウムセラミックス材を重量
比で30%添加した無機質充填材入り内部電極を銀パラ
ジウムのみの内部電極の周囲に帯状に取り付けた構造の
内部電極の場合の3条件の時の特性を示す。内部電極の
構造により、デラミネーションの発生率は従来の銀パラ
ジウムのみの内部電極の場合4.4%、100%無機質
充填材入り内部電極の場合0.8%、本発明の実施例の
内部電極の場合には1.4%であり、デラミネーション
の発生率は本発明の内部電極の場合、銀パラジウム内部
電極に対して、1/3、100%無機質充填材入り内部
電極の場合の1.75倍である。
[0009] 1000 laminated ceramic capacitors according to the present embodiment were prepared, and first, the values of the delamination occurrence rate and the equivalent series resistance (ESR) change rate were measured. FIG. 3 shows the results of the internal electrode formation conditions and the delamination occurrence rate.
FIG. 4 shows the equivalent series resistance (ESR) change rate. When the internal electrode is a silver-palladium electrode, the delamination occurrence rate shown in FIG. 3 is based on a silver-palladium internal electrode containing 100% inorganic filler and 30% by weight of dielectric ceramic powder added to silver palladium. In the case of the internal electrode of the present invention, the internal electrode containing an inorganic filler containing 30% by weight of a silver palladium ceramic material is replaced with the internal electrode of only silver palladium except for the external electrode mounting opening around the silver palladium internal electrode according to the present invention. The following shows the characteristics under the three conditions in the case of the internal electrode having a structure attached in a belt shape around the periphery. Depending on the structure of the internal electrode, the rate of delamination is 4.4% for a conventional silver-palladium-only internal electrode, 0.8% for a 100% inorganic-filled internal electrode, and the internal electrode according to the embodiment of the present invention. In the case of the internal electrode of the present invention, the rate of occurrence of delamination is 1/3 that of the silver-palladium internal electrode, which is 1.3% in the case of the internal electrode containing an inorganic filler. It is 75 times.

【0010】デラミネーションの発生率の計測は、超音
波深傷を応用し、デラミネーション部分が画像として表
示されるデラミネーション検出装置を用い、画像上に表
示された剥がれ、ひび割れ等の発生により測定した。
The rate of occurrence of delamination is measured by applying an ultrasonic deep wound and using a delamination detection device in which the delamination portion is displayed as an image, by the occurrence of peeling, cracks, etc. displayed on the image. did.

【0011】又等価直列抵抗(ESR)の値と内部電極
の構造との関係の特性図を図4に示すが、従来の銀パラ
ジウムのみの内部電極の場合の等価直列抵抗平均値をE
SR変化率0%とし、それぞれ内部電極構造の異なる積
層セラミックコンデンサを用い測定した時のESRの平
均値を銀パラジウムの内部電極の時の値を基準に変化率
として求めた。ESRの平均値の変化率で比較した時、
銀パラジウムにセラミックス粉末を重量比で30%添加
した内部電極では、銀パラジウム100%の内部電極の
時に対しESRが14%の増加を示し、本発明の実施例
では2%の増加であり、ほとんど銀パラジウムの内部電
極の時の値に比べ変化は認められなかった。
FIG. 4 is a characteristic diagram showing the relationship between the value of the equivalent series resistance (ESR) and the structure of the internal electrode.
The SR change rate was set to 0%, and the average value of ESR measured using a multilayer ceramic capacitor having a different internal electrode structure was determined as the change rate based on the value of the silver palladium internal electrode. When comparing the rate of change of the average value of ESR,
The internal electrode in which 30% by weight of a ceramic powder is added to silver palladium has an ESR increase of 14% as compared with the case of an internal electrode of 100% silver palladium, and the embodiment of the present invention shows an increase of 2%. No change was observed compared to the value of the silver-palladium internal electrode.

【0012】なほ等価直列抵抗の測定はインピーダンス
メータを用い周波数10KHZで測定した。なほ銀パラ
ジウムの内部電極の場合のESRの値は本実施例の条件
の時ほぼ40mΩである。図3、図4に示す結果によ
り、本発明による積層セラミックコンデンサの内部電極
の構造とすることにより、デラミネーションの発生率
は、銀パラジウムのみの内部電極の場合の1/3とな
る。又ESRの値は銀パラジウムのみの内部電極の場合
とほぼ同等であり、又100%無機質充填材入り内部電
極の場合に比べてESR変化率で比較した時1/7の値
であり、従って本発明によりデラミネーション発生率の
少ない、しかもESRの値が従来の銀パラジウム内部電
極と同一の積層セラミックコンデンサが得られるように
なった。
The equivalent series resistance was measured at a frequency of 10 KHz using an impedance meter. The value of ESR in the case of a silver palladium internal electrode is approximately 40 mΩ under the conditions of this embodiment. According to the results shown in FIGS. 3 and 4, by employing the structure of the internal electrode of the multilayer ceramic capacitor according to the present invention, the rate of occurrence of delamination is reduced to 1/3 of that in the case of the internal electrode made only of silver palladium. The value of ESR is almost the same as that of the internal electrode made of only silver / palladium, and is 1/7 of the ESR change rate compared to the case of the internal electrode containing 100% inorganic filler. According to the present invention, a multilayer ceramic capacitor having a low delamination rate and an ESR value equal to that of a conventional silver-palladium internal electrode can be obtained.

【0013】本発明の実施例で銀パラジウムのみの内部
電極の周囲に形成する無機質充填材入り内部電極に添加
するセラミックスの添加割合は、重量比で銀パラジウム
のみの内部電極の時の値に対し、5%ないし75%の値
が適当であり、好ましくは15%ないし40%の範囲で
ある。セラミックスの添加量が5%以下ではデラミネー
ションの発生率が大きくなり、又75%以上では電極切
れが多くなり、積層セラミックコンデンサの容量のばら
つきが大きくなる。
In the embodiment of the present invention, the proportion of the ceramic added to the internal electrode containing the inorganic filler formed around the silver-palladium-only internal electrode in the embodiment is a weight ratio with respect to the value of the silver-palladium-only internal electrode. A value of 5% to 75% is suitable, preferably in the range of 15% to 40%. If the amount of ceramic added is 5% or less, the rate of occurrence of delamination increases, and if it is 75% or more, the number of cut electrodes increases, and the variation in capacitance of the multilayer ceramic capacitor increases.

【0013】一方、銀パラジウム内部電極の周囲に設け
る無機質充填材入り内部電極の巾は積層セラミックコン
デンサの内部電極を印刷する面積により変り、巾は20
0ミクロン以上、内部電極の面積が大きい時は最大巾は
内部電極の片側に於て内部電極巾の20%以下が好まし
い。
On the other hand, the width of the inorganic filler-containing internal electrode provided around the silver-palladium internal electrode varies depending on the area on which the internal electrode of the multilayer ceramic capacitor is printed.
When the area of the internal electrode is larger than 0 μm, the maximum width is preferably 20% or less of the internal electrode width on one side of the internal electrode.

【0014】又本発明の実施例の内部電極材料は、重量
比で銀が70%、パラジウムが30%の銀パラジウム合
金粉末を用いた例で説明したが、他の内部電極として使
用される、ニッケル、銅、金の粉末を用い、本発明の積
層セラミックコンデンサの内部電極の構造内容を適用し
得ることは当然である。
The internal electrode material of the embodiment of the present invention has been described using an example in which silver-palladium alloy powder containing 70% by weight of silver and 30% by weight of palladium is used. Naturally, the structure of the internal electrode of the multilayer ceramic capacitor of the present invention can be applied using nickel, copper, or gold powder.

【0015】なほ本発明の実施例は積層セラミックコン
デンサの例につき説明したが、本発明の内部電極構造と
同様な構造を持つ圧電アクチュエータにも適用すること
により、従来の金属のみの内部電極とした圧電アクチュ
エータに比べてデラミネーション発生率を低減し得るこ
とは当然である。
Although the embodiment of the present invention has been described with reference to an example of a multilayer ceramic capacitor, the present invention is also applied to a piezoelectric actuator having a structure similar to the internal electrode structure of the present invention, whereby a conventional metal-only internal electrode is formed. Naturally, the rate of delamination can be reduced as compared with the piezoelectric actuator.

【0015】[0015]

【発明の効果】本発明による積層セラミックコンデンサ
は、内部電極を金属内部電極の周囲に強誘電体セラミッ
クス粉末を添加充填した無機質充填材入り内部電極を形
成することにより、等価直列抵抗は金属内部電極を用い
た場合とほぼ同じ値で、しかもデラミネーション発生率
が金属内部電極の場合に比べて1/3の値となる積層セ
ラミックコンデンサとすることが出来る。
The multilayer ceramic capacitor according to the present invention is characterized in that the internal electrode is formed with an inorganic filler containing a ferroelectric ceramic powder added and filled around the metal internal electrode. Can be obtained, which is almost the same value as in the case of using the same, and has a delamination occurrence rate of 1/3 the value in the case of the metal internal electrode.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明による積層セラミックコンデンサの部分
破砕断面斜視図。
FIG. 1 is a partially fragmented sectional perspective view of a multilayer ceramic capacitor according to the present invention.

【図2】本発明による積層セラミックコンデンサの製造
工程を示し、図2の(a)は強誘電体セラミックスから
なるグリーンシートの平面図、図2の(b)はグリーン
シート上に金属の内部電極ペーストを印刷した平面図、
図2の(c)はグリーンシート上に金属の内部電極の周
囲に強誘電セラミックス粉末を添加した無機質充填材入
り内部電極を印刷した平面図。
FIGS. 2A and 2B show a manufacturing process of a multilayer ceramic capacitor according to the present invention, wherein FIG. 2A is a plan view of a green sheet made of ferroelectric ceramics, and FIG. Plan view with paste printed,
FIG. 2C is a plan view in which an internal electrode containing an inorganic filler added with a ferroelectric ceramic powder is printed around a metal internal electrode on a green sheet.

【図3】夫々の内部電極の構造とデラミネーション発生
率との関係を示す特性図。
FIG. 3 is a characteristic diagram showing the relationship between the structure of each internal electrode and the rate of occurrence of delamination.

【図4】夫々の内部電極構造と等価直列抵抗変化率との
関係を示す特性図。
FIG. 4 is a characteristic diagram showing a relationship between each internal electrode structure and an equivalent series resistance change rate.

【図5】従来の積層セラミックコンデンサを示す図で、
図5の(a)は正面断面図、図5の(b)は横断面図。
FIG. 5 is a view showing a conventional multilayer ceramic capacitor;
5A is a front sectional view, and FIG. 5B is a transverse sectional view.

【符号の説明】[Explanation of symbols]

1 強誘電体セラミックス 2,2a 内部電極 3 無機質充填材入り内部電極 4 グリーンシート 5 外部電極 DESCRIPTION OF SYMBOLS 1 Ferroelectric ceramics 2, 2a Internal electrode 3 Internal electrode containing inorganic filler 4 Green sheet 5 External electrode

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 強誘電体セラミックス層と低抵抗金属か
らなる内部電極層が交互に積層され、前記内部電極層が
互いに1つおきに異なる外部電極に接続されてなる積層
セラミックコンデンサにおいて、前記内部電極を構成す
る低抵抗金属に対し、強誘電体セラミック層を構成する
セラミックス粉末を重量比で5%ないし75%添加混練
した無機質充填材入り内部電極を、外部電極取り出し口
を除き内部電極の周辺を囲むように、内部電極端面に接
続して200ミクロンないし内部電極巾に対し20%以
下の巾で形成したことを特徴とする積層セラミックコン
デンサ。
1. A multilayer ceramic capacitor in which a ferroelectric ceramic layer and internal electrode layers made of a low-resistance metal are alternately laminated, and the internal electrode layers are connected to different external electrodes every other one. An internal electrode containing an inorganic filler, in which 5% to 75% by weight of a ceramic powder constituting a ferroelectric ceramic layer is added to and kneaded with a low-resistance metal constituting an electrode, and the periphery of the internal electrode except for an external electrode outlet. Characterized in that it is connected to the end face of the internal electrode and formed to have a width of 200 μm or less than 20% of the internal electrode width so as to surround the multilayer ceramic capacitor.
JP3181756A 1991-06-25 1991-06-25 Multilayer ceramic capacitors Expired - Fee Related JP2971993B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3181756A JP2971993B2 (en) 1991-06-25 1991-06-25 Multilayer ceramic capacitors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3181756A JP2971993B2 (en) 1991-06-25 1991-06-25 Multilayer ceramic capacitors

Publications (2)

Publication Number Publication Date
JPH053135A JPH053135A (en) 1993-01-08
JP2971993B2 true JP2971993B2 (en) 1999-11-08

Family

ID=16106341

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3181756A Expired - Fee Related JP2971993B2 (en) 1991-06-25 1991-06-25 Multilayer ceramic capacitors

Country Status (1)

Country Link
JP (1) JP2971993B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5613999A (en) * 1992-09-11 1997-03-25 Nippon Kinzoku Co., Ltd. Method for producing magnesium
JP2000223348A (en) * 1998-11-26 2000-08-11 Tokin Corp Multilayer ceramic capacitor
US7375412B1 (en) * 2005-03-31 2008-05-20 Intel Corporation iTFC with optimized C(T)
JP4809173B2 (en) * 2006-09-27 2011-11-09 京セラ株式会社 Multilayer ceramic capacitor
JP5951958B2 (en) * 2011-10-27 2016-07-13 京セラ株式会社 Electronic components
DE102018115085B4 (en) * 2018-06-22 2021-03-25 Tdk Electronics Ag Ceramic multilayer component and method for producing a ceramic multilayer component

Also Published As

Publication number Publication date
JPH053135A (en) 1993-01-08

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