JP2970897B2 - Probe card allocation device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe card allocating apparatus, and more particularly to an allocating apparatus which can perform allocation while observing a layout of wafers and chips graphically displayed on a display.

[0002]

2. Description of the Related Art Generally, in the process of manufacturing semiconductor products, a large number of chips are formed by arranging them vertically and horizontally on a single semiconductor wafer, but not all of these chips are non-defective. At the stage near the final stage, before cutting, electrical characteristics of each chip are inspected in a wafer state, and defective chips are screened.

[0003] This inspection is generally performed using a probe device. This probe device is provided with a probe card having a large number of probe needles, the probe needles are brought into contact with the electrode pads of individual chips on a semiconductor wafer, and a predetermined inspection signal is applied from the probe needles to individual ones. Whether or not the chip has basic electrical characteristics is tested via a tester. In this case, the probe needle simultaneously contacts the electrode pad of one chip or the electrode pads of a plurality of chips, inspects one chip or a plurality of chips at the same time, and moves the probe card and the chip relative to each other in principle. Inspection is performed on all chips.

Here, a general probe device will be described with reference to FIG. The probe main body 4 of the probe device 2 is provided with a wafer mounting table 6 for supporting the semiconductor wafer W. The wafer mounting table 6 is controlled by X, Y, and Z stages in a plane (X direction and Y direction) and at a height. Direction (Z
Direction). This wafer mounting table 6
A ring-shaped probe card 10 in which a large number of probe needles 8 are implanted is fixed above, and by moving the wafer mounting table 6, an electrode pad of an arbitrary chip is attached to the probe needle 8. It can be contacted.

[0005] Above the probe body 4, a test head 12 is provided which can be raised and lowered with one end serving as a fulcrum.
When this is depressed, it becomes conductive with each of the probe needles 8 via pogo pins (not shown), and each chip is inspected by a tester (not shown) connected to the test head 12. The probe body 4 is provided with a computer 14 for controlling the operation of the entire apparatus and setting measurement conditions for each chip. The display 16 has various information such as a probe card. 10
Alternatively, an image of a chip or the like from a microscope 18 provided in the vicinity thereof can be projected.

By the way, recently, with the improvement of probe card manufacturing technology and tester performance,
A device for simultaneously measuring a plurality of chips, such as two, four or eight, has been developed. A probe card of this kind of device has a large number of probe needles capable of simultaneously contacting electrode pads of a plurality of chips. have. For example, a probe card 10 for simultaneously inspecting a large number of two chips C formed in a substantially square shape by a boundary indicated by a broken line in FIG.
Is constructed as shown in FIG.
An opening 20 having substantially the same size as when the chips C are arranged side by side is formed, and a large number of probe needles 8 are implanted in the edge portion in the length direction so that the electrode pads of the two chips are formed. Contact at the same time. As described above, a multi number is used as a word indicating the number of chips that can be simultaneously contacted by the probe needles of the probe card, and a location word is used to specify the arrangement direction of the chips that can be measured at that time.

For example, if the shape as shown in FIG. 18 is set to one chip size, two pixels are required in the horizontal direction as shown in FIG.
A probe card capable of simultaneously measuring chips arrayed is represented by a multi-number of 2 and a location represented by X (direction). As shown in FIG. 19B, a probe card capable of simultaneously measuring chips arranged vertically in two directions is: The multi number is represented as 2, and the location is represented as Y. Similarly, in the case shown in FIG. 20A, the number of multis is 4, the location is X. In the case shown in FIG. 20B, the number of multis is 4, the location is 2 (Y) × 2 (X), and FIG. (C), the number of multis is 4, the location is Y, the number of multis is 8, the location is X in the case shown in FIG. 21A, and the location is 2 (Y) × 4 (X ).

[0008] By the way, when measuring all the desired chips, it is of great concern how the probe card and the wafer can be moved relative to each other and the probe needles can be brought into contact for efficient testing. Yes, before measurement, the operator sets the order of movement of wafers with respect to the probe card, that is, the assignment of probe cards.

[0009]

When setting the allocation of the probe cards as described above, first, the wafer W is actually mounted on the wafer mounting table 6, and this is displayed on the display 16 by the microscope 18. In this state, the reference positions of the probe card are sequentially allocated on the displayed chips, and the cards are allocated to all the chips.

However, in this case, since the allocation of the cards is performed while the actual wafer is projected by a microscope, the allocation order is stored as coordinates in the device memory, but the allocation order is displayed on the display. However, when the allocation order is checked later, the X and Y stages holding the wafers simply move according to the allocation order, and this may not be sufficiently confirmed.

[0011] Further, even if it is attempted to confirm the allocation order again after the measurement, the allocation state cannot be sufficiently confirmed even in this case because the electrode pads merely have needle marks.

The present invention focuses on the above problems,
It was created to solve this effectively. SUMMARY OF THE INVENTION It is an object of the present invention to provide a probe card allocating apparatus capable of laying out a graphic chip on a display surface of a semiconductor wafer displayed graphically and displaying a card allocation position on the layout.

[0013]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a probe for measuring the electrical characteristics of a large number of chips formed on a semiconductor wafer so as to be capable of simultaneously contacting the plurality of chips. In a probe card allocating apparatus for allocating a probe card when inspecting using a probe card having a needle, chips on the image are arranged on a wafer on the image based on input means, wafer information and chip information. A coordinate calculation means for assigning coordinates to each chip, a chip coordinate storage unit for storing the coordinates obtained by the coordinate calculation means and the chips in association with each other, an allocation mode storage unit for storing a plurality of card allocation modes in advance, Based on the information in the chip coordinate storage unit, the information in the allocation mode storage unit, the information in the probe card, and the command from the input means, Card allocation means for setting an allocation position; a card allocation position storage unit for storing the card allocation position set by the card allocation means in association with the chip; and an image on the image based on the information of the chip coordinate storage unit. Display means for laying out each chip on an image on a wafer and displaying card allocation position information based on the information of the card allocation position storage unit is provided.

[0014]

Since the present invention is constructed as described above, when chip information such as the size of the semiconductor wafer and the direction of the orientation flat and chip information such as the chip size are inputted from the input means, the coordinate calculating means is provided based on the information. , The chips on the image are arranged vertically and horizontally on the wafer on the image, and coordinates are given to each chip. The coordinate information obtained here is stored in the chip coordinate storage unit in association with the chip, and at the same time, the image of the wafer and the chip are superimposed and displayed on the display means.

The operator selects a desired mode from the allocation modes stored in the allocation mode storage unit, and inputs the card allocation automatically or manually using input means while viewing the displayed image. Then, the card allocation unit sets the card allocation position based on the information in the chip coordinate storage unit, the information in the allocation mode storage unit, the information on the probe card, and a command from the input unit.

The card allocation position set here is stored in the card allocation position storage unit in association with the chip, and at the same time, the display means superimposes the allocation position information simultaneously with the wafer and chip and displays the layout. become. Therefore, the operator can visually confirm what the card allocation position is on the wafer. Further, such an allocation operation can be performed by software without using an actual wafer or a probe device.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the probe card allocating apparatus according to the present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is a block diagram showing a probe card allocating device according to the present invention, FIG. 2 is a block diagram of a computer constituting the probe card allocating device, and FIG. 3 is a diagram showing an automatic allocation mode of a card allocating section shown in FIG. FIG. 4 is a configuration diagram showing an optimal allocation mode of the card allocation unit, and FIG. 5 is a configuration diagram showing an arbitrary allocation mode of the card allocation unit.

As shown in FIG. 15, the allocating device 22 of the present invention is configured as a computer 14 arranged in parallel with the probe main body 4, and directly controls the operation of the probe main body 4 according to the probe card allocating program created here. Alternatively, a program for allocating the probe card may be created in a separately provided computer, and the program may be loaded into the computer 14 to operate the probe body 4.

As shown in FIG.
Is a display means 24 such as an LCD (Liquid Crystal Display), a CRT (Cathode Ray Tube), a storage device 26, and a control device 28.
And input means 34 such as a keyboard 30 and a mouse 32 are mutually connected by a bus 36 composed of an address bus, a control bus and a data bus.

The allocating device 22 will be described in detail with reference to FIG. 1. The input means 34 for inputting various data and commands includes the keyboard 30 and the mouse 32 as described above. It is not limited to.
The display unit 24 includes a display unit 38 such as an LCD or CRT for actually displaying an image, and a display control unit 40 for controlling the display. In this display section 38,
As will be described later, a semiconductor wafer and a large number of chips arranged vertically and horizontally therein are displayed graphically, and at the same time, information indicating a card allocation position set by an operator or automatically is also displayed.

Reference numeral 42 denotes a coordinate calculating means, which stores wafer information such as a wafer size and an orientation flat (orientation flat) direction inputted from the input means 34 and chip information such as a vertical and horizontal (x, y) size of a chip. , The chips on the square image are automatically arranged vertically and horizontally on the wafer on the image, and coordinates are given to each chip.
The image and coordinates of each chip obtained here are associated with each other, and a chip coordinate storage unit 44 such as a RAM is provided.
Is stored on the display unit 38 via the display control unit 40. The display state at this time is shown, for example, as shown in FIG. 11A, and a wafer in which a large number of chip images are graphically displayed in a disk-like graphic except for the orientation flat portion. The map is displayed.

The coordinate calculation means 42 has a file storage unit 46 such as a ROM or the like in which information about the probe card such as the wafer size, orientation of the orientation flat, chip size, and the number of multis and locations is registered in advance as a file. May be connected, and the input means 34
The user inputs the parameter of the desired type file name from the above, and inputs the data to the coordinate calculation means 42.

Numeral 48 denotes a card allocation mode storage unit composed of, for example, a ROM or the like. In this embodiment, three types of modes, an automatic allocation mode, an optimum allocation mode, and an arbitrary allocation mode, are stored in this storage unit 48. And can be selected by the operator as described later.

The allocation mode is not limited to the above three types, but can be increased or decreased as needed. Here, the automatic allocation mode is a mode in which the contact position between the wafer and the probe card is automatically calculated and the contact position is allocated. At this time, the relationship between the contact position and the chips on the wafer is evenly distributed in the vertical and horizontal directions. Set to contact. The optimal allocation mode is a mode in which the contact positions are automatically allocated so that the number of times the probe card makes contact on the wafer is minimized. The arbitrary allocation mode is a mode in which the contact position can be arbitrarily set by moving the contact position using a mouse or a cursor movement key of a keyboard.

Reference numeral 50 denotes a menu storage unit for storing a plurality of menus. The menu storage unit 50 is used for setting various operation menus required for operating the computer and setting measurement conditions. Menus for map initialization, card allocation, and the like used when allocating cards are stored. Of course, these menus can be increased or decreased as needed.

When "map initialization" is selected, all chips in the wafer become test target chips. When "card allocation" is selected, the card allocation mode becomes operable.

Numeral 52 denotes a card allocating means. The allocating means 52 includes information of the chip coordinate storage section 44, information of the card allocation mode storage section 48, and input means 34.
The contact positional relationship between the chip on the wafer and the probe card is set based on a command from the CPU.

In this case, the card allocating means 52
Sets the card allocation position, that is, the contact position, according to the selected mode among the three allocation modes described above. Therefore, the card allocating means 52
Correspond to the above three allocation modes, the automatic allocation unit 54 shown in FIG. 3, the optimal allocation unit 56 shown in FIG.
It also has an optional allocation unit 58 shown in FIG.

The automatic allocation unit 54 shown in FIG. 3 includes an X-axis minimum value unit 60A for obtaining the X-axis minimum value on the displayed wafer map, an X-axis maximum value unit 60B for obtaining the X-axis maximum value,
It has a Y-axis minimum value section 62A for obtaining the Y-axis minimum value, and a Y-axis maximum value section 62B for obtaining the Y-axis maximum value. The X-axis protruding amount calculation unit 64A is connected to the X-axis minimum value unit 60A and the X-axis maximum value unit 60B, and a line having the maximum width in the X direction from the number of chips Nx in the card X direction in the information and card information. The protruding amount Xh at the end when the card is laid out at an integer multiple at the position is determined. The state at this time is shown in FIG.
In FIG. 2A, the upper row shows the chip row having the maximum width in the X direction, and the lower row shows a hypothetical card allocation position. In this case, since the probe card can simultaneously measure four chips arranged in the X direction as an example, a card having a multi-number of 4 and an X location will be described as an example.

Reference numeral 66A denotes the X-direction protrusion amount calculating section 64.
Based on the output of A, the left end start position determination unit 66A obtains the left end start position Xs of the X-axis card layout so that the card allocation positions are substantially equal on the left and right sides (X direction) of the wafer. The state at this time is shown in FIG. 12B, in which the protruding amounts of the card layout with respect to the chip row in the left-right direction are substantially equal (even if there is a difference, a difference of one chip).
The card allocation position is determined so that In this case, the start position may be determined from the right direction.
Similarly, the Y-axis minimum value portion 62A and the Y-axis maximum value portion 62B
The Y-direction protrusion amount calculation unit 64B is also connected to obtain the protrusion amount Yh at the lower end in the Y direction in the same manner as described above.

Further, the Y-direction protrusion amount calculation unit 64B
The similarly obtains the upper starting position y _s in the Y-direction upper start position determination unit 66B is connected. In this case, the start position may be determined from below.
Reference numeral 68 denotes the left end and upper end start position determination units 66A, 66
An automatic allocation calculation unit 68 for automatically performing card allocation based on the output of B with reference to the upper left side of the wafer. An example of the layout of the card allocation positions obtained in this way is shown in FIG.

The optimum allocating unit 58 shown in FIG. 4 is configured substantially similarly to the automatic allocating unit 54 shown in FIG.
The difference is that the automatic allocation unit 54 shown in FIG. 3 is determined so that the card allocation positions are evenly laid out over the entire surface of the wafer (see FIG. 11C), but the optimum allocation unit 56 shown in FIG. When there are a plurality of card locations in each row of the wafer on the wafer and in the Y direction, the start position of the left end and the upper end is determined for each of the plurality of rows to determine the card allocation position. In this way, the increment unit 67 indicating the row to be allocated is provided in order to automatically perform the allocation for each row or for a plurality of rows. As a result, it is possible to contact all chips with a minimum number of contacts. An example of the layout of the card allocation positions obtained in this way is shown in FIG.

The arbitrary allocation unit 58 shown in FIG. 5 has a card reference position determination unit 70,
For example, in a four-channel probe card capable of simultaneously measuring four chips, the first channel is used as a reference position to determine at which coordinates on the wafer chip the first channel is to be positioned according to a command from the input means 34. As a result, the card allocation position can be laid out at an arbitrary position on the wafer.

Returning to FIG. 1, reference numeral 72 denotes a card allocation position storage unit which stores the card allocation position set by the card allocation means 52 and the chip in association with each other. Therefore, the card allocation position is displayed on the display unit 36 in a superimposed manner on the graphically displayed chip based on the stored contents. The display state at this time is, for example, as shown in FIG.
This is shown in FIG. 11C or FIG.

Next, the operation of the apparatus configured as described above will be described with reference to the flowcharts shown in FIGS. In this embodiment, an example will be described in which the number of chips that can be measured by contacting the probe needles of the probe card at one time is four chips arranged linearly in the X direction as described above. Therefore, in the probe card information at this time, the number of multis is given as 4 and the location is given as X. In this embodiment, a case where the mouse 30 is used as the input means 32 will be described as an example.

First, when the apparatus is started up, an initial screen is displayed on the display section 38 as shown in FIG. 14, and menus such as "map initialization" and "card allocation", information items relating to wafers and chips, for example, product names , Wafer size,
The chip size, the orientation of the orientation flat, and card information items, for example, the number of multi-functions and the location are displayed and the system waits for input (S1).

In the input wait information, it is always determined whether the mouse button has been pressed and released, that is, whether or not the mouse button has been clicked (S2). If the mouse button has not been clicked (NO), the input wait state is always established. If the mouse 32 is clicked (YES), it is determined whether the mouse pointer 74 at that time points to "map initialization" (S3) or "card allocation" (S4). If the mouse pointer 74 points to "map initialization" in S3, the wafer map is initialized (S5), and it is displayed that all the chips in the wafer drawn graphically have been tested. You. In this case, the wafer size, orientation flat orientation,
The chip size and the like that are preset for initialization are used. For example, among 4, 5, 6, and 8 inch wafers, 8 inch wafer, orientation of orientation flat 0 °, 90 °, 180 °,
Of the 270 °, 0 ° will be automatically selected.

On the other hand, if "card allocation" is selected in S4, it is next determined whether or not the type name has been input (S4).
6) If YES, the corresponding file is read from the file storage unit 46 based on the input parameters, and the wafer size, orientation flat direction, chip size, probe card information, etc. are stored in the coordinate calculation unit 40. (S7). Then, the chips on the image are allocated on the wafer on the image based on the fetched information, and based on this, the chips are laid out and displayed on the wafer on the display unit 38 to form a wafer map (S8). ). At the same time, coordinates are assigned to the chips displayed in the layout, and the chip coordinates are stored in the chip coordinate storage unit 44 (S9).

In this case, the coordinates of each display chip are determined using the base chip located at the wafer center as the reference coordinates (0, 0). The display state at this time is shown in FIG.
As shown in (A), a large number of chip images GC allocated in the wafer image GW are graphically displayed, and the chip located at the wafer center is the reference chip.
Further, the wafer size, chip size, card information (data) and the like are also displayed on the display unit 38. For example, in this case, the number of multis of the card data is 4, and the location is X.

If the type name has not been input in S6 and the wafer size, orientation of the orientation flat, chip size and card information (data) have not been input (S10), an input wait state is set. (S
11) When all the information is input by the operator through the input means 34 (YE in S10).
S) In the same manner as described above, the coordinate calculation means 42 allocates the chips on the image on the wafer on the image based on the input information, and stores the calculation result in the chip coordinate storage unit 44 and at the same time, displays it on the display unit 38 as shown in FIG. As shown in (A), the layout of the wafer GW and the chips GC is displayed. At the same time as the chip layout display is performed, the area above this display image (see FIG. 14) includes the "automatic setting mode"
A menu for selecting a card allocation mode such as "optimization mode" or "arbitrary designation mode" is displayed (S12).

Next, the operator selects a desired mode from the three card allocation modes using a mouse. First, it is always determined whether or not the mouse button has been pressed and released (S13). If YES, it is determined whether or not the mouse pointer 74 at that time points to any of the three card allocation mode menus. (S14).
This determination is made until one of the allocation mode menus is designated.

First, a case where "automatic setting" is selected from among the three card allocation modes will be described. When "automatic setting" is selected in S15, the layout of the allocation is automatically calculated by the card allocation means 52 so that the cards are allocated substantially uniformly in the horizontal direction of the wafer (S16).

This calculation procedure is based on the minimum value in the X-axis direction of all chip coordinates on the wafer map based on the data stored in the above-described chip coordinate storage unit 44, that is, the X-axis minimum value = x _min and the maximum value. Value, ie, X-axis maximum value = x
_max is determined (see FIG. 11B), and from these differences, the number of chips Nx that can be measured simultaneously in the X direction of the probe card in the card information in the card information is used. In this embodiment, Nx = 4 is used. When the cards are allocated at the row position where the maximum width is obtained, the amount Xh of the card protruding at the wafer end is calculated based on the following equation.

{(X _max −x _min ) +1} / Nx = Q... R Extrusion amount Xh = Nx−R where Q is the quotient (integer) of the calculation result of the division, and R is the remainder. FIG. 12A shows the calculation at this time. In the present embodiment, the following equation is obtained by putting specific numerical values into the above equation.

{(−4 + 4) +1} / 4 = 2... 1 Extrusion amount Xh = 4-1 = 3 Here, the reason for adding 1 to the difference between x _max and x _min is that the coordinates (0, 0) This is to add chips to the number.

Next, calculated on the basis of the left start position x _s at the time of card layout in the X-axis direction by the following equation at S17. _{x s = X min - [Xh} / 2] where, [Xh / 2] is an integer when subjected to truncation.

The meaning of the above equation is to set the amounts of protrusion from both ends of the wafer to be substantially the same when the card layout is performed in the X direction. The calculation at this time is schematically shown in FIG.
When specific numerical values are put into the above equation, the following equation is obtained. x _s = −4− [3/2] = − 5

That is, the coordinates (-5, 0) are the start positions of the card layout, and the chip 1 is located at the left end of the wafer.
The length of each chip protrudes, and the length of two chips protrudes from the right end. In this embodiment, the card layout is started from the left side of the wafer. However, the layout may be started from the right side of the wafer, or the value of [Xh / 2] is rounded down in the above equation. Although the integer is defined as the hour, it may be defined as the integer when rounded up.

Next, in S18 the same processing as that performed in the X direction at S16 and S17, similarly performed for the Y direction of the card to determine the upper starting position y _s of the Y-axis. In this way, the layout start coordinates (x _s , y
If _s) is Motoma' the coordinate (x _s, the upper left portion of the probe card to y _s) (first channel of the left end of the probe card so there is only one row in the Y direction in the case of this example)
Are arranged, the cards are allocated on the wafer map in the X direction (row direction) and the Y direction (column direction) based on this, and the cards are laid out, and the layout is displayed on the display unit 38 (S19). The display state at this time is shown in FIG. 11C, and the coordinates of each card allocation position are (x _s , y
_s ) = (x1, y1), (x2, y2) = (x3, y
3) ...... (x _n, so that the y _n).

The coordinates of each card allocation position obtained here are stored in the card allocation position storage section 72 (S20), and are finally filed (S21). Based on this filed program, The probe device will be operated. As described above, in the case of the automatic allocation mode, the card allocation positions are determined so as to be substantially equal left and right with respect to the center line of the wafer as shown in FIG.

Next, the case where the "optimization mode" is selected from the card allocation modes will be described. In this optimization mode, card allocation positions are automatically laid out so as to minimize the number of probe card contacts.

First, returning to S15 in FIG. 7, if NO in this step and "optimal setting" is selected in S22 shown in FIG. 9 (YES), the row of the chip to be allocated on the wafer map is displayed. Increment section 6 indicating position
7 is set to "0" (S23).
This storage content i is incremented by "1" (S2
4).

Next, an optimal card layout is performed on the i-th row (here, the first row) on the wafer map. In this case, the coordinate calculation at the time of the card layout is shown in FIG.
Steps S16 and S17 and S18 in FIG. 8 are performed only on the first row, and the left end start position is obtained (S25). Then, the card layout of the first row is determined based on the left end start position obtained here, and is displayed on the display unit 38 (S26).

Next, it is determined whether or not the i-th row is the last row of wafer chips (S27).
Returning to 24, the content i of the increment unit 67 is incremented by one, and the same calculation is repeatedly performed. Then, if the calculation is performed up to the last row of the wafer chip and the layout of the card is performed (S27-YES), the process proceeds to S20 of FIG.
And the coordinates of each card position laid out are stored. The display state on the display unit 38 at this time is shown in FIG. 11D, and the card allocation position is determined so that the number of card contacts is minimized.

Next, the case where the "arbitrary setting mode" is selected from the card allocation modes will be described. In this arbitrary setting mode, the card can be allocated to an arbitrary position by the operator.

First, returning to S22 of FIG. 9, if NO in this step and "arbitrary setting" is selected in S28 shown in FIG. 10 (YES), it is determined whether or not the mouse button is constantly pressed and released. is (S29, S30), when the mouse button is released, the chip coordinates (x _n, y _n) of the mouse pointer 74 at that time is close to display one layout positions the upper left corner of the card layout Yes (S3
1). Then, the chip coordinates at which the mouse pointer 74 is located at this time are stored (S32).

Next, it is determined whether or not the card layout has filled the entire wafer map (S33). If NO, it is determined whether or not the end menu has been selected next (S34). If the end menu is not selected (N
O), returning to S29 again, waiting for the next layout instruction,
The above-described layout operation is repeatedly performed. The display state of the display unit during the card layout is shown in FIG. In this way, when the card layout fills all of the wafer map (S33-YES) or when the end menu is selected (S34-YES), the process returns to S20 of FIG.
The card layout position at that time is stored and filed.

FIG. 13 shows an example of a final card layout set as described above. FIG. 13A shows a card layout set in the automatic setting mode, and FIG. 13B shows an optimization mode. 13C shows the card layout set in the arbitrary designation mode, and the arrow in the figure shows the relative movement direction of the reference channel (first channel) of the probe card.

In order to prevent the probe needle from protruding from the wafer edge for protection of the probe needle, the card layout may be entirely set within the wafer plane by using, for example, an arbitrary setting mode. There will also be a tip where the probe needle contacts twice.

As a card allocation mode other than the above three types, for example, a mode in which an operator instructs only a position where a card contacts first and an automatic allocation is performed for other portions can be set. Also, in advance or after determining the card layout, for example, a measurement unnecessary chip which does not need to be inspected as a defective chip is designated in advance. Even if the probe needle contacts such a measurement unnecessary chip, an inspection signal is sent to the channel. , So that the inspection time is shortened by preventing the flow of the inspection data selectively.

When the card layout is determined as described above and the layout of the cards is completed, a command is issued from the computer 14 shown in FIG. But,
This is performed for each chip on the actual wafer by sequentially moving the probe needles of the probe card according to the card layout.

When the above program is created on a computer provided separately from the probe device, the program created here is recorded on a floppy disk or the like, and loaded into the computer 14 of the probe device. As a result, the actual measurement and inspection of the chips on the wafer are performed as described above.

In this case, since the card allocation operation is performed by a computer other than the probe device, the probe device can be operated during that time, and the throughput can be greatly improved.

Since the card allocation operation can be performed based on the wafer map graphically displayed based on the wafer size, chip size, card information, etc., the card allocation can be performed without using an actual semiconductor wafer or probe device. Operations can be performed.

Further, since the card allocation position (layout) can be displayed so as to be superimposed on the graphic-displayed chip, the operator can easily visually recognize the card layout status, and can easily check the card layout. It is possible to reliably suppress the occurrence of an erroneous setting of the allocation operation.

In the above embodiment, FIG.
As described above, the card information has a multi-number of 4 and a location of X. However, the present invention is not limited to this, and it is needless to say that the present invention can be applied to a probe card of any card information.

[0067]

As described above, according to the probe card allocating apparatus of the present invention, the following excellent operational effects can be exhibited. The probe cards can be allocated while looking at the semiconductor wafers and chips displayed graphically. Therefore, since a desired card layout can be set on software without using an actual semiconductor wafer or a probe device, the utilization rate of the probe device can be reduced without occupying the probe device for allocating the probe card. To increase the throughput.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an apparatus for allocating a probe card according to the present invention.

FIG. 2 is a block diagram of a computer constituting a device for allocating a probe card.

FIG. 3 is a configuration diagram illustrating an automatic allocation mode of a card allocation unit illustrated in FIG. 2;

FIG. 4 is a configuration diagram illustrating an optimal allocation mode of a card allocation unit.

FIG. 5 is a configuration diagram illustrating an arbitrary allocation mode of a card allocation unit.

FIG. 6 is a flowchart showing a flow when allocating a probe card.

FIG. 7 is a flowchart showing a flow when allocating a probe card.

FIG. 8 is a flowchart showing a flow when allocating a probe card.

FIG. 9 is a flowchart showing a flow when allocating a probe card.

FIG. 10 is a flowchart showing a flow when allocating a probe card.

FIG. 11 is a diagram illustrating a display state of a display unit when a probe card is allocated.

FIG. 12 is a diagram schematically showing a part of a calculation process at the time of probe card allocation.

FIG. 13 is a diagram illustrating an example of a display state of a display unit when card allocation is completed.

FIG. 14 is a diagram showing an initial screen of a display unit.

FIG. 15 is a schematic configuration diagram showing a general probe device.

FIG. 16 is a plan view showing a state of a chip formed on a semiconductor wafer.

FIG. 17 is a plan view showing an example of a probe card.

FIG. 18 is a plan view showing an example of the shape of a chip.

FIG. 19 is a diagram showing a measurable chip arrangement of a probe card having two multis.

FIG. 20 is a diagram showing a measurable chip arrangement of a probe card having four multis.

FIG. 21 is a diagram showing a measurable chip arrangement of a probe card having eight multis.

[Description of Signs] 2 Probe device 4 Probe body 6 Wafer mounting table 8 Probe needle 10 Probe card 12 Test head 14 Computer 16 Display 18 Microscope 22 Allocation device 24 Display means 26 Storage device 28 Control device 30 Keyboard 32 Mouse 34 Input means 38 display unit 40 display control unit 42 coordinate calculation unit 44 chip coordinate storage unit 46 file storage unit 48 card allocation mode storage unit 50 menu storage unit 52 card allocation unit 54 automatic allocation unit 56 optimal allocation unit 58 arbitrary allocation unit 74 mouse pointer C Chip GW Semiconductor wafer image GC Chip image W Semiconductor wafer

Claims (2)

(57) [Claims] 1. A method of allocating a probe card when inspecting electrical characteristics of a large number of chips formed on a semiconductor wafer using a probe card having probe needles capable of simultaneously contacting a plurality of chips. In the apparatus for allocating a probe card to be performed, input means, coordinate calculating means for arranging chips on the image on a wafer on the image based on the wafer information and chip information and giving coordinates to each chip, and the coordinate calculating means. A chip coordinate storage unit that stores the obtained coordinates and chips in association with each other, an allocation mode storage unit that stores a plurality of card allocation modes in advance, information of the chip coordinate storage unit, information of the allocation mode storage unit, and a probe card Card allocation means for setting a card allocation position based on the information of the A card allocation position storage unit for storing the card allocation position set by the card allocation unit in association with the chip; and laying out and displaying each chip on the image on a wafer on the image based on information in the chip coordinate storage unit. And a display means for displaying card allocation position information based on the information in the card allocation position storage section. 2. The probe card allocating apparatus according to claim 1, further comprising a menu storage section for storing a plurality of menus.