JP2959542B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device,
In particular, an IC such as a memory IC is mounted on a printed wiring board.
The present invention relates to a semiconductor device including a memory module equipped with a semiconductor device.

[0002]

2. Description of the Related Art Conventionally, there are two types of memory modules, a memory module called an unbuffer type (UnbufferType) and a memory module called a buffer type. FIGS. 3 and 4 show the configuration of a conventional memory module. In addition,
FIG. 3 shows an unbuffer type (Unbuffer Ty).
FIG. 4 is a schematic plan view of a memory module called a buffer type (Buffer Type).
FIG. 4 is a schematic plan view of a memory module called e).

An unbuffer type memory module 30 as shown in FIG. 3 has a plurality of memory ICs 32 mounted on a printed wiring board 31. The control signals of the memory IC are directly connected to the substrate pads 34 through the bus lines 33, respectively. Then, for example, the input signal (RAS signal / CAS signal) is
Are connected directly to the RAS pin 36 and the CAS pin 37 of the memory IC 32 through some of the terminals of the connection terminal group (hereinafter, also simply referred to as “pad group”) arranged on one side of the memory IC 32.

A memory module 40 called a buffer type shown in FIG. 4 is different from that shown in FIG.
After each input signal is once input from the substrate pad 44 to the amplifying IC 45 and amplified, it passes through the bus wiring 43 and
The data is input to each memory IC 41. In addition, IC for amplification
Reference numeral 45 denotes an OE (Output Enable) signal, which is normally fixed at the Vcc level and is in an enable state.

The amplification IC used for the buffer type includes a buffer as shown in FIG. 5 and a register (Register) used for a synchronous memory module as shown in FIG.

FIG. 6 is a timing chart showing the operation of the buffer 50 shown in FIG. In FIG. 6, the input signal is simply amplified through the circuit of the buffer 50 and output. In this case, since a delay time occurs between the input (IN) and the output (OUT), the setup / hold (Set) is performed.
Attention must be paid to changes in AC characteristics such as up / Hold).

A register 70 (Register) shown in FIG.
FIG. 8 is a timing chart showing the operation of r).
In FIG. 8, the input signal is latched by DF / F, and then output by the rising signal of CLK. The register 70 is used in a synchronous memory module. In this case, a command input from the outside enters the memory IC with a delay of one cycle. Therefore, the unbuffer type (Unbuffe
It cannot be used in the system for rType).

[0008]

In the above-mentioned conventional technology, the first problem is that, for example, the replacement of a personal computer (PC) by the user causes the system to become unbuffered. For example, when the buffer type is changed to the corresponding type, or when the number of pads (hereinafter referred to as “pin number”) changes,
There is a problem in that the conventional memory module cannot be used and must be replaced.

That is, the first problem is that there are a buffer type and an unbuffer type in a memory module. In particular, in a buffer type using a register, an input command is transmitted to a memory IC with a delay of one cycle. Therefore, the control system is different from the unbuffer type, and the compatibility between the two is lost. Also,
This is because when the pin number changes, the compatibility between the module and the socket is physically lost.

The second problem is that when manufacturing a buffer type memory module, the number of steps tends to increase as compared with the unbuffer type memory module.

That is, the reason for the second problem is usually
Testing is performed to detect defects during assembly (such as soldering defects). If there is a defective memory IC,
Only the IC is repaired (replacement with a non-defective product) so that all the memory ICs finally operate normally.

In the case of the buffer type, if there is any defect in the buffer IC, the control signal cannot be output correctly, so that all the memory ICs cannot operate normally, and the presence or absence of the defect of the memory IC and the defect are present. In this case, it is not known which IC is defective. In this case, first, the buffer IC is repaired, and then the second test is performed, thereby detecting a defect in the memory IC.
This is because the defective memory IC is repaired again.

A third problem is that when manufacturing a buffer type memory module, the reliability of the substrate and the mounted LSI may be lower than that of the unbuffer type memory module. The reason is that, as described in the second problem, by performing the repair operation twice, extra heat stress is applied to the IC such as the printed wiring board and the mounting LSI by the repair operation. is there.

[0014]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object the purpose of allowing a user to replace a PC with a system buffer / unbuffer (Buffer / U buffer).
Even if nbuffer) is changed, it is possible to avoid having to buy a new memory module, and it is possible to avoid a reduction in man-hours and a decrease in the reliability of the board, especially in the manufacture of a buffer-type memory module. It is to provide a semiconductor device.

[0015]

In a semiconductor device according to the present invention, a plurality of connection terminals for different purposes are provided on each of a plurality of sides of a printed wiring board on which a plurality of ICs are mounted.
Only, characterized by the this <br/> using the connection terminals of the selected edge in accordance with the purpose (claim 1), which makes it possible to achieve the above object.

Further, in the semiconductor device according to the present invention, the connection terminal group is connected to the plurality of LSIs in different forms (claim 2); and the connection terminal group is at least two. And one is configured to function as a buffer type module and the other is configured to function as an unbuffer type (claim 3). The connection terminal group is disposed on a long side of the printed wiring board. (Claim 4) ・ The connection terminal group is set to have a different number of terminals (Claim 5).

(Operation) In the semiconductor device according to the present invention, a pad group is provided on a plurality of sides (for example, both sides of a long side) of a printed wiring board on which ICs such as a plurality of memory ICs are mounted, and any one of them is used. And can be used as semiconductor devices having different configurations. Therefore, (1). Even if the system compatible with the memory module is changed due to replacement of a PC or the like, the user does not need to newly purchase a device compatible with the specification change. (2). When a semiconductor device is manufactured, even if a buffer-type configuration is provided, the unbuffer-type configuration enables the use of an unbuffer-side pad group suitable for testing, thereby improving efficiency. Testing can be performed. (3). In addition, IC (LS) mounted on a printed wiring board
If there is a defect in I), as described in (2) above, since the repair work of the defective IC can be performed efficiently by efficient testing, extra thermal stress is applied to the printed wiring board and the mounted IC. It is not necessary to use the printed circuit board, and the reliability of the printed wiring board can be prevented from being lowered.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a preferred embodiment according to the present invention will be described in detail with reference to FIGS. FIG. 1 is a plan view showing a first embodiment of the semiconductor device according to the present invention, and FIG. 2 is a plan view showing a second embodiment of the semiconductor device according to the present invention.

(First Embodiment) A memory module 1 which is a semiconductor device according to a first embodiment shown in FIG.
0 denotes a plurality of memory ICs 1 on the printed circuit board 11.
2 (eight memory ICs in the figure). In the present embodiment, a pad group (connecting terminal group) including a plurality of pads (connecting terminals) includes upper and lower sides (in the drawing, a lower pad group including lower pad 14A, an upper pad). 14B (upper pad group consisting of 14B).

In actual use, one of the upper and lower pads is appropriately inserted into a socket. Also,
The amplification IC 15 shown in FIG. 1 includes a buffer (Buffe).
r), but can be replaced with a register.

When a pad group having the lower pad 14A is used, input signals (RAS signal and CAS signal) pass through the amplifying IC 15 and the memory I through the bus wiring 13.
Input to C12. Thus, the memory module 10 can be used as a buffer type memory module. At this time, the buffer O
The E signal is connected to the Vcc pad (but separated from the Vcc in the substrate), and the buffer is in the enable state.

On the other hand, when a pad group having the upper pad 14B is used, signals (RAS signal, CAS signal) input from the pad 14B are directly input to the memory IC 12 through the bus wiring 13. This allows the memory module 10 to be used as an unbuffered memory module. At this time, the OE signal of the buffer is connected to the GND pad (but disconnected from the GND in the substrate), and the buffer is in the disable state, that is, the output is in the Hz state, and the input from the pad is performed. The signal does not interfere at all.

(Second Embodiment) In a memory module 20, which is a semiconductor device according to a second embodiment shown in FIG. 2, a pad group having an upper pad 24B and a lower pad 24A in the drawing. Are different in the number of pins (the number of pins) from the pad group having. In the reference numerals in the figure, 21 is a printed wiring board, 22 is a memory IC, 23 is a bus wiring, and 25 is an amplifying IC having a buffer function. In the present embodiment, the number of pins of the pad group having the upper pad 24B is 168.
A pad group which is a pin and has a lower pad 24A is:
200 pins.

As described above, when a plurality of pad groups having different numbers of pins are provided, for example, when a pad group having the upper pad 24B is used, 168 pins (168 pi) are used.
n) can be used as a configuration of an unbuffer type memory module. When a pad group having a lower pad 24A is used, 200 pins (200p
in) can be used as a configuration of a buffer type memory module.

[0025]

As described above, in the semiconductor device according to the present invention, as a first effect, it is possible to use each pad group arranged on a plurality of sides of a printed wiring board. It can be selectively used as both the buffer type and the unbuffer type, and the number of pins of the pad group can correspond to a plurality of types. Even if the system corresponding to the module changes, it can cope with the change, the versatility can be improved, and there is no need to replace a new device with the specification change.

In the semiconductor device according to the present invention, as a second effect, the connection terminal group has a different form from the plurality of LSIs, for example, a form having a buffer type module function, and a form having an unbuffer type module function. In the case where the terminal is configured to have a configuration, even if the amplifying IC is defective, the presence or absence of a defect in the memory IC can be easily confirmed by performing unbuffer-type testing so that one pair operation can be performed. Therefore, the number of manufacturing steps can be reduced.

Further, the semiconductor device according to the present invention has a third feature.
As described above, as described above, when a defect of an IC such as a memory IC is found, only one repair operation is required, so that extra heat stress on the printed wiring board and the IC mounted on the board is reduced. Can be avoided and reliability can be increased.

[Brief description of the drawings]

FIG. 1 is a schematic plan view showing a first embodiment of a semiconductor device according to the present invention.

FIG. 2 is a schematic plan view showing a second embodiment of the semiconductor device according to the present invention.

FIG. 3 is a schematic plan view of a conventional unbuffer type memory module.

FIG. 4 is a schematic plan view of a conventional buffer-type memory module.

FIG. 5 is a schematic plan view of a buffer IC.

FIG. 6 is a timing chart showing the operation of the buffer IC.

FIG. 7 is a schematic plan view of a register IC.

FIG. 8 is a timing chart showing the operation of the register IC.

[Explanation of symbols]

 10,20 Semiconductor device (memory module) 11,21 Printed wiring board 12,22 Memory IC 13,23 Bus wiring 14A, 14B, 24A, 24B Connection terminal (pad) 15,25 Amplification IC

Claims (5)

(57) [Claims] A connection terminal having a different purpose for use on each of a plurality of sides of a printed wiring board on which a plurality of ICs are mounted.
And a connection terminal group on the side selected according to the purpose.
A semiconductor device characterized by being used . 2. The semiconductor device according to claim 1, wherein the connection terminal group is connected to the plurality of LSIs in different forms. 3. At least two connection terminal groups are provided, one of which functions as a buffer type module,
3. The semiconductor device according to claim 1, wherein the other is configured to function as an unbuffer type. 4. The semiconductor device according to claim 1, wherein said connection terminal group is arranged on a long side of said printed wiring board. 5. The connection terminal group according to claim 1, wherein the number of terminals is different from each other.
5. The semiconductor device according to any one of items 1 to 4.