JP2953966B2 - Manufacturing method of bipolar transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a bipolar transistor, and more particularly to a method for manufacturing a high-output bipolar transistor having a ballast resistor.

[0002]

2. Description of the Related Art Bipolar transistors are characterized by being superior in power density and breakdown voltage as compared with field effect transistors. For this reason, research and development of microwave or millimeter wave high output power amplifiers using heterojunction bipolar transistors (hereinafter referred to as "HBTs") using not only silicon (Si) but also compound semiconductors have been actively conducted.

In general, a high-output HBT has a multi-finger configuration in which a plurality of transistors are arranged in parallel. However, during operation, a temperature rise occurs in a central transistor, and as a result, current concentrates on the central transistor.
Further, there is a problem that a positive feedback type thermal runaway occurs in which the temperature of this portion rises.

As a conventional method for solving this problem, there is a method of connecting a resistor in series to the emitter of each transistor to suppress current concentration. This resistance is called a ballast resistance, and it has been reported that the resistance is effective when the resistance is almost equal to the emitter resistance of the transistor (GB Gao et al.
l.), IEE Transactions
On Electron Devices (IEEE Transactions
on Electron Devices), Vol. 36, 854-863
P. May 1989).

FIG. 4A is a plan view of a semiconductor chip for explaining the structure of a conventional high-power HBT.
FIG. 4B is a sectional view taken along line AA ′ of FIG.

Referring to FIG. 4, a conventional high power HBT semiconductor chip includes a semi-insulating GaAs substrate 1 and an n-type GaAs substrate.
s, a collector contact layer 2 of n-type GaAs, a base layer 4 of p-type GaAs, an emitter layer 5 of n-type AlGaAs,
An emitter cap layer 6 of type InGaAs, an emitter electrode 7 of a refractory metal such as silicide WSi of W, a base electrode 8 of AuMn, and an AuGeN
i, a collector electrode 9, an interlayer insulating film 10, and a wiring 12
, An insulating region 13, a ballast resistor 14 made of tungsten silicide containing nitrogen, and a SiO ₂ side wall 15.

[0007] The ballast resistor 14 is formed as a thin film resistor between the ballast resistor 14 and the wiring 12 through a through hole 16 opened on the emitter electrode 7. Have been.

[0008]

As described above, in the conventional bipolar transistor, since the ballast resistor 14 is arranged at a position distant from the transistor portion, the ballast resistor 14 causes an increase in chip area. There is a problem that the degree of freedom is significantly reduced.

More specifically, for example, if the emitter area of each transistor constituting the multi-finger is 10 μm ² , the emitter resistance of the transistor having the structure shown in FIG. A degree of ballast resistance is required.

If this is to be realized with a thin film resistor as shown in FIG. 4, the case where a tungsten silicide containing nitrogen having a sheet resistance of 100 Ω / □ (which is realized with a nitrogen partial pressure during sputtering of about 13%) is used. The ratio of the length (distance between the electrodes of the resistor) and the width of the resistor is 1: 5.

In consideration of the influence of side etching when processing the resistor thin film, the length of the resistor is required to be about 2 μm. As a result, in the conventional bipolar transistor, the area of the ballast resistor 14 is reduced by the resistance excluding the electrodes. It is 20 μm ² only for the body part.

Further, in the conventional semiconductor chip, a ballast resistor is formed on the interlayer insulating film after the transistor portion is manufactured, so that the manufacturing process becomes complicated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide a method of manufacturing a bipolar transistor in which a ballast resistor can be easily formed and the degree of freedom in pattern layout is significantly improved. To provide.

[0014]

SUMMARY OF THE INVENTION A bipolar tiger according to the present invention.
The method of manufacturing a transistor includes the steps of: forming a first half of a first conductivity type on a substrate;
Conductor layer, second semiconductor layer of second conductivity type, and first conductivity type
Sequentially depositing and forming a third semiconductor layer,
Forming a metal film and a resistor thin film on the third semiconductor layer;
The resistor thin film, the metal film, and the third half.
Conductive layer anisotropic dry etching using the same mask
No, ballast resistor, emitter electrode, and emitter mesa
And forming a.

Further, the bipolar transistor of the present invention is manufactured
The method of manufacturing, wherein the resistor thin film is made of tungsten containing nitrogen.
It is characterized by being made of silicide .

[0016]

In the present invention, since the ballast resistor is formed immediately above the emitter mesa, the ballast resistor can be arranged at the same place as the transistor, so that the chip area is reduced and the layout flexibility is increased.

Further, according to the manufacturing method of the present invention, since the emitter electrode and the ballast resistor can be formed collectively, the manufacturing process can be shortened.

[0018]

Embodiments of the present invention will be described below with reference to the drawings.

[0019]

Embodiment 1 FIG. 1 is a sectional view of a semiconductor chip for explaining a heterojunction bipolar transistor (referred to as "HBT") according to an embodiment of the present invention.

In this embodiment, the semiconductor chip comprises a semi-insulating GaAs substrate 1, a collector contact layer 2 made of n-type GaAs, and a collector layer 3 made of n-type GaAs.
And a base layer 4 made of p-type GaAs and an n-type AlGa
An emitter layer 5 composed of As, an emitter cap layer 6 composed of n-type InGaAs, an emitter electrode 7 composed of WSi, a base electrode 8 composed of AuMn, and AuGeN.
i, a collector electrode 9 made of i, an insulating region 13, a ballast resistor 14 made of tungsten silicide containing nitrogen,
And SiO ₂ side walls 15.

Referring to FIGS. 2 and 3, a sectional view of the bipolar transistor according to the embodiment of the present invention shown in FIG. 1 in the order of the manufacturing steps will be described below. FIG. 3 is drawn separately from FIG. 2 merely for convenience of drawing.

First, as shown in FIG.
-Type GaAs collector contact layer 2, n-type GaAs collector layer 3, p-type GaAs base layer 4, n-type GaAs emitter layer 5, and emitter cap layer 6 sequentially grown on a semi-insulating substrate 1 composed of Unnecessary parts are made to have high resistance by proton ion implantation. This region becomes the insulating region 13.

Next, a high melting point metal such as W
An Si film 17 and a resistor thin film, for example, a tungsten silicide film 11 containing nitrogen are formed by a sputtering method.

In this embodiment, when WSi is used as the material of the metal film and tungsten silicide containing nitrogen is used as the resistor material, the nitrogen gas is supplied from the middle of the sputtering in the same sputtering apparatus. Since both the metal film and the resistor thin film can be formed simultaneously, the process can be significantly reduced.

20 Ω required when the emitter area of each transistor constituting the multi-finger is 10 μm ²
In order to construct a ballast resistor of about the same degree, the nitrogen partial pressure during sputtering of the resistor thin film should be about 40% (the specific resistance ρ at this time is about 5 × 10 ⁴ μΩ · cm), and the thickness of the resistor thin film 500
nm.

Next, as shown in FIG. 2B, using the photoresist as a mask, the tungsten silicide film 11 containing nitrogen and the WSi film 17 are patterned by reactive ion etching (RIE) using SF ₆ gas. As a result, the ballast resistor 14 and the emitter electrode 7 are formed.

Further, as shown in FIG. 2C, the emitter cap layer 6 and the emitter layer 5 are successively etched using the same mask by reactive ion beam etching (RIBE) using chlorine plasma to form the p-type GaAs base layer 4. To form an emitter mesa, that is, a mesa structure in the emitter region.

Next, as shown in FIG. 3 (D), after forming the SiO ₂ film on the entire surface of the wafer, by anisotropic etching by reactive ion etching (RIE) using CF ₄ gas, SiO ₂ The side wall 15 is formed.

Thereafter, as shown in FIG. 3E, an Au-based alloy such as AuMn is formed on the entire surface of the wafer by a vacuum evaporation method, and is patterned by an ion milling method using a photoresist as a mask to form a base electrode 8. Form.

Subsequently, after the photoresist film is removed by washing with an organic solvent, the base layer 4 and the collector layer are mixed with a mixture of phosphoric acid, hydrogen peroxide and water using a new photoresist of a predetermined pattern as a mask. The layer 3 is sequentially etched and removed, the surface of the n-type GaAs collector contact layer 2 is exposed, and a collector electrode 9 of AuGeNi is formed by a lift-off method, thereby forming a bipolar transistor having a structure as shown in FIG. .

In the bipolar transistor according to the present embodiment, providing the ballast resistor immediately above the emitter mesa has the effects of significantly reducing the chip area and improving the degree of freedom in pattern layout. Further, according to the above-described manufacturing method, since the emitter electrode and the ballast resistor can be formed at once, there is an effect that the manufacturing process can be shortened.

Although the present invention has been described with reference to the above embodiment, the present invention is not limited to the above embodiment but includes various embodiments according to the principle of the present invention.

That is, in the above embodiment, the base layer is made of GaAs. However, the present invention is not limited to this. For example, a p-type Al _x G
a _-x As composition graded layer or p-type In _x Ga _{1 -x} As composition graded layer (x = 1 → 0), n-type In
The present invention can be similarly applied to any of bipolar transistors in which the material system is variously changed, such as those using GaP, and the same effects as those of the above embodiment can be obtained.

[0034]

As described above, according to the present invention, a ballast resistor, which occupies a large area on a conventional semiconductor chip, is provided immediately above the emitter mesa, thereby significantly reducing the chip area and improving the freedom of pattern layout. It has the effect of doing.

According to the manufacturing method of the present invention, since the emitter electrode and the ballast resistor can be formed at once,
This has the effect that the manufacturing process can be shortened.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor chip for explaining a bipolar transistor according to one embodiment of the present invention.

FIG. 2 is a sectional view of a semiconductor chip shown in a process order for describing a method of manufacturing the bipolar transistor shown in FIG. 1;

FIG. 3 is a sectional view of the semiconductor chip shown in the order of steps (continued from FIG. 2) for describing the method of manufacturing the bipolar transistor shown in FIG. 1;

FIG. 4A is a plan view of a semiconductor chip for explaining a conventional bipolar transistor. (B) is a sectional view taken along line AA ′ of (A) a plan view.

[Explanation of symbols]

Reference Signs List 1 semi-insulating GaAs substrate 2 n-type GaAs collector contact layer 3 n-type GaAs collector layer 4 p-type GaAs base layer 5 n-type AlGaAs emitter layer 6 n-type InGaAs emitter cap layer 7 emitter electrode 8 base electrode 9 collector electrode 10 interlayer insulation Film 11 Resistor thin film 12 Wiring 13 Insulation region 14 Ballast resistor 15 SiO ₂ side wall 16 Through hole 17 Refractory metal film

Claims (2)

(57) [Claims] A step of sequentially depositing and forming a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a third semiconductor layer of a first conductivity type on a substrate. Forming a metal film and a resistor thin film on the third semiconductor layer, and performing anisotropic dry etching on the resistor thin film, the metal film, and the third semiconductor layer using the same mask to form a ballast. Forming a resistor, an emitter electrode, and an emitter mesa. 2. A manufacturing method of the resistor thin film, bipolar transistor according to claim 1, wherein the tungsten silicide containing nitrogen.