JP2947330B2 - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP2947330B2
JP2947330B2 JP7023811A JP2381195A JP2947330B2 JP 2947330 B2 JP2947330 B2 JP 2947330B2 JP 7023811 A JP7023811 A JP 7023811A JP 2381195 A JP2381195 A JP 2381195A JP 2947330 B2 JP2947330 B2 JP 2947330B2
Authority
JP
Japan
Prior art keywords
semiconductor device
lead
metal plate
stem base
light receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP7023811A
Other languages
Japanese (ja)
Other versions
JPH08222745A (en
Inventor
芳弘 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP7023811A priority Critical patent/JP2947330B2/en
Publication of JPH08222745A publication Critical patent/JPH08222745A/en
Application granted granted Critical
Publication of JP2947330B2 publication Critical patent/JP2947330B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Landscapes

  • Light Receiving Elements (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はステムを有する半導体装
置の構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a semiconductor device having a stem.

【0002】[0002]

【従来の技術】従来の受光素子を有する半導体装置を図
5乃至図8に示す。
2. Description of the Related Art A conventional semiconductor device having a light receiving element is shown in FIGS.

【0003】図5(a)及び図5(b)は受光素子をリ
ード部に直接マウントした半導体装置の一例(以下,従
来例1と呼ぶ)を示す図である。図5(a)及び図5
(b)に示すように,半導体装置は,リード孔部1,1
を有するステムベース2にリード3,及び一端部を潰し
た変形リード4を封止ガラス5,5にて固定する。次
に,一端を折り曲げて平たく潰した変形リード4のこの
一端部に受光素子6を固定し,この受光素子6の上面と
リードの一端とを金属配線7によって,接続し,さら
に,低融点ガラス8によって開口に固定されたガラス板
9を備えたキャップシェル10で覆って完成されてい
る。
FIGS. 5A and 5B are views showing an example of a semiconductor device in which a light receiving element is directly mounted on a lead portion (hereinafter referred to as Conventional Example 1). FIG. 5 (a) and FIG.
As shown in FIG. 2B, the semiconductor device has the lead holes 1, 1
The lead 3 and the deformed lead 4 whose one end is crushed are fixed to the stem base 2 having Next, a light receiving element 6 is fixed to one end of the deformed lead 4 whose one end is bent and crushed flat, and the upper surface of the light receiving element 6 and one end of the lead are connected by a metal wiring 7, and the low melting glass Completed by a cap shell 10 with a glass plate 9 secured to the opening by 8.

【0004】図6(a)及び図6(b)は,受光素子を
リード部に直接マウントした半導体装置の他の例(以
下,従来例2と呼ぶ)を示す図である。図6(a)及び
図6(b)に示すように,半導体装置は,リード孔部
1,1を有するステムベース2にリード2,溶接するた
めの溶接リード11を封止ガラス5,5にて固定する。
FIGS. 6A and 6B are views showing another example (hereinafter referred to as Conventional Example 2) of a semiconductor device in which a light receiving element is directly mounted on a lead portion. As shown in FIGS. 6A and 6B, in the semiconductor device, the lead 2 for welding to the stem base 2 having the lead holes 1 and 1 is welded to the sealing glasses 5 and 5. And fix it.

【0005】次に,溶接リード11の一端にマウント板
12の下面を溶接し,これに受光素子6を固定し,この
受光素子6の上面とリード3の一端とを金属配線7によ
って,接続し,さらに,低融点ガラス8によって開口に
固定されたガラス板9を備えたキャップシェル10で覆
って完成されている。
Next, the lower surface of the mounting plate 12 is welded to one end of the welding lead 11, the light receiving element 6 is fixed thereto, and the upper surface of the light receiving element 6 and one end of the lead 3 are connected by metal wiring 7. , And is completed by covering with a cap shell 10 having a glass plate 9 fixed to an opening by a low melting point glass 8.

【0006】図7は図6の半導体装置のリード部の変形
例を示す図であり,図7(a)は断面図,図7(b)は
キャップシェルを外したときの上面図である。図7
(a)及び図7(b)に示すように,溶接リードのマウ
ント板13は長方形の長辺が三角状に突出した5角形状
を有する。この変形例では,図6の例よりも,搭載面積
を広げることができる。
FIG. 7 is a view showing a modification of the lead portion of the semiconductor device shown in FIG. 6. FIG. 7A is a sectional view, and FIG. 7B is a top view when the cap shell is removed. FIG.
As shown in (a) and FIG. 7 (b), the mounting plate 13 of the welding lead has a pentagonal shape in which the long sides of the rectangle protrude in a triangular shape. In this modification, the mounting area can be increased as compared with the example of FIG.

【0007】図8(a)は受光素子6をステムベース2
に直接またはセラミック板15を介してマウントした従
来の半導体装置のもう一つの他の例(以下,従来例3と
呼ぶ)を示す断面図であり,図8(b)は図8(a)の
半導体装置の平面図である。
FIG. 8A shows a light receiving element 6 connected to a stem base 2.
FIG. 8B is a cross-sectional view showing another example (hereinafter, referred to as Conventional Example 3) of a conventional semiconductor device mounted directly or via a ceramic plate 15 in FIG. 8B. It is a top view of a semiconductor device.

【0008】図8(a)及び(b)に示すように,半導
体装置は,リード孔部1,1を有するステムベース2に
リード3,3を封止ガラス5,5にて夫々固定する。次
に,ステム2の中心に角形セラミック板14を搭載し
て,この上受光素子6を固定し,受光素子6の上下面
と,リード3,3の一端とを金属配線7を介して接続す
る。さらに,低融点ガラス8によって開口に固定された
ガラス板9を備えたキャップシェル10で覆って形成さ
れている。
As shown in FIGS. 8A and 8B, in the semiconductor device, leads 3 and 3 are fixed to a stem base 2 having lead holes 1 and 1 with sealing glasses 5 and 5, respectively. Next, a square ceramic plate 14 is mounted on the center of the stem 2 and the upper light receiving element 6 is fixed, and the upper and lower surfaces of the light receiving element 6 are connected to one ends of the leads 3 and 3 via the metal wiring 7. . Further, it is formed so as to be covered with a cap shell 10 having a glass plate 9 fixed to an opening by a low melting point glass 8.

【0009】[0009]

【発明が解決しようとする課題】しかし,前述した従来
の半導体装置用ステムベースには,リードを封止するた
めのリード孔があるため,部品搭載領域を確保するため
には,ステムベースの外径を大きくするか,リード孔を
小さくするか,部品搭載用のマウント板を別途設置する
という3つの方法が前述したように考えられている。
However, since the conventional stem base for a semiconductor device described above has a lead hole for sealing a lead, it is necessary to secure a component mounting area by using an outside of the stem base. As described above, three methods of enlarging the diameter, reducing the lead hole, and separately installing a mounting plate for mounting components are considered.

【0010】このうちで,ステムベースの外径を大きく
する方法は,現状のステムベースと同じ大きさで,部品
搭載面積を確保することが課題であるため論外である。
Among them, the method of increasing the outer diameter of the stem base is out of the question because it is a problem to secure the parts mounting area with the same size as the current stem base.

【0011】また,リード孔を小さくする方法は,有効
な方法であるが,リード孔を小さくするためにプレス加
工時の金型(ポンチ)を小さくしなければならないた
め,金型が破損し易く,量産性に乏しい。したがって,
リード孔を小さくするためには,切削による加工を行わ
なければならず,プレス加工した場合に対して,5〜1
0倍のコストアップになるという問題が生じた。
Although the method of reducing the lead hole is an effective method, the die (punch) at the time of press working must be reduced in order to reduce the lead hole. , Poor mass production. Therefore,
In order to make the lead hole smaller, machining by cutting must be performed.
There is a problem that the cost is increased by a factor of 0.

【0012】さらに,部品搭載用のマウント板を設置す
る方法として,従来例1乃至3の場合について考える。
Further, as a method of installing a mount plate for mounting components, the cases of Conventional Examples 1 to 3 will be considered.

【0013】従来例1及び2の構造では,部品搭載部を
形成する方法として,リードを折り曲げてつぶす方法と
マウント板にリードを溶接する方法があるため,それぞ
れの場合について考える。まず,前者の従来例1の方法
では,リード径0.35mm〜0.45であるために,
あまり部品搭載面積を大きくすると,部品搭載部が破損
したり,搭載した部品や金属配線が破損するという問題
がある。また,従来例2の方法では,図7に示すよう
に,大きなマウント板を溶接する場合,接合する部分が
小さいため,マウント板がステムベースの下面に対して
傾き,受光素子の特性が劣化するという問題があった。
また,マウント板を大きくすると重なるため,振動・衝
撃に弱いという不具合も発生する。
In the structures of the conventional examples 1 and 2, there are a method of forming a component mounting portion by bending a lead and crushing the lead and a method of welding the lead to a mounting plate. First, in the former method of Conventional Example 1, since the lead diameter is 0.35 mm to 0.45,
If the component mounting area is too large, there is a problem that the component mounting portion is damaged, and the mounted components and metal wiring are damaged. In addition, in the method of Conventional Example 2, as shown in FIG. 7, when a large mounting plate is welded, the portion to be joined is small, so that the mounting plate is inclined with respect to the lower surface of the stem base, and the characteristics of the light receiving element deteriorate. There was a problem.
In addition, when the mounting plates are enlarged, they overlap with each other.

【0014】そこで,本発明の技術的課題は,より広い
搭載面積をもち,多くの部品を搭載することができるの
で,部品点数の多い半導体装置を製造することができる
半導体装置を提供することにある。
[0014] Therefore, technical problems of the present invention has a wider mounting area, it is possible to mount many parts, to provide a semiconductor device capable of manufacturing a semiconductor device with many parts It is in.

【0015】[0015]

【課題を解決するための手段】本発明によれば,ステム
ベースと,前記ステムベースを貫通し,封止材により前
記ステムベースに固定されたリード部材と,前記リード
部材の一端に接続された受光素子とを備えた半導体装置
において,前記リードの位置に対応した部分を切欠かれ
た金属板を前記ステムベース上に搭載し,前記金属板上
に前記受光素子を搭載してなり、前記前記金属板は、前
記ステムベースに接触する一端面の周縁部に段差が形成
されていることを特徴とする半導体装置が得られる。
According to the present invention, a stem base, a lead member that penetrates the stem base, is fixed to the stem base by a sealing material, and is connected to one end of the lead member. in the semiconductor device having a light receiving element, a metal plate cut out a portion corresponding to the position of the lead mounted on said stem base makes equipped with a light receiving element on the metal plate, wherein the metal The board is in front
A step is formed on the peripheral edge of one end face that contacts the stem base
Thus , a semiconductor device characterized by being performed as described above is obtained.

【0016】[0016]

【0017】ここで,本発明において,前記金属板は,
前記リード部材を含むステムベース領域よりも外側に位
置する部分を有していることが好ましい。
[0017] Here, Oite the present invention, the metal plate,
Outer than the stem base region including the lead member
It preferred to have a portion that location.

【0018】また,本発明において,前記リード部材は
少なくとも2本の細長い導電材からなることが好まし
い。
[0018] Te present invention smell, the lead member is preferably comprised of at least two elongate conductive material.

【0019】また,本発明において,前記金属板に搭載
された電子部品を備えていることが好ましく,この電子
部品は,前記受光素子に電気的に接続されていることが
好ましい。そして,前記電子部品は,集積回路装置(I
C)であることがより好ましい。
Further, in the present invention, it is preferable that an electronic component mounted on the metal plate be provided, and that the electronic component be electrically connected to the light receiving element. The electronic component is an integrated circuit device (I
More preferably, C).

【0020】[0020]

【作用】本発明の半導体装置は,受光素子を搭載するス
テムベース上に金属板又はセラミック板を備えているの
で,搭載領域面積を広く確保することができる。
Since the semiconductor device of the present invention has a metal plate or a ceramic plate on a stem base on which a light receiving element is mounted, a large mounting area can be ensured.

【0021】[0021]

【実施例】以下,本発明の実施例について,図面を参照
して説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0022】図1(a)は本発明の実施例に係る半導体
装置を示す図で,図1(b)は図1(a)の半導体装置
のキャップシェル10を外したときの平面図である。図
1(a)及び(b)に示すように,半導体装置は,リー
ド孔部1,1を有するステムベース2にリード33を
貫通させて,封止ガラス5,5にて固定する。次に,こ
の上に金属板21を載せて,金属板21の上面の中央部
及びやや外周寄りの部分にチップコンデンサ23,23
を搭載し,中央部のチップコンデンサ23上に受光素子
6を固定し,この受光素子6の上面とリード3の一端及
び外周寄りのチップコンデンサ23の上面ともう一つの
リード3の一端を夫々金属配線7によって,接続し,さ
らに,低融点ガラス8によって開口に固定されたガラス
板9を備えたキャップシェル10で覆って形成されてい
る。この金属板21は,3本のリード3によって形成さ
れる円よりも,金属板21の外周面によって規定される
同心円が外側にある。即ち,リード3を含むステムベー
ス領域よりも外側に位置する部分を有している。尚,符
号30は,金属板21に搭載された集積回路(IC)で
ある。
[0022] FIG. 1 (a) is a diagram showing a semiconductor device according to real施例of the present invention, in a plan view when uncapped shell 10 of the semiconductor device in FIG. 1 (b) FIGS. 1 (a) is there. As shown in FIG. 1 (a) and (b), the semiconductor device is passed through the lead 3, 3 to the stem base 2 having a lead hole 1,1, fixed in sealing glass 5,5. Next, the metal plate 21 is placed thereon, and the chip capacitors 23, 23
Mounted, the light receiving element 6 is fixed onto the chip capacitors 2 3 of the central portion, another end of the lead 3 and one end and the outer periphery side of the chip capacitors 2 3 of the upper surface of the upper surface and the lead 3 of the light receiving element 6 Each is connected by a metal wiring 7 and further covered with a cap shell 10 having a glass plate 9 fixed to an opening by a low melting point glass 8. The metal plate 21 has a concentric circle defined by the outer peripheral surface of the metal plate 21 outside the circle formed by the three leads 3. That is, it has a portion located outside the stem base region including the lead 3. Reference numeral 30 denotes an integrated circuit (IC) mounted on the metal plate 21.

【0023】図2(a)は図1の金属板21を示す平面
図で,図2(b)は図1の金属板21を示す平面図であ
る。図2に示すように,金属板21は,リード封止部を
覆いかつリード3,3(図1参照)から絶縁されるた
め,U字型にくびれたU字形状部24を備えた形状を有
する。また,金属板21は,エッチング加工又はプレス
加工にて製作され,材質はkovar,Ni等の加工し
やすい材料から形成されている。また,リード3と金属
板21との絶縁抵抗は,1×1010Ω以上必要とされる
ため,リード3と金属板21との距離80μm以上とな
るように金属板のU字形状部24が設計されている。さ
らに,金属板21の下面には,図2(b)に示すような
段差25が形成されている。これは,ステムベース2と
金属板21とをAg−Cuろう材等で接着する際,封止
ガラス5の這い上がりを避けるためやキャップ溶接部に
ろう材が流れないようにするためである。金属板21
は,主に光学的な特性等の半導体装置の特性により決定
されるが,金属板21の加工を考えるのであれば,あま
り厚くない方が量産性は良い。
FIG. 2A is a plan view showing the metal plate 21 of FIG. 1, and FIG. 2B is a plan view showing the metal plate 21 of FIG. As shown in FIG. 2, since the metal plate 21 covers the lead sealing portion and is insulated from the leads 3 and 3 (see FIG. 1) , the metal plate 21 has a shape having a U-shaped portion 24 constricted in a U-shape. Have. The metal plate 21 is manufactured by etching or pressing, and is made of a material such as kovar or Ni which is easy to process. In addition, since the insulation resistance between the lead 3 and the metal plate 21 is required to be 1 × 10 10 Ω or more, the U-shaped portion 24 of the metal plate is set so that the distance between the lead 3 and the metal plate 21 is 80 μm or more. Designed. Further, a step 25 as shown in FIG. 2B is formed on the lower surface of the metal plate 21. This is because when the stem base 2 and the metal plate 21 are bonded with an Ag-Cu brazing material or the like, the sealing glass 5 is prevented from creeping up and the brazing material is prevented from flowing into the cap welding portion. Metal plate 21
Is determined mainly by the characteristics of the semiconductor device such as optical characteristics. However, if processing of the metal plate 21 is considered, mass production is better if the thickness is not too large.

【0024】次に,図1に示す実施例に係る半導体装置
の製造方法を簡単に説明する。
Next, briefly described a method of manufacturing a semiconductor device according to indicate to the real施例in FIG.

【0025】まず,ステムベース2とリード3を封
ラス5,5でガラス封止した後,金属板21をAg−C
uろう材でろう付けする。その後,NiメッキおよびA
uメッキを施す。このように,ステムが製造される。次
に,ステムに受光素子6やその他の部品をAu/Snろ
う材を用いてマウントし,金属配線7,7を行った後,
ステムにキャップシェル10を溶接する。以上のように
第1実施例に係る半導体装置が製造される。
[0025] First, after sealed with glass stem base 2 and the lead 3 by a sealing glass <br/> Las 5,5, a metal plate 21 Ag-C
u Braze with brazing material. Then, Ni plating and A
u plating is applied. Thus, a stem is manufactured. Next, the light receiving element 6 and other parts are mounted on the stem using Au / Sn brazing material, and metal wirings 7 and 7 are performed.
Weld the cap shell 10 to the stem. As described above, the semiconductor device according to the first embodiment is manufactured.

【0026】尚,本発明の実施例においては,ステムベ
ース2上に円形の金属板21を用いたが,これらは,円
形に限定されるものではなく,楕円形や多角形でも良
く,ステムベース2の形状及びキャップシェルの形状に
応じて適宜変更可能である。
In the embodiment of the present invention, the circular metal plate 21 is used on the stem base 2. However, the shape is not limited to a circle, and may be an ellipse or a polygon. It can be appropriately changed according to the shape of the base 2 and the shape of the cap shell.

【0027】[0027]

【発明の効果】以上説明したように,本発明では,シス
テム上の円形部品をマウントすることにより,同じ大き
さで従来の半導体装置よりも広い搭載面積をもち,多く
の部品を搭載することができるので,部品点数の多い半
導体装置を製造することができるとう効果を有する。
具体的には,従来の半導体装置に対して搭載面積は数倍
となり,部品搭載数は従来の数倍となった。また,多く
の部品を搭載することができるので,従来の同じ機能を
もつ半導体装置よりも小型化できるという効果を有す
る。
As described above, according to the present invention, by mounting a circular component on the system, it is possible to mount a larger number of components having the same size and a larger mounting area than a conventional semiconductor device. because it has the power sale effects have to be able to manufacture a semiconductor device with many parts.
Specifically, the mounting area is several times that of the conventional semiconductor device, and the number of components mounted is several times that of the conventional semiconductor device. Further, since many components can be mounted, there is an effect that the size can be reduced as compared with the conventional semiconductor device having the same function.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 (a)は本発明の実施例に係る半導体装置を示す図であ
る。 (b)は図1(a)の半導体装置のキャップシェル10
を外したときの平面図である。
1 (a) is a diagram showing a semiconductor device according to real施例of the present invention. 1B shows the cap shell 10 of the semiconductor device shown in FIG.
It is a top view when removing.

【図2】 (a)は図1の金属板を示す平面図である。 (b)は図1の金属板を示す側断平面図である。FIG. 2A is a plan view showing the metal plate of FIG. 1; FIG. 2B is a side sectional plan view showing the metal plate of FIG. 1.

【図3】 (a)及び(b)は受光素子をリード部に直接マウント
した従来の半導体装置の一例を示す図である。
FIGS. 3A and 3B are diagrams showing an example of a conventional semiconductor device in which a light receiving element is directly mounted on a lead portion.

【図4】 (a)及び(b)は,受光素子をリード部に直接マウン
トした従来の半導体装置の他の例を示す図である。
FIGS. 4A and 4B are diagrams showing another example of a conventional semiconductor device in which a light receiving element is directly mounted on a lead portion.

【図5】 (a)は図4の半導体装置のリード部の変形例の断面図
である。 (b)は(a)の半導体装置のキャップシェルを外した
ときの平面図である。
FIG. 5A is a cross-sectional view of a modification of the lead portion of the semiconductor device of FIG. (B) is a plan view of the semiconductor device of (a) when a cap shell is removed.

【図6】 (a)は受光素子をステムベースに直接またはセラミッ
ク板を介してマウントした従来の半導体装置のもう一つ
の他の例を示す断面図である。 (b)は(a)の半導体装置の平面図である。
FIG. 6A is a cross-sectional view showing another example of a conventional semiconductor device in which a light receiving element is mounted directly on a stem base or via a ceramic plate. (B) is a plan view of the semiconductor device of (a).

【符号の説明】[Explanation of symbols]

1 リード孔部 2 ステムベース 3 リード 4 変形リード 5 封止ガラス 6 受光素子 7 金属配線 8 低融点ガラス 9 ガラス板 10 キャップシェル 11 溶接リード 12,13 マウント板 14 角形セラミック板 21 金属板 23 チップコンデンサ 24 U字形状部 25 段差 DESCRIPTION OF SYMBOLS 1 Lead hole part 2 Stem base 3 Lead 4 Deformation lead 5 Sealing glass 6 Light receiving element 7 Metal wiring 8 Low melting glass 9 Glass plate 10 Cap shell 11 Welding lead 12, 13 Mounting plate 14 Square ceramic plate 21 Metal plate 23 Chip capacitor 24 U-shaped part 25 Step

Claims (6)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 ステムベースと,前記ステムベースを貫
通し,封止材により前記ステムベースに固定されたリー
ド部材と,前記リード部材の一端に接続された受光素子
とを備えた半導体装置において,前記リード部材の位置
に対応した部分が前記リード部材の封止部の一部を覆う
形状に切欠かれた金属板を前記ステムベース上に搭載
し,前記金属板上に前記受光素子を搭載してなり、前記
金属板は,前記ステムベースに接触する一端面の周縁部
に段差が形成されていることを特徴とする半導体装置。
1. A semiconductor device comprising: a stem base; a lead member penetrating the stem base and fixed to the stem base by a sealing material; and a light receiving element connected to one end of the lead member. the mounting lead member metal plate is a portion corresponding to the position was cut out in a shape covering a part of the sealing portion of the lead member on the stem base, wherein by mounting a light receiving element on the metal plate Become
The metal plate is located on the periphery of one end face that contacts the stem base.
Wherein a step is formed in the semiconductor device.
【請求項2】 請求項1記載の半導体装置において,前
記金属板は,前記リード部材を含むステムベース領域よ
りも外側に位置する部分を有していることを特徴とする
半導体装置。
2. A semiconductor device according to claim 1 Symbol mounting, said metal plate is a semiconductor device which is characterized by having a portion located outside the stem base area including the lead member.
【請求項3】 請求項1又は2記載の半導体装置におい
て,前記リード部材は少なくとも2本の細長い導電材か
らなることを特徴とする半導体装置。
3. A semiconductor device of the mounting according to claim 1 or 2 SL, the lead member is a semiconductor device characterized by comprising at least two elongate conductive material.
【請求項4】 請求項1乃至3の内のいずれかに記載の
半導体装置において,前記金属板に搭載された電子部品
を備えていることを特徴とする半導体装置。
4. The semiconductor device according to claim 1 , further comprising an electronic component mounted on said metal plate.
【請求項5】 請求項記載の半導体装置において,前
記電子部品は,前記受光素子に電気的に接続されている
ことを特徴とする半導体装置。
5. The semiconductor device according to claim 4 , wherein said electronic component is electrically connected to said light receiving element.
【請求項6】 請求項4又は5記載の半導体装置におい
て,前記電子部品は集積回路装置であることを特徴とす
る半導体装置。
6. The semiconductor device according to claim 4 , wherein said electronic component is an integrated circuit device.
JP7023811A 1995-02-13 1995-02-13 Semiconductor device Expired - Fee Related JP2947330B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7023811A JP2947330B2 (en) 1995-02-13 1995-02-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7023811A JP2947330B2 (en) 1995-02-13 1995-02-13 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH08222745A JPH08222745A (en) 1996-08-30
JP2947330B2 true JP2947330B2 (en) 1999-09-13

Family

ID=12120731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7023811A Expired - Fee Related JP2947330B2 (en) 1995-02-13 1995-02-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2947330B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6008905B2 (en) * 2014-07-07 2016-10-19 メイコム テクノロジー ソリューションズ ホールディングス インコーポレイテッド Optical semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH029455U (en) * 1988-06-30 1990-01-22
JPH0713240Y2 (en) * 1988-08-29 1995-03-29 住友電気工業株式会社 Package for semiconductor optical active devices
JPH05267722A (en) * 1992-03-18 1993-10-15 Oki Electric Ind Co Ltd Light receiving and emitting element

Also Published As

Publication number Publication date
JPH08222745A (en) 1996-08-30

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