JP2938075B2 - Test pattern generator - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a test pattern generator for a printer such as a liquid crystal shutter printer or an LED array printer in which a large number of write dots are arranged in the main scanning direction. [Prior Art and Problems Thereof] In a liquid crystal shutter printer or an LED array printer, a large number of optically written dots are arranged in the main scanning direction of a photoconductor. These printers have a test printing function to check the function of the liquid crystal shutter head or LED array head. The test print function is to store the test print pattern in ROM or the like, read the test print pattern stored in ROM or the like instead of the print signal from the host computer, and open / close the liquid crystal shutter or turn on / off the LED array. It is. 11 (A) to 11 (C) show conventional typical test print patterns, (A) is a solid black print, (B) is a white print,
(C) is a vertical line pattern. D indicates the traveling direction (sub-scanning direction) of the sheet P. First, the case of using normal development will be described. In the case of FIG.
Since the ED element is turned off, the disconnection element cannot be detected. In the case of a liquid crystal head, a closing drive is performed. In the case of a normally-open type liquid crystal, a closing drive waveform is not applied to a micro-shutter having a pattern disconnection, and the shutter opens and a defective dot line W appears. A defective dot such as a disconnection cannot be found. Next, in the case of FIG. 6B, in the LED array head, all the LED elements are turned on, so that if there is a disconnection element, it is detected as a defective dot line B. Cannot be detected. In the case of a normally-closed liquid crystal head, even if the opening drive is performed, the micro-shutter of the pattern disconnection is not opened because it is not opened. However, in the case of the normally-open type liquid crystal head, the micro-shutter of the pattern disconnection is opened. Since it opens even if it is not driven, problems such as disconnection of the pattern cannot be found. In the case of FIG. 9C, it is effective for image evaluation such as print blur, but when there is a defective dot in the portion of the vertical line pattern L, the same problem as in the case of FIG. If there is a defective dot in the portion G, the same problem as in the case of FIG. Next, the case where the inversion phenomenon is used will be described. In the case of FIG. 1A, the light emitting element is turned on in the case of the LED head and the opening drive is performed in the case of the liquid crystal head. Can be found, but a normally open LCD head cannot be found. In the case of the same figure (B), all the LEDs are turned off in the LED head,
In the case of the liquid crystal head, since the closing drive is performed, a defect of the normally open type liquid crystal head can be found, but a defect of the normally closed type liquid crystal head or the LED head cannot be found. Further, in the case of FIG. 7C, if there is a defective dot in the portion of the vertical line pattern L, the same problem as in the case of FIG. The same problem as in the case (B) occurs. [Object of the Invention] In view of the above-mentioned conventional drawbacks, an object of the present invention is to provide a test pattern generator capable of reliably detecting a defective dot of a printer having a large number of writing dots in the main scanning direction. SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a printer test pattern generator having a large number of writing dots in the main scanning direction, a counting means for counting clock signals generated in a predetermined cycle, Comparing means for inputting an output value of the counting means and an output of an output means for outputting different predetermined data each time a predetermined line in the sub-scanning direction is printed, and comparing the output value with the predetermined data; A print signal generating means for providing a predetermined signal to the writing dot based on the detection of coincidence between the output value and the predetermined data; and a count signal to the output means every time printing of a predetermined line in the main scanning direction is completed. The predetermined data to be output is
Print position changing means for changing to an output signal obtained by adding a predetermined value to data output for printing the immediately preceding predetermined line, and at a predetermined dot interval in the main scanning direction by an output signal from the output means. Test printing is performed, and an operation of performing test printing at a position different from the test printing based on the output signal in the main scanning direction is sequentially repeated by an output signal obtained by adding the predetermined value from the output unit. Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 8 shows an embodiment of a liquid crystal printer to which the present invention can be applied. In FIG. 8, electrophotographic process devices such as a charger 2, a liquid crystal head 3, a developing device 4, a transfer device 5, and a cleaner 6 are arranged around the photoreceptor 1 rotating in the direction of the arrow. The surface of the photoconductor 1 is uniformly charged by the charger 2, and an electrostatic latent image is formed by optical writing by the liquid crystal head 3. The electrostatic latent image is converted into a toner image by the developing device 4, and the toner image is transferred by the transfer device 5 to the sheet P fed from the cassette 7 and fixed by the fixing roll 8. On the other hand, the remaining toner not transferred by the transfer device 5 is
The cleaning is performed by the cleaner 6 to prepare for the charging process again. The transfer paper P is fed from the cassette 7 prior to the optical writing operation by the liquid crystal head 3. First, the feed roller 9 rotates, and the paper P is slipped from the cassette 7 to the slip roller.
Feed toward 10. The paper further fed by the slip roller 10 turns on the standby switch 11, comes into contact with the stopped standby roll 12, and stops. At this time, the conveyance force of the slip roll 10 is extremely weak, so that even if the paper is constantly rotated, it does not adversely affect the stopped paper. Standby roll 12
Rotates in synchronism with the toner image on the photoreceptor 1 to re-feed the paper P. Next, the liquid crystal head 3 will be further described. The liquid crystal head 3 mainly includes a light source 3a such as a fluorescent lamp or a xenon glow lamp, a liquid crystal light shutter 3b, and an imaging lens 3c. Liquid crystal shutter that is opened and closed by print data sent from the printer
The light is modulated by 3b, an image is formed on the surface of the photoconductor 1 by the imaging lens 3c on the surface of the liquid crystal optical shutter 3b, and optical writing is performed. The liquid crystal light shutter 3b has a heater 3d and a liquid crystal light shutter.
A temperature detecting element 3e for detecting the temperature of 3b is provided, and the temperature of the liquid crystal light shutter 3b is constantly controlled by controlling the energization of the heater 3d based on the output of the temperature detecting element 3e. The liquid crystal optical shutter 3b is a common glass as shown in FIG.
It is composed of 3f and 3g of segment glass, and a liquid crystal agent is sealed between both glasses. Two common electrodes are provided on the lower surface of the common glass 3f, and a micro shutter 3i is formed at the intersection of the segment glass 3g provided on the upper surface of the segment glass 3g. Next, a driving circuit of the liquid crystal optical shutter 3b will be described with reference to FIG. FIG. 2A is a block diagram of a driving circuit.
Print data from the host computer or print data from a test print pattern generation circuit described later is input to the data terminal 13. Reference numeral 14 denotes a serial-in / parallel-out shift register which captures print data in synchronization with a clock signal ▲ ▼ input to a clock terminal 15. The shift register 14 has 160 stages, and the overflowed print data is input from the cascade terminal 16 to the data terminal of the next stage drive circuit. When the input of one line of print data to the shift register 14 is completed, the print data is transferred to the shift clock terminal 17 by the shift clock ▲.
The data is transferred to the data latch 18 by ▼, and the shift register 14 is ready for receiving data of the next one line. Here, the micro shutters 3i are arranged in a staggered manner in the first row indicated by 0 and the second example indicated by E, and the first row and the second row have an interval of 2.5 pitches. Therefore, in order to print in a line on the photoconductor, even data (Q ₂ , Q ₄ ,... Q ₁₆₀ ) among print data output from the data latch 18 is odd data (Q ₁ , Q ₃ ,.
Q ₁₇₉ ) needs to be delayed by 2 pulses and 4 pulses of the shift clock ▲ ▼. Reference numeral 19 denotes a data delay unit for delaying the even-numbered data, which is composed of two stages of latches and has the same shift clock as the data of the data latch 18.
Shifted by ▼. Output data Q _1, Q ₂ of the data latch 18 to perform the micro-shutter 3i is 2 time division driving, Q
₃ and Q ₄ ... Q ₁₅₉ and Q ₁₆₀ are given as a set to the segment electrode 3h. Reference numeral 20 denotes a data mixing unit for mixing these data, and the odd data of the data latch 18 and the data delay unit 19
And mix the data with the output from. That outputs the input A ₁ and B ₁ to the driver 21 from the output W ₁ as a pair. FIG. 1B shows a set of data mixing units, and performs the following operation. The data select signal DSEL input to the data select terminal 22 is H,
L is in the second half, odd data A is selected in the first half,
In the latter half, even data B is selected. Here, the data of A or B is determined to be a signal for opening the micro shutter 3i at H and closing the micro shutter 3i at L. An open waveform PT1 for opening the micro shutter 3i is input to the drive signal terminal A23, and a closed waveform PT2 for closing the micro shutter 3i is input to the drive signal terminal B24. Thus, for example, if A is H in the first half of one writing cycle, an open waveform PT1 is output to W, and if B is L in the second half, a closed waveform PT2 is output to W. Since the output of the data mixing section 20 is a signal level voltage (about 5 V), the level of the driving voltage V (about 20 V) inputted to the voltage terminal 25 by the driver 21 is output.
V) and is applied to the segment electrode 3h. Next, the operation of generating a test print pattern according to the present invention will be described with reference to FIGS. FIG. 1 is a test print pattern generation circuit of the present invention, FIG. 2 is an operation time chart, and FIG. 3 is a dot configuration diagram of the test print pattern. First, in FIG. 1, when the power supply of the device is turned on, the reset signal RES of the reset terminal 26 becomes H for a moment, and through the OR gate 35, the 4-bit binary counters 27, 28
Reset. When the printer is in the standby state, the vertical synchronizing input signal ▼ is at H level, the 4-bit binary counter 29 is in the reset state, and the dot count enable signal ▼ is at H level.
The bit binary counter 30 is also in a reset state. When the printer enters the test print mode, the vertical sync input signal ▲
▼, then the dot count enable signal ▲
Both become L and the clock signal ▲ ▼ can be input. Here, the vertical synchronization input signal ▼ is L until the test printing for one page is completed, and the clock signal ▼ is the same as the clock signal ▼ input to the clock terminal A15 in FIG. The 4-bit comparator 31 outputs DATA only when the outputs of the 4-bit binary counters 29 and 30 match (A ₁ = B ₁ , A ₂ = B ₂ , A ₃ = B ₃ , A ₄ = B ₄ ). First, when the dot count enable signal ▲ ▼ becomes L, DT
A output is performed. This DATA is the data terminal 1 shown in FIG.
Output to 3. 4-bit binary counter 30
The output becomes zero every 16 clocks in ▼, and DATA is output for the first dot on the first line.
DATA is output from the 4-bit comparator 31 every 16 clocks. In the case of A4 size, the dot count enable signal ▲ ▼ becomes H at the timing when 2340 clocks corresponding to one line of main scanning are output, and this operation is performed.
Repeat the line. Note that DATA is an impeller 33C and AND gate 3.
3d is output only when ▲ is L. On the other hand, each time one line is completed, the 4-bit binary counter 27 is incremented by the dot count enable signal ▲ ▼ via the inverter 33e,
NAND gates 33a and 33b from D of bit binary counter 28
, The clock signal is input to the symbol ▼ of the 4-bit binary counter 29, and the output of the 4-bit binary counter 29 becomes 1. Thereafter, the 4-bit binary counters 27 and 28 are reset by the OR gate 35. As a result, the output of the 4-bit binary counter 29 is 1 from the 129th line to the 256th line, so that when the output of the 4-bit binary counter 30 is 1,
TA is output. That is, as shown in FIG. 3, a 4-bit binary counter 30 is provided for the first to 128th lines.
Is zero, a test print pattern is output every 16 dots from the first dot, and from the 129th line to the 256th line, the output of the 4-bit binary counter 30 is 1, so it is shifted by one dot from the first dot. Since the output of the 4-bit binary counter 30 is 2 every 16 dots from the 257th line to the 512th line, the test print pattern is output every 16 dots from the position shifted by 2 dots from the leading dot. A test print pattern shifted by one dot per line is output. In the case of a 300 DPI printer, 16 dots is about 1.3 mm,
128 lines is about 10.8mm. In the example of FIG. 3, the portion indicated by 36 is not printed where it should be printed, and is the 18th micro shutter of the liquid crystal optical shutter 3b.
It turns out that 3i-18 is bad. The above operation will be described with reference to the time chart of FIG. RES at a is a reset at power-on, and performs a reset operation at H level. The test printing is enabled with L in b in B, and the L state is maintained during the printing period of one page in the sub-scanning direction. From the moment when ▼ shown by e becomes L, the 4-bit binary counter 30 starts counting the clock signal of C, and the first dot, the seventeenth dot...
Output DATA of d to the dot. This operation is f
▼ is similarly repeated up to the 128th line, and from the 129th line to the 256th line, the second dot as shown by h,
18th dot ... DATA is output to 2338th dot. Also the 25th
From the 7th line to the 512th line, DATA is output at the 3rd dot, the 19th dot,..., The 2339th dot as shown by i. Note that g is an enlarged view of the 129th line of f and i is an enlarged view of the 257th line of f. In FIG. 1, the 4-bit binary counters 27, 28
And line count operation without using flip-flops
It is also possible to do this with the firmware of the CPU. Next, another embodiment of the present invention will be described. FIG. 4 is a test pattern generation circuit of another embodiment of the present invention, FIGS. 5 and 6 are dot configuration diagrams of test print patterns, and FIG. 7 is an operation time chart. First, in FIG. 4, when the printer is in the standby state, the 4-bit binary counter 37 is in the reset state through the OR circuit 38a because the vertical synchronization input signal ▼ and the dot count enable signal ▼ are H. When the printer enters the test print mode, the vertical sync input signal ▲
▼, then dot count enable signal ▲
Both become low and the clock signal can be input. A clock signal ▲ is input to the AND circuit 38b.
▼ and the Q output of the latch 39 are input.
The output is used for printing the same black or white dot in the main scanning direction, which will be described in detail later. Note that the vertical synchronization input signal ▼ is L until the test printing for one page is completed, and the clock signal ▼ is the same as the clock signal ▼ input to the clock terminal A15 in FIG. The 4-bit comparators 40 and 41 are used only when the outputs of the 4-bit binary counter 37 and the 8-bit flip-flop 42 match (A ₁ = B ₁ , A ₂ = B ₂ , A ₃ = B ₃ , A ₄ = B ₄ ). It outputs DATA to the AND circuit 38c through the OR circuit 43. The final DATA is an inverter 38d and an AND circuit 38.
Dot count enable signal ▲ by c
Output only when ▼ is L. DATA is the same as Fig. 1
It is output to the data terminal 13 shown in the figure. When the write data latch signal ▲ ▼ becomes L, the 8-bit flip-flop 42 becomes the data D7 to D0 of the 8-bit data bus 45 of the CPU 44.
Latch. Next, the data of D0 of the 8-bit data bus 45 is latched in the latch 39 by the continuous data latch signal ▼. At this time, if all the one line in the main scan is to be printed in black or white, DO is set to 0 (Q output of latch 39 is L).
The AND circuit 38b is closed to inhibit the 4-bit binary counter 37 from advancing. Next, the operation in the case of creating a test print pattern as shown in FIGS. 5 and 6 will be described. The arrows in these figures indicate the traveling direction (sub-scanning direction) of the paper 46. Next, as shown in FIG. 5 (A) ((B) is a partially enlarged view)
The operation in the case of printing the oblique lines of dots will be described.
In the figure, diagonal lines are printed every 16 dots in the main scanning direction and the sub-scanning direction. In this example, D7 to D4 and D3 to D0 need to output the same data. First, the CPU 44 outputs 0000 0000 to the bus line 45. The 8-bit flip-flop 42 latches the data 0001 0000 of D7 to D0 by the write data latch signal デ ー タ. Next, DO is set to 1 and AN
The D circuit 38 is opened and closed in synchronization with the clock ▲ ▼.
The output of the 4-bit binary counter 37 is 0000 when the dot count enable signal ▼ falls, and the 4-bit comparators 40 and 41 perform black printing in which DATA is output from both. From 1 clock to 15 clocks of the clock signal CK1, D to A are 0001, 0010...
Since they do not match the data 0000 of 7 to D4 and D3 to D0, DATA is not output and white printing is performed. Therefore, the first dot is set to black, and black printing is performed every 16 dots thereafter. Next, for the second line, the data of D7 to D4 and D3 to D0 are set to 0001, thereby making the first line.
The dots are printed in white, the second dots are printed in black, the third to sixteenth dots are printed in white, and this is repeated every 16 dots. In the third line, D7 to D4 and D3 to D0 are set to 0010, so that the first to second dots are printed in white, the third dot is printed in black, the fourth to sixteenth dots are printed in white, and thereafter, the 16th and 16th dots are printed in white. Repeat for each dot. Thus, D7 ~ D4, D3
The data of D0 to D0 is set to 0000 for the first line, and is set to 0001, 0010,... 1111 every time one line is advanced thereafter. FIG.
The test pattern is the same as that shown in the figure, and the data of D7 to D4 and D3 to D0 are 0000 for the operation of FIG.
It is possible to print 128 lines as 001, shift the data of D7 to D4 and D3 to D0 by 1 bit, and repeat this. Next, these operations will be described with reference to the time chart of FIG. RES and ▼ indicated by k and l are the same as those in the example of FIG. D7 to D0 indicated by q are data of the bus line 45 of the CPU and are common to the RAM 47, ROM 48, and the like. First, the write data latch signal ▲ ▼
The data of D7 to D0 are latched in the 8-bit flip-flop 42. The time chart of FIG. 7 shows an example of the case of the diagonal lines in FIG. 5, and at this time, the CPU 44 sets D7 to D0 to 0000 0000.
Is output to the bus line 45. Next, DO is set to 1 and the data of DO is latched in the latch 39 by the continuous data latch signal ▼. The data of D7 to D1 at this time is 1
Alternatively, it may be 0. As a result, the 4-bit binary counter 37 starts the clock ▼ from the point when the dot count enable signal ▼ has fallen to L.
Is started, and DATA indicated by r is output every 1st dot, 17th dot, and every 16 dots thereafter. For the second line
By setting D7 to D0 to 0001 0001, the second dot and the eighteenth dot
DATA is output every dot and thereafter every 16 dots. As described above, according to the test pattern generation circuit shown in FIG. 4, various test patterns can be created based on data. In addition to detection of defective dots, generation of test patterns suitable for detecting print blur, image blur, and the like. Is possible. In addition, if a closed waveform is applied to PT1 and an open waveform is applied to PT2 in FIG. 10, a negative image is printed, and further, by selecting the waveforms of DATA and PT1 and PT2 input to the data terminal 13, forward development, reverse development, a positive pattern, It can correspond to any of the negative patterns. Although the liquid crystal optical printer has been described as an example in the above-described embodiment, the present invention is not limited to this, and it is needless to say that the present invention can be applied to a printer having a large number of writing dots in the main scanning direction such as an LED printer and a multi-stylus printer. It is. [Effects of the Invention] As described in detail above, according to the present invention, a test pattern that is regularly displaced every predetermined dot in the sub-scanning direction in generating a test pattern of a printer,
Since printing can be performed with a simple configuration such as a counter without using storage means such as a ROM, defective dots of the write head can be easily found with a low-cost configuration.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of a test print pattern generation circuit according to the present invention, FIG. 2 is a time chart of FIG. 1, FIG. 3 is a dot configuration diagram of the test print pattern, and FIG. 5 (A), 5 (B), 6 (A), and 6 (B) are dot configuration diagrams of a test print pattern according to another embodiment of the present invention. Fig. 8 is a time chart of Fig. 4. Fig. 8 is a sectional view of a liquid crystal printer. Fig. 9 is an external view of a liquid crystal shutter. Figs. 10 (A) and (B) are driving circuit diagrams of a liquid crystal optical shutter. FIGS. 1A, 1B, and 1C are conventional test pattern diagrams. 3 Liquid crystal head, 3b Liquid crystal light shutter, 3i Micro shutter, 14 Shift register, 18 Data latch, 19 Data delay unit, 20 Data mixing unit, 21
… Driver, 27,28,29,30,37… 4 bit binary counter, 30,40,41… 4 bit comparator, 39… latch, 42… 8 bit flip flop, 44… CPU, 4
5 …… Bus line

Continuation of the front page (51) Int.Cl. ⁶ Identification symbol FI B41J 29/46 B41J 3/12 C G06F 3/12 H04N 1/00 106 (56) References JP-A-57-89985 (JP, A) JP-A-57-163586 (JP, A) JP-A-61-261078 (JP, A) JP-A-61-261079 (JP, A) JP-A-61-29576 (JP, A) JP-A-61-206684 ( JP, A) Japanese Utility Model Showa 61-95551 (JP, U)

Claims (1)

(57) [Claims] In a test pattern generator for a printer having a large number of writing dots in the main scanning direction, a counting means for counting clock signals generated in a predetermined cycle, and each time an output value of the counting means and a predetermined line in the sub scanning direction are printed. Comparing means for inputting the output of the output means for outputting different predetermined data and comparing the output value with the predetermined data; and a predetermined signal applied to the writing dot based on the detection of coincidence between the output value and the predetermined data by the comparing means. And a count signal is sent to the output means each time printing of a predetermined line in the main scanning direction is completed, and the predetermined data output from the output means is used for printing the immediately preceding predetermined line. Print position changing means for changing the output signal to an output signal obtained by adding a predetermined value to the data output to the main scanning direction. Test printing is performed at predetermined dot intervals, and an operation of performing test printing at a position different from the test printing by the output signal in the main scanning direction by an output signal obtained by adding the predetermined value from the output unit is sequentially repeated. Test pattern generator. 2. 2. The test pattern generator according to claim 1, wherein the predetermined signal is a print signal for printing dots. 3. 2. The test pattern generator according to claim 1, wherein the predetermined signal is a non-printing signal for not printing a dot.