JPH07156443A - Image forming device - Google Patents

Abstract

PURPOSE:To transfer an image data to a printer engine with a clock of a low frequency than a frequency of the clock requested by the printer engine. CONSTITUTION:A printer controller 2 sends out each timing signal from a timing signal generation part 2a simultaneously with reset timing of a write counter or prior to the reset timing of the write counter based on a write request signal from a generation means. An image data stored in a line buffer 7 is outputted to an image processing part 4 in synchronism with the read clock generated from a clock source.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image forming apparatus (printer engine) such as a laser beam printer, and more particularly to an interface with a printer controller.
It is about the space.

[0002]

2. Description of the Related Art In recent years, page printers such as LBP have attracted attention because of their quietness, high quality printing and high speed printing. One of the features of the laser beam printer, which is one of page printers, is that the photosensitive member is scanned with a laser beam in the main scanning direction for development, transferred to a recording medium such as recording paper, and then recorded through a fixing process. Is the point to do.

FIG. 8 is a cross-sectional view for explaining the main structure of this type of image forming apparatus. The structure and operation will be described below.

First, a photosensitive drum 801 which rotates in a direction indicated by an arrow at a predetermined constant speed is charged by a charger 802 to a predetermined polarity and a predetermined voltage. Next, the recording paper P is fed from the paper feed cassette 803 by the paper feed roller 804 one by one at a predetermined timing. The paper tip is the detector 80
5, the vertical synchronizing signal (hereinafter referred to as / TOP signal) is output at a predetermined timing, and the laser light L modulated by the image signal is emitted from the semiconductor laser 806.
The light is emitted toward the polygon mirror 807, scanned by the polygon mirror 807, and then guided onto the photosensitive drum 801 via the lens 808 and the mirror 809.

When the laser beam L is incident on the detector 810 arranged at one end of the optical scanning, a beam detect signal (hereinafter referred to as / BD signal) which becomes a horizontal synchronizing signal is output. The polygon mirror 807 is driven by a scanner motor 811, and the scanner motor 811 is controlled by a motor control circuit (not shown) so as to rotate at a predetermined constant speed according to a signal obtained by dividing a signal of a reference oscillator (not shown).

Then, in synchronization with the / BD signal, the photosensitive drum 801 is scanned and exposed, then the electrostatic latent image is developed by the developing device 812, a toner image is formed on the photosensitive drum 801, and the transfer charging device is formed. After being transferred to the recording sheet by 813, it is fixed by a fixing device 814 and output.

Next, the image signal will be described with reference to FIG. FIG. 9 is a block diagram illustrating a control configuration of the image forming apparatus illustrated in FIG. The configuration and operation will be described below with reference to the timing chart of FIG.

In the figure, 3 is a printer engine, which comprises an image processing section 4, a printing section 5 and the like.

FIG. 10 is a timing chart for explaining the operation of FIG. The printer 1 receives image data from an external device, for example, a host computer 6, and the received image data is converted into a raster image by the printer controller 2 and sent to the printer engine 3. FIG. 10 shows the timing of image data sent from the printer controller 2 to the printer engine 3.

First, when the printer controller 2 issues a print signal instructing to start the print operation, the printer engine 3 starts the above-described print operation. The printer controller 2 detects the vertical synchronizing signal / TOP output from the printer engine 3 and then detects the horizontal synchronizing signal / B.
The image data expanded into a raster image in synchronization with D is transmitted for a predetermined line.

[0011]

However, in the printer having the above structure, the printer controller 2 adjusts the image data / VDO synchronized with the horizontal synchronizing signal BD to the scanning speed of the laser at the timing when the laser scans the recording paper position. When a printer with a higher resolution and a faster print speed is required, and the control for that is complicated, the image transfer speed will be faster and the printer will There is a problem that the load of the controller 2 becomes heavy and it becomes difficult to reliably transfer the data from the printer controller 2 to the printer engine 3.

The present invention has been made in order to solve the above-mentioned problems, and has a higher frequency than the frequency of a timing signal at which writing and reading timings are asynchronous, and the frequency of an image data transfer clock from the printer controller to the printer engine. The clock required by the printer engine is set by making the reset timing of the read counter that controls the address of the memory that stores the image data based on the read clock of the same as or simultaneously with the reset timing of the write counter. An object of the present invention is to provide an image forming apparatus capable of transferring image data to a printer engine with a clock having a frequency lower than the frequency.

[0013]

An image forming apparatus according to the present invention comprises a storage means for storing a predetermined amount of image data, a write counter for setting a write address in the storage means, and a read address for the storage means. A read counter to be set, a generating means for generating a write request signal to be output to the printer controller in synchronization with the horizontal synchronizing signal, a clock source for generating a read clock having a frequency higher than the frequency of the write clock, and a generating means. A timing control means for controlling the transmission of each timing signal so that the reset timing of the read counter is synchronized with the reset timing of the write counter or precedes the reset timing of the write counter based on the write request signal from The image data stored in the storage means is stored in the clock. In synchronization with the read clock generated from those that were configured to output to the printer engine.

Further, a comparator is provided for comparing the count value of the write counter and the count value of the read counter to generate a predetermined valid signal.

[0015]

According to the present invention, the timing control means sets the timing of resetting the read counter at the same time as or prior to the reset timing of the write counter based on the write request signal from the generating means. Signal transmission,
Since the image data stored in the storage means is output to the printer engine in synchronization with the read clock generated from the clock source, the image data is output to the printer engine at a clock frequency lower than the clock frequency required by the printer engine. Can be transferred to.

Further, the comparator compares the count value of the write counter and the count value of the read counter,
Since the predetermined effective signal is generated, it is possible to generate an accurate effective signal with a simple circuit configuration.

[0017]

【Example】

[First Embodiment] FIG. 1 is a block diagram showing the arrangement of an image forming apparatus according to the first embodiment of the present invention. The same parts as those in FIG. 9 are designated by the same reference numerals. The printer 1 of this embodiment is an 8-bit multi-value printer.

As shown in this figure, the printer 1 comprises a printer controller 2 and a printer engine 3, receives image information from a host computer 6 which is an external device in a predetermined language, and the printer controller 2 receives a raster image. Then, the image is expanded and sent to the printer engine 3. The printer engine 3 drives the laser of the printing unit 5 based on the raster image information / VDO7 to / VDO0 to print by the electrophotographic process. Reference numeral 7 denotes a line buffer, which is composed of two RAMs for simultaneously performing writing / reading, a write counter, and other drive control circuits including a read counter as described later.
A timing signal generator 2a generates various timing signals. In addition, / PCLK is a clock corresponding to the laser scanning speed of the printing unit 5, and is an image transfer clock / VC.
The frequency is higher than LK (determined according to the resolution), and the clock signal from a reference clock source (not shown) is divided and generated.

In the image forming apparatus thus constructed, the printer controller 2 causes the reset timing of the read counter to coincide with the reset timing of the write counter or the reset of the write counter based on the write request signal from the first generating means. Each timing signal is sent from the timing signal generator 2a so as to precede the timing, and the image data stored in the line buffer 7 is sent to the image processor 4 in synchronization with the read clock generated from the clock source. Since the image data is output, it becomes possible to transfer the image data to the printer engine 3 with a clock having a frequency lower than the clock frequency required by the printer engine 3.

FIG. 2 is a flow chart showing the timing of image data and control signals input from the printer controller 2 shown in FIG.

In the figure, / TOP is a vertical synchronizing signal, which is a signal falling at the leading edge of the printing paper, and / LSY.
NC is a horizontal synchronizing signal, and is a signal requesting the controller to transfer image data for one line in the HIGH section of / LSYNC. / VCLK is image data /
This is a VDO transfer synchronization clock.

During the printing operation, the controller, after detecting the vertical synchronizing signal / TOP signal, transmits the image data / VDO synchronized with the transfer synchronizing clock / VCLK signal during the / LSYNC signal period.
Is sent to the printer engine 3 for one line for a specified number of lines. In addition, Ln indicates that it is the data of the nth pixel of the Lth line.

FIG. 3 is a block diagram showing a circuit configuration of the line buffer 7 shown in FIG. 1, and FIG. 4 is a block diagram showing a drive control circuit of the line buffer 7 shown in FIG.

In these figures, 304 and 305 are RAMs each having a capacity capable of storing image data / VDO for one line. The addresses of the RAM 304 are the output of the write address counter (write counter) 401 and the read address counter. The output of the (read counter) 402 is alternately switched and input by the selector 405 for each reset signal / RRESET, and the output of the write address counter 401 and the output of the read address counter 402 are input to the address of the RAM 305 as the reset signal / RRESET.
The signals are alternately switched and input by the selector 406 every time, so that one RAM always performs write operation and the other RAM performs read operation.

The data line of the RAM for the write operation is the DFF
The data line of the read operation RAM is DF to the output of 301.
Gates 302 and 30 to the input of F308 by the / SEL signal
3, 306, 307 are controlled and connected.

Next, the operation of the circuit will be described. RAM3 now
It is assumed that 04 is a write operation and RAM 305 is a read operation. The write address counter 401 and the read address counter 402 are respectively reset signals / WRESET, /
Each is reset by the RRESET signal.

Readout reset signal / RRESET
Is set to the timing at which the laser scans the left edge of the printing paper, and the value of the write address counter immediately before the reset of the write counter is stored in the DFF 403.

At the falling edge of the reset signal / RRESET, the address of the RAM 304 is output to the read address counter 402, the 8-bit data line of the RAM 304 is input to the DFF 308, and the address of the RAM 305 is written to the write address counter 401. The output is RA
The output Q of the DFF 301 is connected to the data line of M305.

The horizontal synchronizing signal / LSYNC goes from LOW to H.
The printer controller 2 that has detected the rise to IGH sends the image data of the (L + 1) th line to the printer engine 3 in synchronization with the clock / VCLK generated inside the controller.

At this time, one line of image data / VDO
Need only be sent before the next horizontal sync signal / LSYNC is issued, and the number N of pixels to be sent is the number n of main scan pixels of the image data that the printer controller 2 wants to print, and the number of pixels corresponding to the width of the printing paper. It may be less than N.

On the printer engine 3 side, the image data / VDO of the (L + 1) th line is fetched into the DFF 301 at the fall of the transfer synchronization clock / VCLK, and is written in the RAM 305 while incrementing the value of the write address counter 401 with the transfer synchronization clock / VCLK. .

From the RAM 304, the data of the first line is the horizontal synchronizing signal B generated in the printer engine 3.
Laser scanning speed clock synchronized with D / PCL
The read address counter 402 is incremented in synchronization with K, and the specified number (N pixels) is read.

Further, the count value of the read address counter 402 and the count value of the write address counter 401 of the previous line stored in the DFF 403 are compared by the comparator 404, and the output signal thereof is a signal DE indicating valid data. , And is output to the image processing unit 4 in the subsequent stage together with the image data read from the RAM 304. The image processing unit 4 in the subsequent stage processes the data in the valid section of the signal DE as valid image data, and processes the data in the invalid section of the signal DE as non-printing data. As a result, even if the printer controller transfers data with a different number of pixels for each line, the previous line data is not printed as dust, so the printer controller only needs to send the required number of pixels for each line. In this way, the transferred n pixels are printed and the n + 1 to N pixels are not printed, as in the printing example shown in FIG.

The next reset signal / RRESET causes the RAM 304 to write data and the RAM 305 to perform a read operation, and the data for one line is written and read by the same operation as described above. The above operation is repeated to transfer the image data for one page. [Second Embodiment] FIG. 5 is a block diagram illustrating the configuration of a line buffer in an image forming apparatus according to a second embodiment of the present invention.

In this embodiment, the line buffer is FI.
This is an example configured using a FO memory.

In the figure, 502 is a memory cell array having a capacity of one line, and image data is input via an input buffer 501 and image data is output via an output buffer 503. The memory control unit 504 is configured so that writing and reading can be performed asynchronously.

Here, / WE is an enable signal of the write address counter 401, which has a timing of / WE shown in FIG.
LSYNC is input, and / RE is an enable signal for the read address counter 402, which is always set to LOW, and operates at the timing according to the timing chart shown in FIG. 2 as in the first embodiment.

The reset signal / RRESET is set prior to the reset signal / WRESET, and the L + 1a pixel is not written before the La pixel is read. [Third Embodiment] FIG. 6 is a block diagram showing the control arrangement of an image forming apparatus according to the third embodiment of the present invention.

FIG. 7 is a timing chart for explaining the operation of FIG.

In this embodiment, the control signal / LE sent from the printer controller 2 to the printer engine 3 is sent.
, The image transfer clock / VCLK is continuously input to the printer engine 3, and the effective image range is controlled by the control signal / VCLK.
It is the interface specified by LE.

The line buffer 7 is constructed by using a FIFO memory as in the second embodiment. The control signal / LE is input to the enable terminal / WE of the write counter 401 in FIG. As shown in FIG. 7, the enable terminal / RE of 402 is configured to receive an effective wide range signal corresponding to a period during which the laser scans the effective print range.

As described above, according to the above-described embodiment, the printer has a line buffer having a FIFO (first-in first-out) structure in which writing and reading are asynchronous, and a write request signal generated at the same cycle as the horizontal synchronizing signal is sent to the printer. The printer controller can output an image data to the controller, and the printer controller can be a printer engine having an interface configured to transfer image data at a clock asynchronous with the horizontal synchronizing signal / BD in the request signal section and at a speed lower than the scanning speed of the laser. The image data transfer speed between the printer controller and the printer engine can be kept low, the printer engine can be easily connected to the printer controller and the data transfer is highly reliable.

Since the reading of the data of one pixel stored in the line buffer 7 precedes the writing of the data of the first pixel of the next line, the read image data is simply the image written in the previous line. Since the data is guaranteed, the image data transfer speed from the printer controller to the printer engine is 1 / B of the data for the number of pixels that the printer controller is going to print.
It becomes possible to send at any speed that can be transferred between D.

In the above embodiment, the case where the present invention is applied to a monochrome printer has been described.
The present invention can also be applied to color image transfer between a printer controller and a printer engine of a full-color printer in which image data of B n bits each is simultaneously input to each pixel of 3 bits × n bits.

Further, the present invention is also applicable to color image transfer between a printer controller and a printer engine of a full-color printer which inputs n-bit data of each of yellow Y, magenta M, cyan C, and black K in a frame sequential manner with an n-bit width. Can be applied.

[0046]

As described above, according to the present invention,
Based on the write request signal from the generating means, the timing control means sends each timing signal so that the reset timing of the read counter is the same as the reset timing of the write counter or precedes the reset timing of the write counter, and the storage means is provided. Since the image data stored in the printer engine is output to the printer engine in synchronization with the read clock generated from the clock source, the image data is transferred to the printer engine at a clock frequency lower than the clock frequency required by the printer engine. be able to. Further, since the comparator compares the count value of the write counter with the count value of the read counter to generate a predetermined valid signal, it is possible to generate an accurate valid signal with a simple circuit configuration.

Therefore, the image data transfer speed between the printer controller and the printer engine can be kept low, the printer engine can be easily connected to the printer controller, and the data transfer is highly reliable.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an image forming apparatus showing a first embodiment of the present invention.

FIG. 2 is a flowchart showing timings of image data and control signals input from the printer controller shown in FIG.

3 is a block diagram showing a circuit configuration of a line buffer shown in FIG.

4 is a block diagram showing a drive control circuit of the line buffer shown in FIG.

FIG. 5 is a block diagram illustrating a configuration of a line buffer in the image forming apparatus showing the second embodiment of the present invention.

FIG. 6 is a block diagram showing a control configuration of an image forming apparatus showing a third embodiment of the present invention.

FIG. 7 is a timing chart illustrating the operation of FIG.

FIG. 8 is a cross-sectional view illustrating a main part configuration of an image forming apparatus of this type.

9 is a block diagram illustrating a control configuration of the image forming apparatus illustrated in FIG.

FIG. 10 is a timing chart illustrating the operation of FIG.

[Explanation of symbols]

 1 Printer 2 Printer Controller 3 Printer Engine 4 Image Processing Section 5 Printing Section 6 Host Computer 7 Line Buffer

Claims (2)

[Claims] 1. An image forming apparatus comprising a printer controller for processing image information received from a host computer and outputting the image data to a printer engine in synchronization with a predetermined image transfer clock and a horizontal synchronizing signal,
A storage unit for storing a predetermined amount of image data, a write counter for setting a write address in the storage unit, a read counter for setting a read address of the storage unit, and a printer controller in synchronization with the horizontal synchronization signal. Generating means for generating a write request signal to be output,
A clock source that generates a read clock having a frequency higher than the frequency of the write clock, and the reset timing of the read counter based on the write request signal from the generation means is the same as the reset timing of the write counter or the reset timing of the write counter. Also has timing control means for controlling the transmission of each timing signal so as to precede, and outputs the image data stored in the storage means to the printer engine in synchronization with the read clock generated from the clock source. An image forming apparatus having the above structure. 2. The image forming apparatus according to claim 1, further comprising a comparator that compares the count value of the write counter and the count value of the read counter to generate a predetermined valid signal.