JP2933204B2 - Tone generator capable of scratch operation - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tone generator for reading and reproducing waveform data stored in a digital memory, or outputting and reproducing waveform data input in real time as it is, and more particularly to a pseudo-scratch device. The present invention relates to a tone generator capable of achieving an effect.

[0002]

2. Description of the Related Art Scratch is a technique in which an analog record is forcibly moved by hand while the analog record is being reproduced on a turntable, and the reproduction speed is extremely changed to produce a special sound effect. Scratch is a special technique using an analog record, and there has been no digital music device that realizes the scratch effect.

On the other hand, there has been a sound source that stores waveform data in a waveform memory, uses the output of an operator operated by a user as a read address of the waveform memory, and outputs the read waveform data.

[0004]

However, in the method in which the output value of the operator is used as the read address of the waveform memory as it is, the controllability of the generated musical tone is not good. No effect could be obtained. Further, in some cases, reverse playback from an arbitrary position cannot be performed due to hardware limitations, and discontinuity occurs in the playback sound when heading in the reverse direction.

According to the present invention, a pseudo-scratch effect can be realized in a tone generation system in which waveform data stored in a digital memory is read and reproduced, or waveform data input in real time is output and reproduced as it is. The purpose is to be able to.

[0006]

In order to achieve this object, a musical sound generating apparatus according to a first aspect of the present invention comprises a storage means for storing waveform data representing a waveform amplitude value for each predetermined sampling period; A finite-length coordinate detection operator that outputs a coordinate value of a contact position touched by a stick or another member, an operator output capture unit that sequentially captures a coordinate value output from the coordinate detection operator at predetermined intervals, and At the time when the operation of the coordinate detection operator is started, the reading of the waveform data from the storage means is started from a specific address which is predetermined as a read start position, and the operation is performed while the coordinate detection operator is being operated. The waveform data in the storage unit is sequentially read and read by the read address determined based on the coordinate value captured by the slave output capture unit. Characterized by comprising a processing means for outputting the shape data.

According to a second aspect of the present invention, there is provided a musical sound generating apparatus for storing waveform data representing a waveform amplitude value for each predetermined sampling period, and outputting a coordinate value of a contact position touched by a finger, a stick, or another member. A long coordinate detection operator, an operator output capture unit that sequentially captures the coordinate values output from the coordinate detection operator at predetermined intervals, obtains and outputs the moving speed of the contact position from the captured coordinate values, and A new read address is calculated by accumulating the F number determined according to the moving speed output from the operator output capture means to the read address, and the waveform data is stored from the storage means by the read address for each accumulation. Processing means for reading and outputting. The F number refers to the amount of change in the read address corresponding to the pitch.

According to a third aspect of the present invention, there is provided a musical tone generating apparatus for storing a waveform data representing a waveform amplitude value for each predetermined sampling period, and outputting a coordinate value of a contact position touched by a finger, a stick or another member. A long coordinate detection operator, an operator output capture unit that sequentially captures the coordinate values output from the coordinate detection operator at predetermined intervals, obtains and outputs the moving speed of the contact position from the captured coordinate values, and At the time when the operation of the coordinate detection operator is started, reading of the waveform data from the storage means is started from a specific read address which is predetermined as a read start position, and the coordinate detection operator is operated. In the meantime, the F number determined according to the moving speed output from the operator output capturing means is accumulated in the read address and a new read address is obtained. It is calculated and is characterized in that a processing unit that reads and outputs waveform data from said memory means by the read address.

According to a fourth aspect of the present invention, there is provided a musical tone generating apparatus for storing a waveform data inputted from outside in real time, an output means for outputting the waveform data inputted from outside in real time, a finger, a stick or the like. A coordinate detection operator of a finite length that outputs the coordinate value of the contact position touched by the member, and an operator output capturing unit that sequentially captures the coordinate value output from the coordinate detection operator at predetermined intervals,
At the time when the operation of the coordinate detection operator is started, the output of the waveform data by the output unit and the storage of the waveform data in the storage unit are stopped, and the determination is made based on the coordinate value captured by the operator output capture unit. Processing means for sequentially reading out the waveform data from the storage means in accordance with the read-out address and outputting the read-out waveform data.

According to a fifth aspect of the present invention, there is provided a musical sound generating apparatus comprising: input means for inputting in real time waveform data representing a waveform amplitude value for each predetermined sampling period; Reproducing means for outputting and reproducing the waveform data from among the waveform data input in real time by the input means;
A storage unit that always stores the latest waveform data of a predetermined capacity, a finite-length coordinate detection operator that outputs a coordinate value of a contact position touched by a finger, a stick, or another member, and the coordinate detection operator. An operator output capturing means for sequentially capturing the output coordinate values at predetermined intervals, obtaining and outputting the moving speed of the contact position from the captured coordinate values, and at the time when the operation of the coordinate detection operator is started, While stopping the real-time reproduction of the waveform data by the reproduction means and the storage of new waveform data in the storage means, reading the waveform data from the storage means from a specific read address which is predetermined as a read start position. Start and while the coordinate detection operator is being operated, it is determined according to the moving speed output from the operator output capturing means. By accumulating the read address F number calculating a new read address, and further comprising a processing means reads and outputs waveform data from said memory means by the read address. Claim 6
According to the invention according to claims 1 to 3, the processing means
Reading of the storage means based on only the coordinate detection operator
The transmission address is determined.
The invention according to claim 7 is the invention according to claims 1 to 3, wherein
Control means does not change the operation position of the coordinate detection operator.
Is that it does not generate musical sounds
I do.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a block diagram of a sampler which is a musical sound generator according to the present invention. The sampler includes a central processing unit (CPU) 101, a read-only memory (ROM) 102, a flash memory 103, a random access memory (RAM) 104, a timer 105,
Ribbon controller 106, pad 107, display 108, panel switch 109, sampling clock (Fs) generator 110, sound I / O 112, DM
A (direct memory access) controller 113,
And a bus line 115.

The CPU 101 controls the entire operation of the sampler. The ROM 102 stores a control program executed by the CPU 101. The RAM 104 is provided with work areas such as various registers and buffers. The flash memory 103 is a memory for storing waveform data recorded by the sampler.
The recorded waveform data is temporarily stored in a recording buffer on the RAM 104. When the recording buffer becomes full, the waveform data on the recording buffer is transferred to the flash memory 103. Even when the power of the sampler is turned off, the data on the flash memory 103 is retained.

The timer 105 generates a timer clock signal for causing the CPU 101 to generate a timer interrupt at predetermined intervals. CPU1 is interrupted by a timer interrupt.
01 is the ribbon controller 106 at predetermined time intervals.
For example, a process for taking in the detected value is performed.

The ribbon controller 106 is an operator for a user to perform a scratch operation and other operations. The ribbon controller 106 is a coordinate detection operator which is formed of a member having a finite length on a straight line, and outputs coordinates of the touched position when the member is touched by a member such as a finger or a stick. As a characteristic of the ribbon controller 106, the operation can be started from an arbitrary position. Ribbon controller 106
Outputs a predetermined value when not touched by a finger or a stick, and outputs a position of the touched coordinate when touched. Can be determined from the detected value.

The pad 107 is an operator for the user to support sound generation. Specifically, ten pads are provided, and one pad can be designated for recording at the time of recording (sampling). At the time of reproduction, by hitting (turning on) the pad, the waveform data recorded corresponding to the pad is read and reproduced.
Instead of turning on the pad, MIDI (Musical
An instrument digital interface (Note) signal may be received and played back.

The display 108 is for displaying various setting information. Panel switch (SW) 1
Reference numeral 09 denotes a switch group provided on a panel for the user to perform various setting operations. Panel SW109
Includes a switch such as a mode changeover switch.

The Fs generator 110 has a sound I / O 11
2 to generate a sampling clock having a frequency Fs. The sound I / O 112 is a codec (CODE
C). Sound I / O112
Has an analog / digital (A / D) conversion function and a digital / analog (D / A) conversion function.
An analog tone signal from the external input 111 is input to a D input terminal, and a sound system 114 is input to a D / A output terminal.
Is connected. The sound I / O 112 converts waveform data (waveform data obtained by converting an analog tone signal of the external input 111 into digital data by an A / D conversion function) taken from an A / D input terminal by an ADPCM (adaptive differential pulse code modulation) method. Compression function, and waveform data (D / A conversion and sound system 11 output to the D / A output terminal)
ADPC for digital waveform data output to 4)
It has a function to perform M expansion. In the embodiment of the present invention described here, the sound I / O 112 uses A
Assume that only DPCM compression is performed, and ADPCM expansion is performed by the CPU 101 executing predetermined software.

The sound I / O 112 has two F
It has an IFO (First In First Out) stack area. One is an input FIFO for holding digital waveform data input via an A / D input terminal, and the other is an output FIFO for holding digital waveform data output via a D / A output terminal.

The input / output operation of the sound I / O 112 using the input FIFO and the output FIFO will be briefly described below.

A sound I / O 112 from an external input 111
The analog tone signal input to the A / D input terminal is A / D-converted according to a sampling clock having a frequency Fs, and is written to an input FIFO (ADPCM-compressed as necessary or as it is). If the input FIFO contains waveform data, the sound I / O 112
A request to process the input waveform data is issued to the MA controller 113. The DMA controller 113 stores the data of the input FIFO in the RAM 1 in response to the processing request.
04 to a predetermined area (recording buffer area secured in advance). This DMA controller 11
The transfer of data by 3 is performed by the DMA controller 113 securing the bus line 115 by interrupting the CPU 101 every sampling clock Fs. CPU1
01 is the bus line 1 by the DMA controller 113
I do not have to worry about securing 15. The process of transferring the waveform data during the recording by the DMA controller 113 will be described in detail with reference to FIG.

On the other hand, the output FI in the sound I / O 112
When waveform data exists in the FO, the waveform data in the output FIFO is D / D for each sampling clock Fs.
A-converted, sound system 1 via D / A output terminal
14 and the sound is emitted. When the waveform data of the output FIFO is output, the output FIFO has an empty space, so that the sound I / O 112 issues a request for obtaining the waveform data to the DMA controller 113. The CPU 101 generates waveform data to be output in advance and stores the waveform data in a reproduction buffer on the RAM 104, and issues a reproduction request of the waveform to the DMA controller 113. The DMA controller 113 controls the CPU 1 every sampling clock Fs.
01, the bus line 115 is secured, and R
The waveform data in the playback buffer on the AM 104
/ O112 to the output FIFO. The transfer of the waveform data by the DMA controller 113 is performed by the CPU 10.
No one is conscious. The waveform data written in the output FIFO is, as described above, the sampling clock F.
It is sent to the sound system 114 every s and is emitted. The transfer processing of the waveform data at the time of reproduction by the DMA controller 113 will be described in detail with reference to FIG.

Further, the sound I / O 112 has an A / D
A function is provided in which the waveform data input to the input terminal is passed directly to the D / A output terminal, and the tone signal from the external input 111 is output as it is by the sound system 114. The connection between the A / D input and the D / A output is CP
This is performed based on an instruction from U101. Also CPU
The 101 can also disconnect the connection between the A / D input and the D / A output.

Next, the outline of the function of the sampler of FIG. 1 will be described. This sampler has seven modes: a normal mode, a sampling mode, a filter reproduction mode, a reproduction mode with a pitch, a scratch reproduction mode, an external input (EX) filter mode, and an external input (EX) scratch mode.
It has two operation modes. These modes are in panel S
It can be switched by the mode switch on W109. Hereinafter, each mode will be described.

The normal mode is a mode for reproducing recorded musical sounds. The initial state of this sampler is the normal mode. In normal mode, the user
Tap one of the pads 107 (pad on)
Then, the waveform data recorded corresponding to the pad is reproduced. In the normal mode, up to four sounds can be reproduced. That is, up to four pads, the waveform data recorded corresponding to each pad is reproduced every time the pad is turned on, and when the fifth pad is turned on, the reproduction sound corresponding to the first turned on pad is stopped, 5 newly turned on
The waveform data corresponding to the third pad is reproduced.

The sampling mode is a mode for performing recording. When the sampling mode is designated by the mode changeover switch, the user designates a pad for simultaneous recording. Thus, a musical tone input from the outside can be recorded corresponding to the pad.

In the filter reproduction mode, only two tones are reproduced in accordance with pad-on as in the normal mode.
Further, the reproduced sound is subjected to digital filter processing, specifically, low-pass filter processing. By operating the ribbon controller 106, the user can change and control the cutoff frequency in the low-pass filter processing.

The pitched reproduction mode is a mode for reproducing a recorded musical tone with a pitch. (In operation modes other than the playback mode with the pitch, playback is performed at the same pitch as when recording.) When the playback mode with the pitch is designated by the mode changeover switch, the user designates any pad at the same time. Specify the waveform data to be played in the playback mode with pitch. After that,
When any of the ten pads is turned on, the previously specified waveform data is reproduced at a pitch corresponding to that pad. Only two sounds can be reproduced in this mode. Here, a pad for designating a waveform to be reproduced is also used as a pitch designation operator, but a pitch designation operator may be provided separately from the pad.

The scratch reproduction mode is a mode for realizing a scratch operation by a user. When the scratch playback mode is specified by the mode switch,
The user specifies any one pad at the same time. The waveform data corresponding to the pad is the waveform data to be scratch-reproduced. Thereafter, when the user touches the ribbon controller 106, the reproduction of the waveform data starts, and by moving the position touching the ribbon controller 106, the reproduction sound is scratch-reproduced. further,
In this mode, in addition to the scratch reproduction, reproduction similar to the normal mode using ten pads can be performed for two sounds.

The EX filter mode is a mode in which the external input 111 is filtered (low-pass filtered) and output to the sound system 114. The cut-off frequency of the filtering is determined by the user using the ribbon controller 10.
6 can control the change. In the EX filter mode, even when the pad is turned on, the reproduction of the waveform corresponding to the pad is not performed.

In the EX scratch mode, the external input 111
This is a mode in which a scratch operation is performed using. In the EX scratch mode, the external input 111 is emitted by the sound system 114 as it is while the ribbon controller 106 is not touched. When the ribbon controller 106 is touched, direct sound emission from the external input is stopped, and the ribbon controller 106 performs scratch reproduction using the external input waveform captured up to that point. In the EX scratch mode, even if the pad is turned on, the reproduction of the waveform corresponding to the pad is not performed.

Next, registers, buffers, and the like provided on the RAM 104 will be described.

FIG. 2A shows a tone generator register on the RAM 104. The tone generator register includes an area for four channels for pad performance (1 ch to 4 ch) and a tone generator register sch for scratch reproduction. The register of each channel stores information such as a read address of waveform data to be reproduced and note-on.

FIG. 2B shows a recording buffer on the RAM 104. Two recording buffers, RB0 and RB1, are prepared, each of which can store 128 samples of waveform data. At the time of recording, waveform samples are stored in one recording buffer (that is, the DMA controller 113 converts the waveform data of the external input 111 to the sound I / O1).
12) to the recording buffer via the input FIFO), and when the recording buffer is full, the CPU 1
In step 01, the waveform sample of the recording buffer is written to the flash memory 103. At the same time, the waveform samples are continuously stored in the other recording buffer. In this manner, recording is performed using two recording buffers alternately. RBk (k = 0 or 1)
Indicates a recording buffer that is currently recording (storing waveform data), and the RBk bar indicates the other recording buffer. The k bar indicates the inversion of k (k bar = 1 when k = 0, k bar = 0 when k = 1), and k bars are indicated by overlining k in the drawing.

FIG. 2C shows a reproduction buffer on the RAM 104. Two reproduction buffers PB0 and PB1 are prepared, each of which can store 128 samples of waveform data. When one of the reproduction buffers is used for reproduction (that is, the waveform data in the reproduction buffer
When the data is transferred to the output FIFO 112 and output through the output FIFO), waveform data to be output next by the CPU 101 is prepared in the other reproduction buffer. In this way, the reproduction is performed using the two reproduction buffers alternately. It should be noted that PBr (r = 0 or 1) indicates a playback buffer that is currently transferring waveform data to the sound I / O 112 for playback, and a PBr bar indicates the other playback buffer. The r bar indicates the inversion of r (r bar = 1 when r = 0, r bar = 0 when r = 1), and the r bar is indicated by overlining r in the drawing.

FIG. 2D shows a scratch area SR provided on the RAM 104. This scratch area SR
Is an area secured when the scratch reproduction mode is designated. When entering the scratch reproduction mode, the waveform data corresponding to the designated pad is expanded by ADPCM (in 16-bit linear format) and expanded in a predetermined area on the RAM 104. A predetermined area in the expanded waveform data is defined as a scratch area SR. In which position in the waveform data the scratch area SR is set is determined in advance. A predetermined address on the scratch area SR is set in the scratch pointer SP as a scratch start address. The value of the scratch pointer SP can be changed by the user. When the user operates the ribbon controller 106 in the scratch reproduction mode, the scratch reproduction is performed. However, regardless of the operation start position of the ribbon controller 106, the scratch pointer S
Scratch reproduction is started from the position indicated by P.

FIG. 2E shows a scratch area in the EX scratch mode. In the EX scratch mode, the waveform data of the external input 111 is stored in the recording buffer SRB.
0, stored in SRB1 (FIG. 2 (e)). The recording buffers SRB0 and SRB1 are recording buffers corresponding to the recording buffers RB0 and RB1 described with reference to FIG.
It is used alternately in the same manner as B0 and RB1. SRB0 and S
RB1 has a capacity sufficient for performing scratching (for example, if the sampling clock is 40 kHz, 4
(Capacity enough to store 0 k samples or more). SR
Of the B0 and SRB1, the recording buffer to which writing has not been performed when the operation of the ribbon controller 106 is started is set as a scratch area. FIG.
In (e), since there is a position indicated by the recording pointer RP indicating the address to be written in the recording buffer SRB0, writing is currently performed on SRB0. Therefore, a predetermined area in the recording buffer SRB1 in which writing is not performed is set as a scratch area SR. Also,
A predetermined address on the scratch area SR is set in the scratch pointer SP as a scratch start address.

Next, registers other than those shown in FIG. 2 will be described.

(1) m: Operation mode register. 0
Is normal mode, 1 is sampling mode, 2 is filter playback mode, 3 is playback mode with pitch, 4 is scratch playback mode, 5 is EX filter mode, 6 is EX mode.
Indicates a scratch mode. (2) PN: a register for storing a pad number for specifying a pad. (3) i: a register for storing a channel number of a channel to which a sound is to be assigned. (4) FNi: F of the i-th channel to which the sound is assigned
This is a register that stores the number. (5) TMP: a register for storing a detection value of the ribbon controller 106.

(6) RD: a register for setting the detection value when the detection value from the ribbon controller 106 changes. (7) RS: a flag indicating the state of the ribbon controller 106. The value is 1 when the ribbon controller 106 is operated (when a finger or the like is touching the ribbon controller 106), and is 0 when the ribbon controller 106 is not operated (when a finger or the like is not touching). (8) VEL: a register for setting a moving speed of the ribbon controller 106 (specifically, a moving speed of a finger or the like touching the ribbon controller 106). (9) OLD: a register for holding the detected value of the ribbon controller 106 one time before. (10) SAD: a register for storing a scratch address.

(11) ADi: i-th channel (i = 1
4) A register for storing the read address in 4). (12) SFN: A register for storing the F number in reading the waveform data of the scratch channel sch. (13) RP: a recording pointer. Indicates the waveform data write position of the recording buffer. (14) PP: pointer for reproduction. Indicates the read position of the waveform data in the reproduction buffer.

The symbols indicating the above-mentioned registers and the like are as follows:
The storage area itself such as a register is shown, and the data stored in the storage area is also shown. For example, "m" indicates an operation mode register and also indicates data indicating an operation mode stored in the register.

FIGS. 3 to 16 are flowcharts for explaining the operation of the CPU 101 and the DMA controller 113 in the sampler of FIG. In the following, we first explain the hierarchical structure of these software,
Next, the processing procedure of each software module will be described with reference to the flowcharts of FIGS. Then, at what timing the software modules are implemented to realize the functions of each mode will be described for each mode.

First, the hierarchical structure of software will be described. The programs shown in FIGS. 3 to 16 are classified into the following levels.

Level 1: DR (m) routine of FIG. 15 which is a processing routine of the DMA controller 113 at the time of recording, and DP routine of FIG. 16 which is a processing routine of the DMA controller 113 at the time of reproduction.

Level 2: Waveform generation routine HS in FIGS. 11 and 12 in which a waveform is generated by CPU 101
(M), and a ribbon value capture routine RC (m) of FIGS. 9 and 10 for capturing the detection value of the ribbon controller 106 by the CPU 101. The processing routine of FIGS. 13 and 14 which is a subroutine of the waveform generation routine HS (m) is also included.

Level 3: A steady routine of FIG. 3 executed by the CPU 101. Subroutines such as pad scan, SW scan, and event routines (FIGS.
8 is also included.

The processing routine of level 1 has the highest priority. That is, when an interrupt for executing the level 1 processing routine is applied while the level 2 or level 3 processing is being performed, the level 1 processing routine is executed with the highest priority. Level 1 processing DR (m) and DP
Is a process executed by the DMA controller 113, not a process executed by the CPU 101. Therefore, when an interrupt of the level 1 process is applied, the operation of the CPU 101 is stopped, and the bus line 115 is secured by the DMA controller 113. Is performed with the highest priority. The interruption of this level 1 processing is performed by the sampling clock F
Follow s. That is, an interrupt occurs for each sampling clock Fs, and the DMA controller 113 executes DP for reproduction and DR for recording.
(M) is executed. Note that the sampling clock Fs
Whether to execute DP or DR (m) in each interrupt is determined in advance by the CPU 101 by the DMA controller 1.
13 is specified.

The level 2 processing has a lower priority than the level 1 processing, but has a higher priority than the level 3 processing. That is, when an interrupt for performing the level 2 processing is applied while the level 3 routine is being executed, the level 2 processing routine is executed with priority. DMA above
The DP routine of the controller 113 reproduces the waveform data in the reproduction buffer, and interrupts the CPU 101 when the reproduction buffer becomes empty. Upon receiving this interrupt, the CPU 101 sets the waveform creation routine HS
Execute (m) to prepare a waveform sample in the reproduction buffer. The ribbon value fetching routine RC (m) is started by a timer interrupt. That is, a timer interrupt is generated at every clock output from the timer 105 at a predetermined interval, whereby the CPU 101 executes the ribbon value fetching routine RC (m) and
The detection value of 6 is taken in.

Level 3 is a processing routine having the lowest priority. The CPU 101 repeatedly executes the regular routine shown in FIG.
When there is an operation event of 09, a predetermined subroutine is executed.

Next, the processing procedure of each software module will be described with reference to the flowcharts of FIGS.

FIG. 3 shows a level 3 routine.
When the power of the sampler is turned on, the CPU 101 executes this regular routine. First, in step 301,
Make various initial settings. In particular, the operation mode m is m =
0, that is, the normal mode, note-off is set to all the channels of the tone generator register in FIG.
(C) All the sample areas of the reproduction buffers PB0 and PB1 are cleared to zero. Also, the CPU 101 sets the DM
The reproduction processing is instructed to the A controller 113. Thus, the DMA controller 113 interrupts the CPU 101 for each sampling clock Fs from the Fs generator 110, and starts the operation of reproducing the waveform data in the reproduction buffer by executing the DP routine of FIG. 16 each time. become. Furthermore, in the initial setting, the timer 10
5 is started. As a result, the CPU 101
Each time a timer interrupt occurs from the clock 05, the RC fetching routine RC (m) is executed, and the process of fetching the detection value of the ribbon controller 106 is started.

Next, a pad scan process is performed in step 302, a SW scan process is performed in step 303, and the process returns to step 302 and repeats the process. The pad scan processing in step 302 is performed by using ten pads 1
07 is a process for detecting whether or not there is an ON event, and executing the ON event routine shown in FIGS. 7 and 8 when the ON event is detected. The SW scanning process in step 303 is a process of detecting whether or not the operation of the panel SW 109 has been performed, and executing a processing routine according to the operation when the operation has been performed.

FIG. 4 shows a mode SW event routine which is called when it is detected that the mode changeover switch has been operated in the SW scan processing in step 303 of FIG. In the mode SW event routine, a value indicating the operation mode specified in accordance with the operation of the mode change switch in step 401 is set in the register m, and the display 1 corresponding to the mode m specified in step 402 is set.
08 to display control. Then, step 403
And the start processing MS (m) corresponding to the specified mode m
Is executed, and the process ends.

FIG. 5 shows a case where the user designates the sampling mode (m = 1) with the mode changeover switch.
5 is a flowchart of a sampling mode start process MS (1) called in step 403 of FIG. MS (1)
In the process, first, at step 501, it is determined whether or not a pad has been designated. If the pad has not been designated, it is determined in step 502 whether or not the designation of the sampling mode is stopped. If the sampling mode designation process is continued, the process returns to step 501 again, and prompts the user to designate a pad.

If a pad is designated in step 501, the designated pad number is stored in the register PN in step 503, and recording preparation is performed in step 504. The recording preparation is processing such as securing recording buffers RB0 and RB1, a recording area on the flash memory 103, and other areas. DMA controller 1
13 for each sampling clock Fs.
By interrupting U101, the execution of the DP routine is stopped. Next, in step 505, it is determined whether or not a recording start condition (trigger) is satisfied. As a condition for starting the recording, for example, a condition that the recording is started when the input level becomes equal to or higher than a certain level is used. If the condition for starting recording is not satisfied, it is determined in step 506 whether or not to stop recording.
Return to 05.

If the condition for starting recording is satisfied in step 505, recording is started in step 507. The recording start is, specifically, a process in which the CPU 101 instructs the DMA controller 113 to start recording. Thus, the DMA controller 113 interrupts the CPU 101 for each sampling clock Fs from the Fs generator 110, executes the DR (1) routine of FIG. The process of setting the recording buffer RBk via the input FIFO in the I / O 112 is started.

Next, at step 508, it is determined whether or not the recording buffer is full. As will be described in detail with reference to FIG. 15, in the DR (1) routine, an externally input waveform sample is transferred to the recording buffer RBk, and when RBk is full, k is inverted to generate an interrupt. In step 508, it is determined whether or not the recording buffer is full by waiting for the interruption. When this interruption occurs, it means that the recording buffer RBk bar has been filled with the waveform sample. Therefore, in step 509, the waveform sample of the recording buffer RBk bar is written to a predetermined area of the flash memory 103, and the step 508 is performed again. Return to

When the recording buffer is not full at step 508 (when there is no interruption from the DR (1) routine), at step 510, it is determined whether or not the recording processing is to be ended. The recording process is performed when the recording stop switch of the panel SW 109 is turned on or when the flash memory 1 is turned on.
It is assumed that the process ends when the recording area secured at 03 is full. If the recording process is not completed in step 510, the process returns to step 508 to continue recording. If the recording process is completed in step 510, a recording end process is performed in step 511. This is done by instructing the DMA controller 113 to make the CPU 1
This is a process of interrupting 01 and stopping the execution of the DR (1) routine. Next, in step 512,
A process for setting the register m to 0 and returning to the normal mode is performed, and the process ends. In the process of returning to the normal mode, the CPU 101 is instructed to start the execution of the DP routine by interrupting the CPU 101 for each sampling clock Fs.

If the sampling mode designation process is to be canceled in step 502, the process returns to the normal mode after setting the register m to 0 in step 513, and the process is terminated. If the recording process is to be canceled in step 506, the register m
After setting the value to 0 and returning to the normal mode,
The process ends. The processing of steps 513 and 514 is the same as the processing of step 512.

FIG. 6 shows a case where the user designates the scratch reproduction mode (m = 4) with the mode changeover switch.
5 is a flowchart of a scratch reproduction mode start process MS (4) called in step 403 of FIG. MS
In the process (4), first, in step 601, it is determined whether or not a pad has been designated. If the pad has not been designated, it is determined in step 602 whether or not the designation of the scratch reproduction mode is stopped. If the process of designating the scratch reproduction mode is continued, the process returns to step 601 again, and prompts for the designation of the pad.

If a pad is designated in step 601, the designated pad number is stored in the register PN in step 603, and preparation is made in step 604 for scratching. In this process, waveform data recorded corresponding to the pad number PN is read from the flash memory 103, expanded by ADPCM, and expanded in a predetermined area on the RAM 104. Next, in step 605,
A predetermined area of the waveform data developed on the RAM 104 is set as a scratch area SR (FIG. 2D), and a scratch pointer SP, which is an address to start the scratch, is set to a predetermined value.

If the scratch reproduction mode designating process is canceled in step 602, the process returns to the normal mode by setting 0 to the register m in step 606, and the process ends.

FIG. 7 shows a case where the mode m is m = 0, 2, or 4, that is, when the mode is the normal mode, the filter regeneration mode, or the scratch regeneration mode, step 3 in FIG.
2 shows a flowchart of a pad-on-event routine called when an on-event of the pad 107 is detected at 02. In this on-event routine, first, in step 701, the pad number of the pad 107 having the on-event is set in the register PN, and in step 702,
It is determined whether the waveform data corresponding to the pad number PN has been recorded on the flash memory 103 or not. If there is no waveform data corresponding to the pad number PN, the process ends.

If it is determined in step 702 that the waveform data corresponding to the pad number PN has been recorded, step 703 is executed.
To assign sounding channels. This assignment is performed with the number of sounds according to the mode m. That is, in the normal mode, four sounds can be generated, so if any of the first to fourth channels has an empty channel, it is assigned to the empty channel, and all the four channels are used for sound generation. At this time, the channel which has started sounding the earliest in the past is muted, and a new sound is assigned to the channel. In the case of the filter reproduction mode or the scratch reproduction mode, two sounds can be generated, so that the sound is allocated to the first or second channel in the same manner. The assigned channel number is set in the register i. Next, in step 704, various kinds of information (such as the start address ADi of the waveform data to be reproduced) for generating sound are set in the tone generator register ich of the i-th channel, and note-on is set, and the process is terminated.

FIG. 8 shows a case where the mode m is m = 3, that is, in the case of the reproduction mode with pitch, step 30 in FIG.
2 shows a flowchart of a pad-on-event routine called when an on-event of the pad 107 is detected in 2. In the pad-on event routine in the playback mode with pitch, first, in step 801, the pad number of the pad 107 having the on-event is set in the register PN, and in step 802, a sound channel is assigned. In the pitched playback mode, up to two tones can be generated, and therefore, channels are assigned as a maximum of two tones. Next, in step 803, the pad number PN is converted to an F number and set in the register FNi. Then, in step 804, the sound source register ich of the i-th channel
, Various kinds of information (read start address ADi of waveform data to be reproduced and F number FNi, etc.) for reproduction with pitch are set, and note-on is set, and the process ends.

FIG. 9 is a flowchart of an RC fetching routine RC (m) for fetching the detection value of the ribbon controller 106 when the mode m is m = 2, 5, that is, in the filter regeneration mode or the EX filter mode. is there. This is a process for taking in the detected value in order for the ribbon controller 106 to perform the filter control. FIG. 10 is a flowchart of an RC capturing routine RC (m) for capturing the detection value of the ribbon controller 106 when the mode m is m = 4, 6, that is, in the scratch reproduction mode or the EX scratch mode. . This is a process for taking in the detected value for performing the scratch control by the ribbon controller 106.

The timer 105 is started in the initial setting of step 301 in FIG.
Performs timer interrupt processing. The RC capture routine RC (m) in FIG. 9 is a process executed when the mode m is 2 or 5 in the timer interrupt. Also,
The RC capture routine RC (m) of FIG. 10 is a process executed when the mode m is 4 or 6 in the timer interrupt.

The RC capture routine RC (m) shown in FIG.
(M = 2, 5). First, in step 901,
The detection value of the ribbon controller 106 is set in the register TMP. Next, in step 902, it is determined whether the detected value has changed by comparing with the detected value at the time of the previous timer interruption. If there is no change, the process ends.
If there is a change, in step 903, the detected value TMP
Is set in the register RD, and the process ends. as a result,
This means that the detection value of the ribbon controller 106 has been set in the register RD. Note that the ribbon controller 106
When a finger or the like leaves from, the detected values TMP and RD may be returned to a predetermined standard value, or a coefficient immediately before the finger or the like may be retained.

The RC acquisition routine RC (m) shown in FIG.
(M = 4, 6) will be described. FIG. 10 shows the RC capture routine RC (4) called when the operation mode is the scratch reproduction mode (m = 4) and the RC capture routine RC called when the operation mode is the EX scratch mode (m = 6). 10 is a flowchart for explaining (6) together with steps 1006 and 100
9, 1015, and 1016 are processes of only RC (6), so that the processing procedure of RC (4) will first be described below.
Then, the processing procedure of RC (6) will be described.

In the ribbon controller detection value fetching routine RC (4), first, in step 1001, the detection value of the ribbon controller 106 is set in a register TMP. Next, in step 1002, the ribbon controller 10
It is determined whether or not operation 6 is performed. The ribbon controller 106 outputs a coordinate detection value indicating a coordinate position touched by a finger or a stick when touched by a finger or a stick. Operation is not performed). If the operation of the ribbon controller 106 has not been performed, the process proceeds to step 1003, and if the operation has been performed, the process proceeds to step 1004.

At step 1003, the register RS is set to 0
Is determined. When the value of the register RS is 0, it means that the ribbon controller 106 has not been operated at both the time of the previous interrupt and the time of the current interrupt. RS in step 1003
Is not 0, it means that RS = 1 at the time of the previous interrupt, that is, the operation of the ribbon controller 106 has been performed, but that no operation has been performed at the time of this interrupt (the finger or the stick has been released). So step 1
In step 013, the register RS is cleared to 0, and
Then, note-off is written into the sound source register sch of the scratch channel, and the process is terminated.

At step 1004, the register RS is set to 1
Is determined. When the register RS is not 1, since RS = 0 at the time of the previous interrupt, that is, the operation of the ribbon controller 106 has not been performed, it means that the operation has been performed at the time of this interrupt.
In step 1005, 1 is set in the register RS, and 0 is set in the speed VEL. Then, in step 1007, the value (predetermined value) of the scratch pointer SP is set as the read address SAD. Next, in step 1008, various information for scratch reproduction (the read address SAD of waveform data to be scratch-reproduced) is stored in the sound source register sch of the scratch channel.
And speed value VEL) and write note-on. Next, at step 1010, register O
The detected value TMP of the ribbon controller 106 at this time is stored in LD.
Is set, and the process ends.

If RS is 1 in step 1004, it means that RS = 1 at the time of the previous interruption and RS = 1 at the time of this interruption (the operation of the ribbon controller 106 is continued). Therefore, in step 1011, the operation speed of the ribbon controller 106 is detected and set in the register VEL. The speed VEL is calculated by subtracting the detection value OLD at the previous interruption from the current detection value TMP. Therefore,
The speed VEL may be negative. Further speed V
EL is the sound source register sch of the scratch channel.
Shall be set to Next, in step 1012, the current detection value TMP is set in the register OLD, and the process ends.

What has been described above is the RC take-in routine RC in the case of mode m = 4, that is, in the case of the scratch reproduction mode.
(4) RC input routine RC (6) when mode m = 6, that is, when EX scratch mode
Then, step 1006 is added after step 1005, step 1009 is added after step 1008, and steps 1015 and 101 are added after step 1014.
Add 6. Further, the processing of steps 1008 and 1014 is slightly different. Hereinafter, these will be described.

At the time when the operation of the ribbon controller 106 is started, through steps 1004 to 1005,
Proceed to step 1006. In step 1006, the CP
U101 instructs the DMA controller 113,
The CPU 101 interrupts the sampling clock Fs to stop the execution of the DR (6) routine, and the two recording buffers SRB0 and SRB1.
Among them, the scratch area SR is set in the recording buffer SRBk bar on which writing is not currently performed as described with reference to FIG. Next, the process proceeds to step 1008 via step 1007.

At step 1008, various information for scratch reproduction (read address SAD of waveform data to be scratch-reproduced, speed value VEL, etc.) is set in the sound source register sch of the scratch channel, and note-on is written. . Further, in step 1008, the following processing is also performed before the above processing.
That is, first, 128 samples are generated in the reproduction buffer PBr. In this process, after the reproduction buffer PBr is cleared to 0, the EX scratch processing of FIG. 14 described later may be performed on the reproduction buffer PBr (using PBr instead of the PBr bar in FIG. 14). In addition, the CPU 101 instructs the DMA controller 113 to restart the execution of the DP routine by interrupting the CPU 101 for each sampling clock Fs. Further, an interrupt having the same meaning as the interrupt generated in step 1605 of the DP routine of FIG. By this interrupt, HS (6) is executed, and 128 samples to be scratch-reproduced next are generated on the PBr bar.

Thereafter, in step 1009, the CPU 10
1 disconnects the direct connection from the A / D input of the sound I / O 112 to the D / A output,
The transmission of the musical sound signal from the sound signal 11 directly to the sound system 114 is stopped.

When the operation of the ribbon controller 106 is stopped, the process proceeds from Steps 1002 through 1003 and 1013 to Step 1014. In step 1014, note-off is written to the sound source register sch of the scratch channel. After that, the following processing is also performed. That is, the CPU 101 instructs the DMA controller 113 to stop executing the DP routine by interrupting the CPU 101 for each sampling clock Fs.

In step 1015, the CPU 10
1 restarts the direct connection of the sound I / O 112 from the A / D input to the D / A output,
1 directly to the sound system 114 to output a tone signal. In step 1016, the CPU 1
From 01, the DMA controller 113 is instructed to restart the execution of the DR (6) routine by interrupting the CPU 101 every sampling clock Fs.

FIGS. 11A to 11C and FIG.
(A) to (c) are flowcharts of a waveform generation routine HS (m) executed by the CPU 101 to generate a waveform sample on the reproduction buffer in each mode m. The waveform generation routine HS (m) is executed by the CPU 101 in response to an interrupt request in step 1605 of the DP routine of FIG. That is, the DP routine executes the reproduction buffer PB for each sampling clock Fs.
The waveform sample in r is transferred to the sound I / O 112 for reproduction. When all 128 samples in the reproduction buffer PBr have been reproduced, the DP routine inverts k and generates an interrupt. This interrupt triggers the CPU
101 is a waveform generation routine HS corresponding to the mode m.
(M) is executed, and 128 samples for one frame are newly generated in the empty reproduction buffer PBr bar just after the reproduction.

FIG. 11A is a flowchart of a waveform generation routine HS (0) for generating a waveform sample on the reproduction buffer in the normal mode. In HS (0), the subroutine normal 4
And ends the processing. This subroutine will be described later with reference to FIG.

FIG. 11B is a flowchart of a waveform generation routine HS (2) for generating a waveform sample on the reproduction buffer in the filter reproduction mode. HS
In (2), normal 2 which is a subroutine is called in step 1111, and a filter coefficient (cutoff frequency) is generated in step 1112 according to the detection value RD of the ribbon controller 106. And step 1113
Performs filter processing (low-pass filter processing), and ends the processing. The normal 2 in step 1111 will be described later with reference to FIG.

FIG. 11C is a flowchart of a waveform generation routine HS (3) for generating waveform samples on the reproduction buffer in the reproduction mode with pitch. HS
In (3), the subroutine pitch 2 is called in step 1121, and the process ends. The pitch 2 will be described later with reference to FIG.

FIG. 12A is a flowchart of a waveform generation routine HS (4) for generating a waveform sample on the reproduction buffer in the scratch reproduction mode. HS
In (4), normal 2 which is a subroutine is called in step 1201, and a scratch processing routine which is a subroutine is called in step 1202, and the process is terminated. The normal 2 will be described later with reference to FIG. The scratch processing will be described later with reference to FIG.

FIG. 12B is a flowchart of a waveform generation routine HS (5) for generating a waveform sample on the reproduction buffer in the EX filter mode. HS
When (5) is called, 128 samples (linear samples) of the waveform data from the external input 111 have been written to the recording buffer RBk bar, and the reproduction buffer PBr bar is empty. Therefore, in HS (5), first, in step 1211, the ribbon controller 106
, A filter coefficient is generated in accordance with the detected value RD, and EX filtering is performed in step 1212. The EX filter process is a process of performing a filtering process on 128 waveform samples of the recording buffer RBk bar using the filter coefficient obtained in step 1211, and obtaining a 128
This is a process of setting the number of waveform samples in the reproduction buffer PBr bar. After step 1212, the process ends.

FIG. 12C is a flowchart of a waveform generation routine HS (6) for generating a waveform sample on the reproduction buffer in the EX scratch mode. HS
In (6), it is determined whether or not the register RS is 1 in step 1221. When the register RS is not 1,
Since the operation of the ribbon controller 106 has not been performed, the process ends. Step 12
If the register RS is 1 at 21, it means that the ribbon controller 106 has been operated, so the EX scratch processing is performed at step 1222, and the processing ends. The EX scratch processing will be described later with reference to FIG.

FIG. 13A shows a flowchart for normal n. n is n = 4 when the normal 4 is called in the above-described step 1101, and the above-mentioned steps 1111 and 1111 are used.
In the case of normal 2 called at 1201, n = 2.

First, in step 1301, a work register i for counting channels is set to 1 and a work register j for counting the number of samples is set to 0. All the sample areas of the reproduction buffer PBr bar
clear. Next, in step 1302, it is determined whether or not note-on is written by referring to the tone generator register ich of the i-th channel. When the note-on is not written, the waveform generation of the i-th channel does not need to be performed, and the process proceeds to step 1308 as it is. If it is determined in step 1302 that the i-th channel has been turned on, the process proceeds to step 1303.

In step 1303, the read address ADi of the i-th channel (ADi is set in the tone generator register ich of the i-th channel) is incremented. The waveform sample is read out and subjected to ADPCM expansion to obtain a linear waveform sample, which is set in the work register TMP. Next, in step 1305, the value of the register TMP is accumulated in the reproduction buffer PBr (j) (channel accumulation).

Next, at step 1306, it is determined whether or not the value of the register j has reached 127.
If the count has not reached 27, the value of the register j is incremented in step 1307, and the process returns to step 1303 to repeat reading, expansion, and accumulation of the next waveform sample. When the value of the register j becomes 127 in step 1306, it means that the accumulation of 128 samples of the i-th channel has been completed in the area of 128 samples of the reproduction buffer PBr bar, and the process proceeds to step 1308.

At step 1308, it is determined whether or not the register i has reached n. If the register i has not reached n, step 1 is performed to accumulate the next channel.
In step 309, the register i is incremented, the register j is cleared to 0, and the process returns to step 1302 to repeat the processing for the i-th channel. When the value of the register i reaches n in step 1308, it means that the accumulation of the channel to be processed has been completed and 128 samples have been generated on the reproduction buffer PBr bar.

FIG. 13B is a flowchart of pitch 2 which is a subroutine called in step 1121 of FIG. 11C. In step 1311, 1 is set to a work register i for counting channels, and a work register j for counting the number of samples is set.
Is set to 0, and all the sample areas of the reproduction buffer PBr bar which are not currently reproduced by the DP routine are cleared to 0. Next, in step 1312, it is determined whether or not note-on has been written by referring to the tone generator register ich of the i-th channel. When the note-on is not written, it is not necessary to generate the pitched waveform of the i-th channel.
Go to 9. If it is determined in step 1312 that the i-th channel has been turned on, the process proceeds to step 1313.

In step 1313, the F-number FNi is added to the waveform sample read address ADi of the i-th channel to obtain a new address ADi. ADi and F
Ni is set in the tone generator register ich of the i-th channel. Next, at step 1314, a waveform sample is read from the position of the address ADi of the waveform data to be read on the i-th channel, and a linear waveform sample is obtained by performing ADPCM expansion, and set in the work register TMP. The waveform data to be read is ADPC
When the integer part of the address ADi advances by 2 or more because of the M compression, all samples from the previous read position to the present read position ADi are read and used for expansion. Next, in step 1315, interpolation between samples is performed according to the decimal part of the address ADi, and the interpolated waveform sample is set in the register TMP. Then, in step 1316, the calculated waveform sample T is added to the j-th sample area PBr bar (j) of the reproduction buffer PBr bar.
MP is channel accumulated.

Next, at step 1317, the register j is set to 1
It is determined whether or not the number has reached 27. If not,
In order to process the next sample, the register j is incremented in step 1318, and the process returns to step 1313. When the value of the register j reaches 127 in step 1317, it means that the processing of the i-th channel has been completed. Therefore, it is determined in step 1319 whether or not the value of the register i has reached 2. If the register i has not reached 2, the register i is incremented in step 1320 and the register j is cleared to 0 in order to perform the processing of the next channel, and then the process returns to step 1312. When the value of the register i reaches 2 in step 1319, the process ends.

FIG. 14 is a flowchart showing step 120 in FIG.
2 or the scratch processing called in FIG.
It is a flowchart of the EX scratch process called in step 1222 of FIG. First, in step 1401, the detected moving speed VEL of the ribbon controller 106 is set.
(VEL is the sound source register sc of the scratch channel.
h) is replaced by the F number SF for scratching
Convert to N Speed VEL which is not only positive number but also negative number
, The F number SFN is also determined in accordance with the equation (1), the F number SFN also changes in the positive / negative region. Next, at step 1402, the register j is cleared to 0, and at step 14
Go to 03.

In step 1403, the scratch F number SFN is added to the scratch read address SAD (SAD is set in the tone generator register sch of the scratch channel). In step 1404, the address of the waveform data address SAD to be read is determined. The waveform sample is set in the read register TMP. FIG.
In the scratch process called in step 1202 of FIG. 2A, the waveform data to be read
The CM is expanded and expanded in a predetermined area, and a scratch area SR is set in the waveform data (steps 604 and 605 in FIG. 6). Step 1 in FIG.
In the EX scratch process called at 222, the recording buffer SRB input from the external input
0 and SRB1 are written alternately in the waveform data (linear samples). When the operation of the ribbon controller 106 is started, the scratch area SR is included in the waveform data of the recording buffer that has not been written. Is set (step 100 in FIG. 10).
7). In any case, in step 1404, it is assumed that the number of samples required for interpolation is read.

Next, at step 1405, the address SAD
Is interpolated between the samples according to the decimal part, and the interpolated waveform sample is set in the register TMP. Then, at step 1406, j of the reproduction buffer PBr bar
The waveform sample T is placed in the PBr bar (j) of the
MP is channel accumulated.

Next, at step 1407, the register j is set to 1
It is determined whether or not the number has reached 27. If the value of the register j has not reached 127, the value of the register j is incremented in step 1408 so as to process the next sample, and the process returns to step 1403. When the value of the register j reaches 127 in step 1407, the process ends.

FIG. 15 shows that the DMA controller 113
sampling clock Fs generated from the s generator 110
9 is a flowchart of a DR (m) routine executed every time. Since the recording is performed when the mode m is m = 1, 5, 6, DR (m) is either m = 1, 5, or 6.

First, in step 1501, sound I / O
A 112 input FIFO (a tone signal input from an external input 111 to an A / D input terminal is A / D converted and input FIFO
Is set in the recording buffer R
Sample area RBk pointed to by Bk recording pointer RP
(RP). When the mode m is m = 1, that is, in the sampling mode, the A / D-converted linear waveform sample is ADPCM-compressed using the ADPCM compression function of the sound I / O 112, and the compressed waveform sample is input via the input FIFO. The data is transferred to the recording buffer RBk (RP). When the mode m is m = 5 or 6, that is, in the EX filter mode or the EX scratch mode, the A / D-converted linear waveform sample is input to the input F without using the ADPCM compression function of the sound I / O 112.
Transfer to recording buffer RBk (RP) via IFO (however, when m = 6, recording buffer RBk (RP)
Instead of using a recording buffer SRBk (RP))
Shall be.

Next, at step 1502, the recording pointer R
P is incremented, and it is determined in step 1503 whether or not the recording buffer RBk (SRBk when m = 6, the same applies hereinafter) is full. If it is not full, the process ends. When the recording buffer RBk is full, k is inverted in step 1504 (0, 1, 1).
Then, it is set to 0), an interrupt is generated in step 1505, and the process is terminated. This interrupt is an interrupt for requesting the CPU 101 to write the waveform sample of the recording buffer (RBk bar at this time) which is full to the flash memory 103 to make the recording buffer empty.

FIG. 16 shows that the DMA controller 113
sampling clock Fs generated from the s generator 110
6 is a flowchart of a DP routine executed every time.

First, in step 1601, the reproduction buffer P
Waveform sample PB indicated by reproduction pointer PP on Br
r (PP) is transferred to the output FIFO of the sound I / O 112. The waveform samples stored in the output FIFO are
As described with reference to FIG. 1, after the D / A conversion, the data is transmitted to the sound system 114 and is emitted. Next, step 1
In step 602, the reproduction pointer PP is incremented, and in step 1603, it is determined whether or not reproduction to the end of the reproduction sample in the reproduction buffer PBr has been completed.

When all waveform samples in the reproduction buffer PBr have been reproduced in step 1603, r is inverted in step 1604 (1 if 0, 1 if 0),
The other reproduction buffer is set as a reproduction buffer PBr to be read next. Then, in step 1605, the CPU
An interrupt is generated to request the 101 to prepare a waveform sample, and the process ends. Step 16
If there is a waveform sample which has not been reproduced yet in the reproduction buffer PBr in 03, the processing is terminated as it is.

Next, the timing at which the processing of the above-described flowcharts is performed for each mode will be described.

First, the operation in the normal mode (m = 0) will be described. When the normal mode is designated by the user with the mode switch, 0 is set in the register m in the mode SW event routine of FIG. Since the normal mode start process MS (0) does not perform a process to be particularly described, the flowchart is omitted. However, if the operation of executing the DP routine is stopped for each sampling clock Fs due to the EX scratch mode or the like, the reproduction operation is restarted at MS (0).

In the initial setting of step 301 in FIG. 3 or in the process of restarting the reproduction operation by the MS (0), the CPU 101 sets the tone generator registers of all the channels in FIG. FIG.
(C) After clearing all sample areas of the reproduction buffers PB0 and PB1 to 0 and designating the sound I / O 112 and the DMA controller 113 to perform the reproduction operation, the sampling clock Fs by the Fs generator 110
To start generating. Thereby, the DMA controller 1
13 interrupts the CPU 101 for each sampling clock Fs from the Fs generator 110, and starts the operation of reproducing the waveform data in the reproduction buffer by executing the DP routine of FIG. 16 each time.

Here, the processing timing at the time of reproduction will be described. FIG. 17A shows a timing chart at the time of reproduction. Each section of S1 to S5 indicates a frame for reproducing 128 samples. "Waveform generation by CPU"
Executes the waveform generation routine HS (0) shown in FIG.
B1 indicates a section in which processing for generating 128 samples to be reproduced next is performed. Also, "DP routine of DMAC"
Indicates a section in which the DP routine is executed to perform processing for reproducing the waveform data in the reproduction buffer. The execution of the DP routine is performed for each interrupt corresponding to the sampling clock Fs, and the interrupt occurs 128 times at equal intervals in one frame. The numbers 0 to 4 assigned to the sections of “waveform generation by CPU” and “DP routine of DMAC” are numbers added for convenience to indicate the order of waveform generation and reproduction.

In FIG. 17A, first, in the section S1, the CP
U101 executes HS (0) to generate waveform data (128 waveform samples) in the reproduction buffer PB0. In the next section S2, the DMA controller 113 executes the DP routine by an interrupt for each sampling clock Fs. Thereby, the 128 waveform samples of the reproduction buffer PB0 generated in the section S1 are sequentially transferred to the output FIFO of the sound I / O 112 and reproduced in the section S2. An interrupt occurs when all 128 waveform samples of the reproduction buffer PB0 have been transferred to the output FIFO of the sound I / O 112 (at the end of the section S2) (step 1).
605) occurs. This interrupt triggers the CP
U101 executes the waveform generation routine HS (0) in the section S3, and stores new waveform data (128) in the reproduction buffer PB0.
Waveform samples).

Although the above description has been made with a focus on the reproduction buffer PB0, PB1 is similarly used alternately with PB0. In short, the DP routine is executed by interruption every sampling clock Fs, and P
The waveform sample of B1 is reproduced, the waveform sample of PB0 is reproduced in section S2, the waveform sample of PB1 is reproduced in section S3, the waveform sample of PB0 is reproduced in section S4,.
Thus, the waveform samples of PB0 and PB1 are alternately reproduced according to the sampling clock Fs.
Then, HS (0) is executed by an interrupt generated when 128 samples are reproduced in each section, and the next 12
Eight samples are generated in PB0 or PB1 (the one in which reproduction is not performed). Due to the hierarchical structure of the software, the DP routine is level 1 and HS
(0) is level 2. Therefore, if there is an interrupt according to the sampling clock Fs while HS (0) is being executed, the DP routine is executed with priority. Thus, the reproduction by the DP routine and the waveform generation by the waveform generation routine HS (0) can be executed in parallel.

In the normal mode (m = 0), when the pad is not turned on, all 0 samples in the reproduction buffers PB0 and PB1 are repeatedly reproduced at the timing described with reference to FIG. Since all 0 samples are reproduced, it is the same as the fact that no musical tone is actually emitted. The process when the pad is turned on in this state will be described. It is assumed that the pad is turned on in the section S1, as indicated by the arrow of “pad” in FIG. When pad on is detected in the routine,
The note-on of the waveform data corresponding to the pad turned on by the on-event routine of FIG. 7 is written to the tone generator register of FIG. The steady routine and the on-event routine are level 3 processes, and the waveform generation routine H
It can operate in parallel with S (0) and the DP routine. Note-on written to the tone generator register is the next HS
This is reflected in the reproduction buffer in the execution of (0).

Next, the operation in the sampling mode (m = 1) will be described. When the user designates the sampling mode with the mode switch, the above-described FIG.
Is set to 1 in the register m. Further, the sampling mode start process MS (1) is executed as shown in FIG. The MS (1) stops the DP routine and instructs the sound I / O 112 and the DMA controller 113 to perform a recording operation. Thereby, the DMA controller 113
Is the sampling clock Fs from the Fs generator 110
Interrupts the CPU 101 every time,
, The operation of recording a waveform sample from the outside in the recording buffer is started.

Here, the timing of the processing at the time of recording will be described. FIG. 17B shows a timing chart at the time of recording. Each section of S1 to S5 indicates a frame in which recording of 128 samples is performed. "DRC routine of DMAC"
Executes the DR (1) routine to execute the sound I / O 11
2 input FIFO (A / D conversion of external input 111 and AD
This shows a section in which processing (recording) of writing a waveform sample of PCM-compressed waveform sample) to a recording buffer is performed. The execution of the DR (1) routine is performed for each interruption corresponding to the sampling clock Fs, and the interruption occurs 128 times at equal intervals in one frame. “Writing to the flash memory by the CPU” indicates a section in which the CPU 101 writes the waveform sample of the recording buffer RB0 or RB1 to the flash memory 103 in step 509 of FIG. The numbers 0 to 4 assigned to each section are numbers added for convenience to indicate the order of recording and writing to the flash memory.

In FIG. 17B, first, an interrupt occurs for each sampling clock Fs in the section S1, and the DMA controller 113 executes the DR (1) routine each time. Thereby, the input FI of the sound I / O 112 is
The waveform samples of the FO are sequentially written to the recording buffer RB0. An interrupt (step 1505) occurs when 128 waveform samples have been written to the recording buffer RB0 (at the end of the section S1). With this interrupt, the CPU 101 sets the recording buffer RB in the section S2.
The waveform sample of 0 is written in the flash memory 103 (step 509), and the recording buffer RB0 is made empty.

Although the above description has been made with a focus on the recording buffer RB0, RB1 is similarly used alternately with RB0. In short, the DR (1) routine is executed by interruption every sampling clock Fs,
1 records a waveform sample on RB0, and RB1 on section S2.
, A waveform sample is recorded in RB0 in the section S3, and so on. The waveform sample is alternately recorded (written) in RB0 and RB1 according to the sampling clock Fs. And 128 in each section
An interrupt that occurs when a sample is recorded
The waveform sample of the recording buffer (the one to which writing has not been performed) is written to the flash memory 103. Due to the hierarchical structure of the software, the DR (1) routine is at level 1 and the MS (1) is at level 3.
Therefore, if there is an interrupt according to the sampling clock Fs while MS (1) is being executed, DR
(1) The routine is executed with priority. This gives D
Recording by the R (1) routine and writing to the flash memory 103 by the MS (1) can be executed in parallel.

Next, the operation in the filter regeneration mode (m = 2) will be described. When the user selects the filter regeneration mode with the mode switch, the above-described FIG.
In the mode SW event routine of 2, the register m is set to 2. Filter regeneration mode start processing MS
The flowchart (2) is omitted because it does not perform the processing to be particularly described. However, DP is set for each sampling clock Fs by the EX scratch mode or the like.
If the operation for executing the routine has been stopped, the reproduction operation is restarted in MS (2) as in the normal mode start process MS (0).

In the filter reproduction mode, reproduction is performed in substantially the same procedure as in the normal mode. The DP routine is executed for each sampling clock Fs, and all 0 samples in the reproduction buffers PB0 and PB1 are repeatedly reproduced when the pad is not turned on, and the processing procedure when the pad is turned on is the same. The timing at the time of reproduction is the same as that in FIG. However, in the filter regeneration mode, the RC capture routine RC (2) of FIG. 9 is executed at predetermined time intervals by a timer interrupt to capture the detection value of the ribbon controller 106, and the waveform generation process of the CPU 101 in FIG. Is replaced by HS (2) in FIG. 11B instead of HS (0). In the waveform generation routine HS (2), waveform samples for two tones due to pad-on are accumulated in the reproduction buffer, and the waveform samples in the reproduction buffer are filtered with a filter coefficient corresponding to the detection value RD of the ribbon controller 106. (Steps 1112 and 1113).
As described above, the filter control of the reproduced sound by the ribbon controller 106 is performed.

In the filter reproduction mode, the reproduction of four sounds in the normal mode is reduced to two sounds, and instead of reducing the number of generated musical sounds, filter processing is performed on the reproduced waveform. Since a predetermined number of samples must be generated within one frame time, four sounds can be reproduced in the normal mode. However, when filtering the reproduced sound, the processing time becomes insufficient. Therefore, the number of generated musical sounds is reduced to two, the processing time of waveform generation is reduced, and the filter processing is performed in extra time.

Next, the operation in the playback mode with pitch (m = 3) will be described. When the filter regeneration mode is designated by the user with the mode switch, the register m is set in the mode SW event routine of FIG.
Is set to 3. Filter regeneration mode start processing MS
Since (3) does not perform processing that should be particularly described, the flowchart is omitted. However, DP is set for each sampling clock Fs by the EX scratch mode or the like.
If the operation for executing the routine has been stopped, the reproduction operation is resumed at MS (3), similarly to the normal mode start process MS (0).

In the reproduction mode with pitch, reproduction is performed in substantially the same procedure as in the normal mode. The DP routine is executed for each sampling clock Fs, and all 0 samples in the reproduction buffers PB0 and PB1 are repeatedly reproduced when the pad is not turned on, and the processing procedure when the pad is turned on is the same. The timing at the time of reproduction is the same as that in FIG. However, in the playback mode with pitch, the pad-on event routine is changed to FIG. 8 instead of FIG.
11 (c) instead of HS (0) in FIG.
(3). In the pad-on event routine of FIG. 8, an F number FNi corresponding to the pad number PN is generated, and FIG.
In the waveform generation routine HS (3) of 1 (c), a waveform sample is read out and reproduced at an address obtained by accumulating the F number FNi at the address ADi. Thereby, reproduction can be performed with a pitch.

In the reproduction mode with pitch, the reproduction of four sounds in the normal mode is reduced to two sounds, and instead of reducing the number of generated musical tones, pitch is applied to the reproduced waveform. Since a predetermined number of samples must be generated within one frame time, four sounds can be reproduced in the normal mode. However, when pitch is applied to the reproduced sound, the processing time becomes insufficient. Therefore, the number of generated musical tones is reduced to two, the processing time of the waveform generation is reduced, and the pitch provision processing is performed in extra time.

Next, the operation in the scratch reproduction mode (m = 4) will be described. When the scratch reproduction mode is designated by the user with the mode switch, 4 is set in the register m in the mode SW event routine of FIG. In the scratch reproduction mode start process MS (4) (FIG. 6), the waveform data to be subjected to the scratch reproduction is developed in a predetermined area, and the scratch area SR and the scratch pointer SP are set to prepare in advance. In addition,
Although not shown in FIG. 6, when the operation of executing the DP routine is stopped for each sampling clock Fs due to the EX scratch mode or the like, MS (4) is executed similarly to the normal mode start process MS (0). Restarts the playback operation.

In the scratch reproduction mode, reproduction of two tones by pad on is performed in substantially the same procedure as in the normal mode. The DP routine is executed for each sampling clock Fs, and all 0 samples in the reproduction buffers PB0 and PB1 are repeatedly reproduced when the pad is not turned on, and the processing procedure when the pad is turned on is the same. The timing at the time of reproduction is the same as that in FIG. However, in the scratch reproduction mode, the RC acquisition routine RC (4) of FIG.
At the start of the operation, note-on is written into the sound source register sch of the scratch channel, and the operation speed V of the ribbon controller 106 is read.
EL is detected and written to the tone generator register sch. Also,
The waveform generation process of the CPU 101 is set to HS (4) in FIG. 12A instead of HS (0). Waveform generation routine HS
In (4), a waveform sample for two tones by pad-on is generated by the subroutine Normal 2 in the same manner as in the normal mode, and F is generated according to the detected speed VEL by the subroutine scratch (FIG. 14).
The waveform sample in the scratch area SR is read out at the address SAD obtained by accumulating the number SFN in the address SAD, and the channel is accumulated in the reproduction buffer PBr bar. As a result, scratch reproduction using the designated waveform data is realized in addition to the two sounds caused by pad-on.

In the scratch reproduction mode, the reproduction of four sounds in the normal mode is reduced to two sounds. Instead of reducing the number of generated musical sounds, a scratch sound is generated. Since a predetermined number of samples must be generated within one frame time, four sounds can be reproduced in the normal mode. However, when a scratch sound is generated, the processing time becomes insufficient. Therefore, the number of generated musical sounds is reduced to two, the processing time of waveform generation is reduced, and a scratch sound is generated in an extra time.

Next, the operation in the EX filter mode (m = 5) will be described. When the EX filter mode is designated by the user with the mode switch, the above-described FIG.
In the mode SW event routine of 5, the register m is set to 5. EX filter mode start processing MS
Although the flowchart of (5) is omitted, the MS (5) performs the activation process of the DR (5) routine. That is, C
The PU 101 instructs the sound I / O 112 and the DMA controller 113 to interrupt the CPU 101 for each sampling clock Fs from the Fs generator 110, and executes the DR (5) routine of FIG. The operation of writing the waveform sample to the recording buffer RBk is started. At this time, the Fs generator 110
The CPU 101 interrupts the CPU 101 for each sampling clock Fs, and does not stop the operation of reproducing the waveform data in the reproduction buffer by executing the DP routine of FIG. If the operation of executing the DP routine has been stopped, the normal mode start processing M
As in S (0), the reproduction operation is resumed in MS (5)). That is, the sampling clock Fs
Each time, DP and DR (5) are executed. In this case, since the operation is performed according to the same sampling clock Fs, DP and DR (5) operate in synchronization, and DP
The interrupt in step 1605 of the routine and the interrupt in step 1505 of the DR (5) routine are issued at exactly the same timing. Triggered by the interrupt issued at the same timing, the waveform generation routine HS (5) of FIG. 12B is executed. In the EX filter mode, the external input is not substantially recorded.
The reason why the external input is fetched in the R (5) routine is to filter the fetched waveform data.) Writing to the flash memory 103 is not performed.

As described above, when an interrupt occurs at the same timing from DP and DR (5), the waveform data from the external input 111 is stored in the recording buffer RBk bar.
Eight samples (linear samples) have been written, and the reproduction buffer PBr bar is empty. The waveform generation routine HS (5) has a recording buffer RBk bar of 128.
The filtering process is performed on the number of waveform samples, and the 128 waveform samples resulting from the processing are set in the reproduction buffer PBr bar. The filter coefficient of the filtering is determined by a timer interrupt in the RC capture routine RC of FIG.
By executing (5), the detection value R of the ribbon controller 106 is obtained.
D is taken in and determined according to the detected value RD. As described above, the external input 111 can be output after being subjected to the filter control by the ribbon controller 106.

Next, the operation in the EX scratch mode (m = 6) will be described. EX with mode switch
When the scratch mode is designated by the user, 6 is set in the register m in the mode SW event routine of FIG. Although the flowchart of the start process MS (6) of the EX scratch mode is omitted, the MS (6)
Then, the following processing is performed. First, the CPU 101
To sound I / O 112 and DMA controller 1
13, the CPU 101 interrupts the CPU 101 for each sampling clock Fs from the Fs generator 110, and executes the DP routine of FIG.
The operation of reproducing and outputting the Br waveform sample is stopped.
Also, the CPU 101 instructs the sound I / O 112 to directly connect the A / D input and the D / A output,
A tone signal is directly transmitted from the audio signal 11 to the sound system 114 to emit sound. The CPU 101 instructs the sound I / O 112 and the DMA controller 113 to input a sampling clock F from the Fs generator 110.
The CPU 101 is interrupted every s.
A DR (6) routine of No. 5 is executed to start an operation of writing an external waveform sample to the recording buffer SRBk. In the EX scratch mode, the external input is not substantially recorded (the external input is captured in the DR (6) routine because the captured waveform data is used for scratch reproduction).
03 is not written. Step 30
Since the timer interrupt is enabled in the initial setting of 1,
In response to a timer interruption by the timer 105, the RC fetching routine RC (6) in FIG. 10 is executed at predetermined time intervals.

While the ribbon controller 106 is not operated, steps 1001 → 10 in RC (6) of FIG.
Since the processing ends at 02 → 1003 → end, the processing of directly emitting sound from the external input 111 to the sound system 114 is continued. In addition, since the DR (6) routine is executed by interruption every sampling clock Fs,
Linear waveform samples obtained by A / D conversion of the external input 111 are input to the recording buffers SRB0 and SRB via the input FIFO.
1 is written alternately.

When the operation of the ribbon controller 106 is started (a finger or the like is touched), the flow proceeds to steps 1001 → 1002 → 1004 → 1005 in RC (6), and in the next step 1006, the CPU 101 instructs the DMA controller 113. To stop the execution of the DR (6) routine by interrupting the CPU 101 for each sampling clock Fs, and to execute the recording buffer SRBk of the two recording buffers SRB0 and SRB1 which are not currently written. Figure 2 on the bar
The scratch area SR is set as described in (e). Next, in step 1007, the read address SAD
Is set as the value (predetermined value) of the scratch pointer SP. Further, in step 1008, the reproduction buffer PB
r to generate 128 samples to be reproduced first,
The CPU 101 issues an instruction to the DMA controller 113 to restart the execution of the DP routine by interrupting the CPU 101 for each sampling clock Fs. Further, an interrupt having the same meaning as the interrupt generated in step 1605 of the DP routine in FIG. 16 is generated. By this interrupt, HS (6) is executed, and 128 samples to be scratch-reproduced next are generated on the PBr bar.
Further, in step 1008, note-on is written to the sound source register sch of the scratch channel. Thereafter, in step 1009, the direct connection from the A / D input to the D / A output of the sound I / O 112 is disconnected according to an instruction from the CPU 101, and a tone signal is directly transmitted from the external input 111 to the sound system 114 to emit sound. Stop that thing.

Further, when the ribbon controller 106 is moved while touching a finger or the like, the flow advances from step 1004 to step 1011 to detect the speed VEL and set it in the tone generator register sch. On the other hand, the sampling clock F
In the DP routine executed by the interruption every s, the reproduction buffers PB0 and PB1 are continuously reproduced alternately. Therefore, the reproduction of the scratch sound is started based on the sound source register sch from the time when the operation of the ribbon controller 106 is started. In particular, FIG. 12 (c) activated by the interruption of step 1605 of the DP routine
In the waveform generation routine HS (6), since RS = 1 while the operation of the ribbon controller 106 is being performed, the process proceeds from step 1221 to step 1222, and the EX scratch processing of FIG. 14 is performed. EX in FIG.
In the scratch process, the waveform sample of the scratch area SR is read out at the address SAD obtained by accumulating the F number SFN corresponding to the detected speed VEL in the address SAD, and the reproduction buffer PBr bar is set (step 14).
At 06, it looks like channel accumulation, but PB
Since the r bar is set to all 0s, the waveform sample TMP to be scratch-reproduced is substantially set to the PBr bar). As described above, scratch reproduction using waveform data input from the outside is realized.

FIG. 18 is a diagram showing the F number SFN for scratching based on the speed VEL performed in step 1401 of FIG.
Here is an example of conversion to. This conversion may be performed by calculation or may be performed using a table. FIG. 18 (a)
Is an example in which the larger the absolute value of the value of the speed VEL is, the larger the change amount of the F number SFN is, so that even when the length of the ribbon controller 106 is short, a scratch effect in which the pitch change is large can be realized. .

Note that since accurate pitch is not required in terms of audibility in scratch reproduction, the number of bits in the decimal part of the scratch address SAD may be reduced as necessary. That is, the number of bits of the decimal part of the address SAD accumulated in step 1403 of FIG. 14 may be reduced. By doing so, the amount of calculation for the interpolation performed in step 1405 can be reduced. Further, when converting from the speed VEL to the F number SFN for scratch, a table as shown in FIG. 18B is used, thereby reducing the number of bits of the decimal part in the F number SFN, thereby similarly calculating the amount of interpolation. Can be obtained.

In the above example, in the EX scratch mode, the waveform data from the external input is alternately stored in the two recording buffers SRB0 and SRB1, and the writing is not performed at the start of the operation of the ribbon controller. Although the scratch area is set in the recording buffer, three or more recording buffers are provided to sequentially store (in a ring shape) the waveform data, and a plurality of writing buffers that are not written at the start of the operation of the ribbon controller. A scratch area may be set on the recording buffer. By doing so, a scratch area is set on a plurality of recording buffers, so that a scratch area having a capacity sufficient for scratching can be set. Also, 1
Since the capacity of one recording buffer can be reduced, the amount of data in the recording buffer in which writing is performed at the start of the operation of the ribbon controller is reduced, and the data that is not used for scratching (data to be discarded) can be reduced.

In FIG. 17 (a), the head-on time of each section of the pad-on detection section, the section for waveform generation by the CPU, and the section for executing the DP routine of the DMAC are completely coincident with each other. There is no need to make the intervals, and each section may be shifted. The same applies to the recording timing in FIG.

In FIG. 17A, when the reproduction of the sample of one reproduction buffer in the DP routine is completed, the CP
Although the waveform generation by U is performed, the number of unreproduced samples in the reproduction buffer is detected, and when the number becomes less than or equal to a predetermined number, a new sample may be generated in an empty portion. . Therefore, as long as the timing of reproduction and generation of the sample is adjusted, only one reproduction buffer or three or more reproduction buffers may be used.

[0137]

As described above, according to the present invention, a musical sound generator for reading out and reproducing waveform data, which is digital data, from a storage means is provided with a coordinate detection operator, and the coordinate detection operator detects the waveform data. The waveform data is sequentially read and output according to the read address determined based on the coordinate values thus obtained, so that the scratch effect which could only be performed by the conventional analog record can be performed with a natural operation feeling by the digital device. it can.

In particular, in the musical sound generating apparatus according to the first and third aspects,
At the time when the operation of the coordinate detection operator is started, the reading of the waveform data has been started from a specific address that is predetermined as a read start position. Reproduction of waveform data is always performed from a specific address. In a scratch using an analog record, an operation is performed so that a specific position on the record board is repeatedly reproduced according to the rhythm. According to the present invention, the same effect can be easily obtained.

Further, according to the musical tone generating device of the second, third and fifth aspects, the speed is obtained from the coordinates detected by the coordinate detecting operator.
A read address for waveform data is created by accumulating the F number determined according to the speed in the address. Therefore, the F number change area can be made wider by the finite length coordinate operator, and a wide range of scratch effect control becomes possible.

Further, in the tone generator according to the fourth and fifth aspects, a scratch effect can be applied to a tone waveform input in real time. The player can perform a scratch at a favorite position of the music being reproduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of a sampler which is a musical sound generator according to the present invention.

FIG. 2 is a view showing various work areas in the sampler of FIG. 1;

FIG. 3 is a flowchart of a normal routine.

FIG. 4 is a flowchart of a mode SW event routine.

FIG. 5 is a flowchart of a sampling mode start process MS (1).

FIG. 6 is a flowchart of a scratch reproduction mode start process MS (4).

FIG. 7 shows a pad-on event routine (mode m = 0,
Flowchart diagram of 2, 4)

FIG. 8 is a pad-on event routine (mode m = 3);
Flowchart diagram

FIG. 9 shows a ribbon controller detection value acquisition routine R.
Flow chart of C (m) (m = 2, 5)

FIG. 10 is a flowchart of a ribbon controller detection value acquisition routine RC (m) (m = 4, 6).

FIG. 11 is a waveform generation routine HS (m) (mode m =
Flow chart of (0, 2, 3)

FIG. 12 is a waveform generation routine HS (m) (mode m =
Flowchart diagram of 4, 5, 6)

FIG. 13 is a flowchart of a subroutine normal n and a pitch 2;

FIG. 14 is a flowchart of a scratch process and an EX scratch process.

FIG. 15 shows a DR (m) routine (mode m = 1, 5,
6) Flow chart

FIG. 16 is a flowchart of a DP routine.

FIG. 17 is a diagram showing timings during reproduction and recording.

FIG. 18 is a diagram illustrating an F number SFN for a scratch from a speed VEL.
Diagram showing example of conversion

[Explanation of symbols]

101: central processing unit (CPU), 102: read-only memory (ROM), 103: flash memory, 1
04: random access memory (RAM), 105: timer, 106: ribbon controller, 107: pad,
108: display, 109: panel switch, 11
0: sampling clock (Fs) generator, 111: external input, 112: sound I / O, 113: DMA (direct memory access) controller, 114: sound system, 115: bus line.

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G10H 7/02 G10H 1/053

Claims (7)

(57) [Claims] A storage means for storing waveform data representing a waveform amplitude value for each predetermined sampling period; a finite-length coordinate detection operator for outputting a coordinate value of a contact position touched by a finger, a stick, or another member; An operator output capturing means for sequentially capturing the coordinate values output from the coordinate detection operator at predetermined intervals, and a specific address which is predetermined as a read start position when the operation of the coordinate detection operator is started. Starting reading the waveform data from the storage means from
Processing means for sequentially reading the waveform data of the storage means and outputting the read waveform data by a read address determined based on the coordinate value taken in by the manipulator output taking means while the coordinate detection manipulator is being operated; And a tone generator. A storage means for storing waveform data representing a waveform amplitude value for each predetermined sampling period; a finite-length coordinate detection operator for outputting a coordinate value of a contact position touched by a finger, a stick, or another member; An operator output capturing unit that sequentially captures the coordinate values output from the coordinate detection operator at predetermined intervals, obtains and outputs the moving speed of the contact position from the captured coordinate values, and outputs the output from the operator output capturing unit. Processing means for accumulating the F number determined according to the moving speed to be calculated to the read address to calculate a new read address, and reading and outputting the waveform data from the storage means using the read address for each accumulation. A musical sound generator comprising: A storage means for storing waveform data representing a waveform amplitude value for each predetermined sampling period; a finite-length coordinate detection operator for outputting a coordinate value of a contact position touched by a finger, a stick, or another member; An operator output capturing unit that sequentially captures the coordinate values output from the coordinate detection operator at predetermined intervals, obtains and outputs the moving speed of the contact position from the captured coordinate values, and operates the coordinate detection operator. At the time of the start, the reading of the waveform data of the storage means is started from a specific read address that is predetermined as a read start position, and while the coordinate detection operation element is being operated,
A new read address is calculated by accumulating the F number determined according to the moving speed output from the manipulator output capture means to the read address, and the waveform data is read out from the storage means using the read address and output. A musical sound generator comprising a processing means. 4. A storage means for storing waveform data inputted from outside in real time, an output means for outputting waveform data inputted from outside in real time as it is, and a contact position of a finger or a stick or another member. A finite-length coordinate detection operator that outputs coordinate values, an operator output capturing unit that sequentially captures coordinate values output from the coordinate detection operator at predetermined intervals, and an operation of the coordinate detection operator is started. At this point, the output of the waveform data by the output unit and the storage of the waveform data in the storage unit are stopped, and the waveform data of the storage unit is determined by the read address determined based on the coordinate value fetched by the operator output fetching unit. And a processing means for sequentially reading the waveform data and outputting the read waveform data. 5. An input means for externally inputting waveform data representing a waveform amplitude value for each predetermined sampling period in real time, and a reproducing means for outputting and reproducing the waveform data input in real time by said input means in real time as it is. And storage means for always storing the latest waveform data of a predetermined capacity out of the waveform data input in real time by the input means, and outputting coordinate values of a contact position touched by a finger, a stick, or another member. A finite-length coordinate detection operator, an operator output capture unit that sequentially captures the coordinate values output from the coordinate detection operator at predetermined intervals, obtains and outputs the moving speed of the contact position from the captured coordinate values, and When the operation of the coordinate detection operator is started, the real-time reproduction of the waveform data by the reproduction means and the previous The storage of the new waveform data in the storage means is stopped, and the reading of the waveform data of the storage means is started from a specific read address which is predetermined as a read start position, and the coordinate detection operation element is operated. During this period, the F number determined according to the moving speed output from the operator output capturing means is added to the read address to calculate a new read address, and the read address is used to calculate waveform data from the storage means. And a processing means for reading and outputting. 6. The processing means comprises: only the coordinate detection operator.
The read address of the storage means is determined based on
A tone generator according to any one of claims 1 to 3,
Raw equipment. 7. The processing means according to claim 1, wherein
Requests that do not generate a musical tone if the operation position is not changed
Item 4. The tone generator according to any one of Items 1 to 3.