JP2765433B2 - Memory playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a storage and reproducing apparatus for storing a sampled tone signal in a memory, reading the tone signal stored in the memory, and reproducing the read tone signal.

[0002]

2. Description of the Related Art In recent years, a tone signal has been sampled into a PC.
M data, which is stored in a storage means such as a hard disk drive, while the P data read from this storage means is
Various storage / reproducing devices for converting CM data into musical sound signals and reproducing the same have been developed. In such a storage and playback device,
In order to reduce the memory consumption of the hard disk device, various data compression (encoding) techniques are often used.

[0003] For example, "Japanese Patent Publication No. 2-48919"
Alternatively, in the Japanese Patent Publication No. 2-48920,
An encoding technique for compressing audio data formed in a silent period (a period in which an audio signal level is extremely small) included in an audio signal quantized by the quasi-instantaneous companding method is disclosed.

[0004] The compression techniques disclosed in these publications will be described below. First, the quasi-instantaneous drawing method described above
The audio signal is divided at predetermined time intervals, and the audio signal is quantized with an independent quantization width for each of the divided sections (hereinafter, referred to as frames). For this reason, in a frame including a silent period, useless audio data representing an amplitude level “0” is formed at each sampling point. Therefore, “silence data” representing the case where the entire frame is included in the silent period or the case where the silent period exists in a part of the frame is provided in the frame, and thereby, the ineffectiveness formed in the silent period is provided. The simple voice data is omitted, and data representing a silent period is compressed.

[0005]

In a storage / reproducing apparatus using such a compression technique, silence data representing a silence period is provided for each frame. For example, the silence period extends over a plurality of frames. In the case of continuous data, silence data corresponding to the number of frames is formed. Therefore, when the silent period continues for a long time, it corresponds to forming a large amount of silent data. In addition, when the frame length is set short, the number of frames increases, so that more silence data is formed, and as a result, these silence data may become useless data. In other words, in other words, in the conventional storage / playback apparatus, when the silent period extends for a long time, silent data is sequentially written to the storage device, and the storage capacity of the storage device is unnecessarily consumed. There is. SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a storage and playback device in which storage capacity is not consumed for a long period of silence.

[0006]

SUMMARY OF THE INVENTION The present invention provides means for inputting waveform data, storage means for continuously storing sampled waveform data, buffer means for temporarily storing sampled waveform data, A first transfer means for sequentially transferring the converted waveform data to the buffer means, and each time the capacity of the waveform data transferred to the buffer means by the first transfer means reaches a predetermined amount, the data is stored in the buffer means. A second transfer unit for transferring the fixed amount of waveform data to the storage unit, a silent portion detecting unit for detecting a silent portion in which the input waveform data is equal to or lower than a predetermined level, and detecting that the silent portion has continued for a predetermined time or more. the silent state detecting means for detecting a silent state, according to a detection of the silent state, a stop instruction means for instructing a stop of the transfer operation of the first transfer means Replacement means for replacing a silence state included in the waveform data transferred to the buffer means by the first transfer means with a silence code; and when a silence state is detected, the stop instruction means from the start of the silence state. And invalidating means for invalidating the transfer performed by the second transfer means until a stop instruction is given.

[0007]

According to the above arrangement, when a silent state is detected, the transfer performed by the second transfer unit is invalidated during a period from the start of the silent state to the stop instruction unit instructing the stop. Therefore, even if the silence continues for a long time,
Only the silence code corresponding to this is stored in the storage means, so that the storage capacity is not consumed. During reproduction, the waveform reproduction is stopped during a period corresponding to the silent state.

[0008]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a storage / reproduction device according to an embodiment of the present invention. The storage / playback apparatus is roughly divided into a storage unit 1 for converting a tone signal into tone data and storing (recording) the tone signal, and a playback unit 2 for converting the tone data into a tone signal for playback. The configuration and operation of each unit will be described below.

A. Configuration of Storage Unit 1 FIG. 1 is a block diagram illustrating a schematic configuration of the storage unit 1. In this figure, reference numeral 3 denotes start / stop instructing means which is operated at the time of starting or stopping the storage (recording) of a musical tone signal.
Occurs. T1 is, for example, an input terminal to which a tone signal output from a microphone (not shown) is supplied. Reference numeral 4 denotes an AD converter whose operation is started / stopped in response to the start / stop instruction signal Ss.
Is converted into musical tone data MD having a predetermined number of bits at a predetermined sampling period and output.

Reference numeral 5 denotes a transfer control circuit whose operation is started / stopped in response to a start / stop instruction signal Ss. The transfer control circuit 5 generates a write address and various control signals such as a transfer / retransfer instruction signal S2 to be described later, and transfers the tone data MD supplied from the AD converter 4 to the double buffer 6. Further, the transfer control circuit 5 detects a silent part included in the musical sound data MD, and encodes the detected silent part. The "silent part" mentioned here
Means a region where the amplitude (quantized value) of the musical sound data MD is equal to or smaller than a predetermined value.

The double buffer 6 has two buffer areas 6a and 6b. While the tone data MD is written in one buffer area, the previously written tone data MD is read from the other buffer area. That is, the buffer 6 is configured so that while data is written to one buffer area, data is read from the other buffer area. 7 is a well-known direct memory access controller (hereinafter referred to as DM
AC). DMAC 7 is a double buffer 6
The tone data that is block-transferred from one of the buffer areas is directly transferred to the hard disk device 8 without passing through a CPU (not shown), and the tone data is sequentially written to a storage medium in the hard disk device 8. The operation of the DMAC 7 in response to the transfer / retransfer instruction signal S2 supplied from the transfer control circuit 5 will be described later.

B. Next, the configuration of the transfer control circuit 5 will be described with reference to FIG. In the figure, reference numeral 10 denotes a level determiner, AD
The amplitude level of the tone data MD supplied from the converter 4 is determined, and a signal S1 corresponding to the determination result is generated. For example, 16-bit length tone data MD represented by 2's complement
Is "& hFFFC (hexadecimal)"-"&h0003"
If the musical tone data MD falls within the range of “−3” to “+3” in decimal notation, the level determiner 10 generates the signal S1 of “1” assuming that the musical sound data MD corresponds to the “silence portion” described above. I do. On the other hand, if it is outside the above range, that is,
If it is not a "silence portion", a signal S2 of "0" is generated. Reference numeral 11 denotes a delay circuit including a shift register and the like, which delays the input musical sound data MD by at least three sampling periods and outputs the delayed data.

Reference numeral 12 denotes a control unit comprising a CPU, a ROM and a RAM, and generates various signals S2 to S6 necessary for controlling the transfer of the musical tone data MD in accordance with the signal S1. Reference numeral 13 denotes a silence code generation unit which generates a silence code SC corresponding to the code generation signal S2 supplied from the control unit 12.
Occurs. The chord generation signal S2 indicates the “silence portion” start time or the “silence portion” completion time of the tone data MD. The silence code SC is composed of three words of silence data SD indicating the beginning of a "silence part" and "silence part".
And a word count value WC representing the duration of the data. For example, the silence data SD is “& hFFFF”, “&
h8000 "and"& hFFFF ", which indicate the beginning of the" silence ".

A selector 14 selects and outputs a signal supplied to the input terminal 1 when the selection signal S3 is supplied from the control unit 12. The selector 14 is supplied with the selection signal S3 when the musical sound data MD escapes from the "silence portion", and thereby outputs the silence code SC input to the input terminal 1 side to the double buffer 6 as the write data WD. On the other hand, when the selection signal S3 is not supplied, the selector 14 outputs the tone data MD supplied to the input terminal 0 as the write data WD.

Reference numeral 15 denotes a register for generating a write pointer X to the buffer areas 6a and 6b.
"Increment", "count stop", and "acquisition of count value" in response to the count control signal S4 supplied from the CPU. The write pointer X generated by the register 15 is supplied to the gate 17 and the control unit 1
2 is taken. Thereby, the control unit 12 detects the overflow of the register 15 from the value of the write pointer X, generates the transfer control signal S6, and increments the auxiliary counter 18 described later.

A register 16 stores a search pointer Y. The search pointer Y in the register 16 usually has the same value as the pointer X in the register 15, and holds the value of the write pointer X when a "silence" occurs in the musical tone data MD. These registers 15 and 16 generate a write pointer X and a search pointer Y in accordance with the count control signal S4, and their operations will be described later.

The gate 17 is turned off by a write stop signal S5 output from the control unit 12. When the signal S5 is not supplied, the gate 17 outputs the write pointer X as the write address AD of the buffer area 6a or 6b. The write stop signal S5 is generated, for example, when a "silence portion" occurring in the musical sound data MD continues for 256 sampling periods or more, and such a case is hereinafter defined as a "silence state". The auxiliary counter 18 counts and outputs the number of overflows of the address counter 15 based on the overflow signal supplied from the control unit 12.

C. Operation of Storage Unit 1 Next, the operation of the storage unit 1 having the above configuration will be described. Here, the description will be given with particular emphasis on the transfer operation of the transfer control circuit 5. In the following, a case where a “silence portion” does not exist in the tone data MD, a case where a “silence portion” exists less than a predetermined sampling period in the tone data MD, a case where a “silence state” exists in the tone data MD, The operation in each case will be described.

Operation when "silence portion" does not exist in tone data MD First, when the start / stop instructing means 3 is operated by the operator, a start / stop instructing signal Ss indicating the start of storage is stored in each of the storage units 1. It is supplied to the components 4 to 7 and sampling of the tone signal starts. The tone data MD supplied from the AD converter 4 at each sampling cycle is written to the double buffer 6 via the transfer control circuit 5. That is, the transfer control circuit 5 writes the musical sound data MD into one of the buffer areas of the double buffer 6 according to the write pointer X generated by the address counter 15 under the control of the control unit 12.

FIG. 3 shows how the write pointer X stored in the register 15 advances. The tone data MD is sequentially written from the buffer area 6a side (hereinafter, referred to as area A) in accordance with the address indicated by the write pointer X, and when the area A becomes full, the control unit 12 generates a transfer control signal S6. Are supplied to the DMAC 7. As a result, the DMAC 7 transfers the tone data MD stored in the area A to the hard disk device 8 in a block manner. On the other hand, even during such transfer, the transfer control circuit 5 continuously writes the tone data MD to the buffer area 6b side (hereinafter, referred to as area B). When the writing to the area B is completed, the tone data MD stored in the area B is transferred in block form to the hard disk device 8 via the DMAC 7 in accordance with the transfer control signal S6. The register 15 generates an overflow signal when the write pointer X is incremented to the last address of the area B, and changes the stored value of the write pointer X to the start address of the area A. Thus, writing to the area A is continuously performed.

Thereafter, the areas A and B are alternately block-transferred to the hard disk device 8 until a start / stop instruction signal Ss indicating storage stop is supplied. As described above, when there is no “silence portion” in the musical sound data MD, the transfer control circuit 5 generates the write pointer X to each of the areas A and B, and supplies the musical sound supplied to the input terminal 0 of the selector 14. The data MD is written to the double buffer 6. When one of the areas A and B becomes full, the DMAC 7 issues a transfer instruction to the DMAC 7 to block-transmit the tone data MD written in the area to the hard disk device 8 side.

Case where "silence portion" exists in musical tone data MD for less than a predetermined sampling period Here, a case where "silence portion" exists for musical tone data MD for less than 256 sampling periods will be described as an example. Now, for example, as shown in FIG. 4, while the area A is block-transferred to the hard disk drive 8 and the writing to the area B is being performed, the 16-bit musical data represented by two's complement is converted to "& HFFFC "~
"&H0003"("-3" to "+3" in decimal notation)
Is within the range, the level determiner 10 determines that the musical sound data MD is a "silence portion", and the signal S1 of "1" is determined.
Occurs.

[0023] In time t ₁₁ the signal S1 has changed to "1",
The value of the pointer Y register 16 is stopped, and thereafter, holds the value of the pointer X register 15 at said time point (see t ₁₁ in FIG. 4). On the other hand, the register 15 continues the increment operation of the pointer X, and the operation of writing the tone data MD to the buffer area (in FIG. 4, the operation of writing to the area B) is continuously performed according to the address indicated by the pointer X. Will be During this time, the signal S3 to the selector 14
Does not change, and the tone data MD that has passed through the delay 11 is continuously selected.

[0024] In 256 the time t ₁₂ to "silence" is completed in less than a sampling period, the signal S1 is changed to "0". Since the difference between the value of the pointer X of the register 15 and the value of the pointer Y of the register 16 has not reached 256, the control unit 12
Does not instruct the silence code generation unit 13 to generate a silence code, and generates a load signal so that the value of the register 15 is loaded into the register 16 and the pointer Y of the register 16 becomes the same value as the pointer X. .

As described above, when the "silence part" is less than 256 samples, the register 16 temporarily stops incrementing when the "silence part" is detected, and the pointer Y
Takes a value delayed with respect to the pointer X of the register 15, but when the "silence portion" ends, the pointer X
Is loaded into the register 16, the pointers X and Y again show the same value.

The writing of the musical tone data MD into the buffer area is performed continuously by using the pointer X incremented at a constant speed as an address during that time, and is completely different from the case where there is no "silence portion". Will be the same.

When the "silence state" exists in the musical sound data MD The case where the "silence state" exists in the musical sound data MD refers to a state in which the "silence portion" continues for 256 sampling periods or more as defined above. . Hereinafter, the transfer operation in such a case will be described with reference to FIG.

Now, for example, as shown in FIG. 5, in the process of writing to the area B, the tone data M
When a "silence portion" is detected in D and the signal S1 changes to "1", the pointer Y of the register 16 stops incrementing, and the state of holding the value of the pointer X at that time is performed, as in the case of the above-described item. to go into. On the other hand, writing to the area B of the buffer area using the pointer X of the register 15 which continues incrementing as an address is also continuously performed in the same manner as in the above-mentioned item.

The value of the pointer X which continues to increase is 256 times larger than the value of the pointer Y of the register 16 which holds a constant value.
When the value becomes larger (time t ₂₂ ), the control unit 12 determines that the “silence portion” is 256 based on the values of the registers 15 and 16.
Detecting a “silence state” that lasts for a sampling period or more, it generates a write stop signal S5. The gate 17 is closed in response to the signal S5 changing to "1", and the writing of the musical tone data MD to the buffer area is stopped. The increment of the value of the pointer X in the register 15 is continuously performed regardless of the change of the signal S5.

[0030] Thereafter, when the signal S1 "silence" is detected by the level decision unit 10 the end is changed to "0" (time t _23), the pointer Y pointer X and register 16 of the control unit 12 registers 15 Is calculated from the value of. The value of the pointer Y is the value of the pointer X time t ₂₂ to "silence", started, while the current value of the pointer X, "silence" is the end of the current time point t
_Since the value of the pointer X is ₂₃ , by subtracting the value of the pointer Y from the value of the pointer X, the duration WC of the “silence state” is obtained. The obtained duration WC is transmitted to the silence code generation unit 13 by an instruction signal S for generating a silence code.
2 and the silence code generator 13 generates a silence code SC based on the duration WC.

[0031] At time t _23, at the same time, the control unit 12 instructs to load the value of the pointer Y register 16 to register 15, and, by the selection signal S3 to "1" the selector 14 is silence code generator The output of the section 13 is set to be selected, and the write stop signal S5 is returned to “0”. The write address (pointer X) to the buffer area is returned to the value of the pointer X at the start of the "silence state" indicated by the pointer Y, and is set so that writing to the buffer area is performed from that position.

In the selector 14, the silent code generator 13
Is selected, as shown in FIG. 7, following the tone data MD immediately before the "silence state" starts, first, the silence code SC for four addresses supplied from the silence code generation unit 13
Is stored. Here, the silence code SC is the silence data SD (& hFFFF, & h8000, &&) for three addresses.
hFFFF) followed by one address duration WC
The data consists of

The pointer X of the register 15 is incremented in accordance with the supply of the silence code SC, and writing is performed at successive addresses. When the writing is completed, the control unit 12 returns the signal S3 to “0”,
4 is set so as to select the delay 11, and following the silent code SC described above, writing of the tone data MD passing through the delay 11 to the buffer area (normal tone data MD writing operation) starts. In order to match the timing of the operation of writing the silence code SC to the writing of the musical tone data MD, the delay time of the delay 11 corresponds to the end of the “silence portion” of the level determination unit 10 (corresponding to the end of the “silence state”). This is designed to coincide with the time from the detection of “YES” to the end of the writing of the silence code SC (corresponding to the start of the normal writing operation).

One example described above is a "silence state" within one transfer cycle. So, below
The transfer operation when the “silence state” continues over a plurality of transfer cycles will be described with reference to FIG. First, "silence" starts at drawing time t _31, and 256 have passed the sampling period at time t _33. in this case,
As described above, between times t ₃₁ ~ time t _32, the area A (buffer area 6a) and silent data SD "silence"
Is written.

At time t ₃₁ , the register 16 takes in the count value (write pointer X) of the register 15 and holds this as the search pointer Y. And
At time t3 _2, data written in the area A DM
The block is transferred to the hard disk device 8 by the AC 7. When reaching the time t _33, the writing of the double buffer 6 is stopped by a write abort signal S5 controller 12 is generated. At this time, the address counter 15
Is then incremented write pointer X, it overflows in a region B when obtaining the final write pointer X of (buffer area 6b) (time t _34).

When the value of the pointer X of the register 15 overflows, the control unit 12 increments the auxiliary counter 18 by one count. The count value of the counter 18 when the first overflow occurs in each “silence portion” is “1”. This count value indicates the number of overflows of the address counter 15. The control unit 1
2, after the “silence” starts (time t ₃₁ )
During the writing of the tone data MD for 256 sampling periods until the “silence state” is determined (time t ₃₃ ), the area A
Or, after writing in any of the areas B is completed, the DMAC
If the transfer to the hard disk apparatus 8 data of the area (transfer A time t ₃₂₎ is performed by 7, in the same position as the storage location that are made hard device 8 of the writing, "silence" End At the time of the first transfer of the DMAC 7 later, an instruction is made to write again.

The case where the “silence state” is completed (time t ₃₅ ) after a plurality of transfer periods has passed in this way will be described. As in the case of the above-described section, the control unit 12
Has detects that already at the stage of time t ₃₃ "silence" is satisfied, in response to the end of the time t ₃₅ "silence", first, the duration calculation of WC of "silence" .
In this case, a value obtained by adding a value corresponding to the count value of the auxiliary counter 18 to the value of the pointer X of the register 15 is used as the value at the end of the “silence state”, and the value of the pointer Y in the register 16 is calculated from the value. To obtain the duration WC.

The control unit 12 stores the register 1 in the register 15.
After loading the value of the pointer Y of No. 6 and returning the write pointer X to the position at the start of the "silent state", the selector 14
Select signal S3 is "1" and write stop signal S5 is "0".
First, a silent code SC including the calculated duration WC is written. Subsequently, the selection signal S3 is set to “0”.
Then, the processing shifts to a normal writing operation of the musical sound data MD that has passed through the delay 11.

Next, when the writing of the area A is completed at the time t ₃₆ , the control unit 12 instructs the DMAC 7 to re-transfer the data of the area A to the area A transferred at the time t ₃₂ . . That is, at time t ₃₂
In of the data in the area A, which is transferred to the hard disk device 8 side, and the data corresponding to the time t ₃₁ ~ time t _32, it is written and silent data SD and tone data MD of the "silence" is its tone Silent data SD instead of data MD
Data corresponding to the silence code SC and the time t ₃₅ ~ time t ₃₆ is formed by connecting the duration WC in which the translation to be transferred to the hard disk device 8 side (rewritten). Then, the time t ₃₆ after, in the region B ordinary tone data MD is written continuously, the control unit 12 at the time when the region B becomes full forwards instructions to DMAC7, thereby the region B
Is transferred to the hard disk drive 8.

A description will now be given, with reference to FIG. 7, of a storage mode of the hard disk drive 8 on which the musical tone data MD is written based on the above-described operation. First, FIG.
Is a diagram showing a series of stored data of the hard disk device 8 as continuous data, and shows a storage form of the musical tone data MD transferred by the transfer control circuit 5. Note that the data arrangement in the hard disk drive 8 is not aligned as shown in the figure because it is actually controlled by the FAT. As shown in the figure, in the storage area of the hard disk device 8, a time code TC at the start of storage (recording) is written at the beginning, and thereafter, the tone data MD is sequentially written according to the above-described transfer operation.

Then, for example, the "silence state" continues from the time when the value of the pointer X of the register 15 becomes "0101" to the time when it becomes "7005". Then, as shown in FIG. 2B, the silence formed from the silence data SD for three words and the duration WC of the "silence state" following the tone data MD immediately before the start of the "silence state". After the code SC is written, the tone data MD after the "silence state" is completed is written. In this case, the value “6F” corresponding to the difference between “7006” and “0101” in hexadecimal notation is displayed as the duration WC.
051 "is written.

As described above, the storage unit 1 determines that the tone data MD whose amplitude is equal to or less than the predetermined level is a "silence portion", and when the "silence portion" lasts for, for example, 256 sampling periods or more, the "silence state" Is stored in the hard disk drive 8, so that a large amount of silence data is formed when the "silence state" continues for a long time as in the related art. Moreover, according to this embodiment, since the concept of “frame” does not exist, one “silence state” corresponds to one.
May be added. Thereby, even when the silent period is long, the hard disk drive 8
Is not consumed.

D. Next, the configuration of the reproducing unit 2 that reproduces the tone data MD stored (recorded) in the hard disk device 8 by the above-described operation will be described with reference to FIG. In this figure, the same parts as those shown in FIG. 1 are denoted by the same reference numerals, and the description thereof will be omitted. In the figure, reference numeral 20 denotes a reproduction DMAC. When the silent period instruction data described later is not supplied, the reproduction DMAC 20 converts the tone data MD read from the double buffer 6 by at least three.
After being delayed by the sampling period, the data is transferred to the D / A converter 21 at the subsequent stage.

Further, when the silent period instruction data is supplied, the transfer of the musical sound data MD is interrupted during the silent period indicated by the instruction data. The D / A converter 21 converts the musical sound data MD transferred from the DMAC 7 into an analog reproduced musical sound signal W1 and outputs it. 22
Is a silence code detector. The detector 22 generates a detection signal when the above-described silent code SC is detected in the musical sound data MD read from the double buffer 6.

Reference numeral 23 denotes a time code counter. The time code counter 23 detects the time code at the start of storage (recording) added to the beginning of the musical tone data MD sequence, counts the musical tone data MD at each sampling point, and detects the time code To generate a time code indicating the time elapsed from the start of storage (recording). 24 generates silence period instruction data according to the detection signal supplied from the silence code detector 23 and the time code supplied from the time code counter 23. The silence period instruction data is data for notifying the reproduction DMAC 20 of a silence period from a silence start time to a silence completion time.

A synchronizer 25 synchronizes the sequencer 26 with the tone data MD read from the double buffer 6. A performance start time is stored in the synchronizer 25 in advance, and when the performance start time matches the time code output from the time code counter 23, the MIDI data of the tempo pulse corresponding to the progress of the time code is obtained. Start output of Sequencer 2
No. 6 generates MIDI performance data in synchronization with the tempo pulse.

Reference numeral 27 denotes a sound source constituted by a well-known waveform memory reading method or the like, which synthesizes a tone according to MIDI performance data and outputs the result as a tone signal W2. A mixer 28 mixes and outputs the reproduced tone signal W1 output from the D / A converter 21 and the tone signal W2 output from the sound source 27. Reference numeral 29 denotes a sound system which applies a sound effect to the output of the mixer 28 or performs filtering to remove noise, amplifies the output, and generates a tone. Thus, the components 25 to 2
Reference numeral 9 denotes an automatic performance device.

E. Operation of Playback Unit 2 Next, a read operation of the playback unit 2 having the above configuration will be described with reference to FIG. The upper part of FIG. 9 shows the transfer timing from the hard disk device 8 to the double buffer by the DMAC 7, and "A",
The character “B” indicates whether the transfer destination in the double buffer is the area A or the area B. The sawtooth-shaped graph in the lower part of FIG. 9 shows a change in the address for reading the double buffer of the DMAC 20 for reproduction.

Now, for example, it is assumed that reproduction start is instructed and the time is t ₁ . At this time t ₁ , the DMAC 7 reads out the tone data MD stored in the hard disk device 8 and transfers it to the area A (buffer area 6 a) of the double buffer 6. On the other hand, the reproduction DMAC 20 starts reading the tone data MD in the area B in which the transfer and writing have been completed at time t ₀ , and supplies the read tone data MD to the D / A converter 21. At the subsequent time t ₂ , the read address of the reproduction DMAC 20 moves to the area A where the transfer and writing has been completed at the time t ₁ , while the area B where the reading has been completed by the reproduction DMAC 20 is transferred to the hard disk drive 8 by the DMAC 7. Transfer writing of new data is started. Thus, at time t ₂ ~ time t _4, DMAC
7, the tone data MD is alternately written from the hard disk device 8 to the areas A and B, while the reproduction DMAC
The musical tone data MD is alternately read from the areas B and A by 20 and supplied to the D / A converter 21.

In such a reading operation, the time code counter 23 continues to generate a time code corresponding to the elapsed time from the storage (recording) start time. Here, when the performance start time set in the synchronizer 25 matches the time code generated by the counter 23, the synchronizer 25 starts generating a tempo pulse and gives it to the sequencer 26. As a result, the sequencer 26 generates performance information, and the sound source 27 generates a tone signal W corresponding to the performance information.
Form 2 On the other hand, the tone data MD supplied to the D / A converter 21 generates a reproduced tone signal W1. And
The reproduced tone signal W1 and the tone signal W2 are mixed by the mixer 28. This makes it possible to reproduce the previously stored musical sound data MD in synchronization with the output of the above-described automatic performance device.

[0051] Then, for example, at time t ₄ after the read process, silence code detector 22 silence code SC
Is detected. Then, the control unit 12 based on the detection signal supplied from the detector 22, providing data representing silence starts reproduction DMAC 20 (time t _5). As a result, the reproduction DMAC 20 stops transferring the tone data MD. DAC of data from DMAC 20 for reproduction
21 is delayed by three sampling periods from the data input, the output of the DMAC 20 is stopped immediately before the silence code Sc is output to the DAC 21.
The MAC 20 outputs “0” to the DAC 21.

The control unit 12 measures the duration of the “silence” represented by the word count value WC based on the time code supplied from the time code counter 23, and counts the three sampling periods at the time when the duration has elapsed. DMAC for reproducing data indicating completion of silence at the previous timing
20 (time t ₆ ). As a result, the reproduction DMA
C20 sequentially restart the reading of double buffer at time t _6, to transfer from time t ₆ 3 again tone data MD from the sampling cycle delayed by a time t ₇ to the D / A converter 21.

As described above, the reproducing section 2 can reproduce the "silence state" in accordance with the silence code SC stored in the storage section 1. Here, if the silence start time and the completion time included in the tone data MD, that is, the time at which the silence code SC is written, are stored in the synchronizer 25 in advance, it is synchronized with the tone data MD including the “silence state”. Automatic performance can be realized. The tone data MD including the "silence state" referred to here is "guitar solo" or "sax solo" that cannot be realized by the automatic performance device and that is played only during a part of the music such as intro and ending.

In the above-described embodiment, as the criterion for determining the "silence portion", the 16-bit long musical tone data MD represented by two's complement ranges from "& hFFFC (hexadecimal notation)" to "&h0003". However, the present invention is not limited to this, and may be any range. Further, this range is defined as "silence state" when it lasts for 256 sampling periods or more, but this period may be set to an arbitrary period. These conditions may be configured to be arbitrarily set by the user.

The transfer control circuit 5 of the storage unit 1 described above
In the above, the register 15 is used exclusively for writing the pointer X. Alternatively, the registers 15 and 16 may be used alternately for writing the pointer. Further, as described above, when the register 15 is used only for writing, the register 16 is preferably formed of a register having only a latch function. In the above-described embodiment, the duration of the "silence portion" is measured by using both the registers 15 and 16, but an independent counter for measuring the silence period may be provided instead. .

[0056]

As described above, according to the present invention,
When a silent state is detected , the waveform data transmitted from the buffer means to the storage means by the second transfer means during a period from the start of the silent state to the stop instruction means instructing the stop.
Since disabling the transfer of, you in the middle of storing the waveform
Even when the silent state is maintained for a long time, only the silent code corresponding to the silent state is stored in the storage means, so that the effect of not consuming the storage capacity can be obtained. During reproduction, the waveform reproduction is stopped during a period corresponding to the silent state.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a storage unit 1 according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a transfer control circuit 5 in the embodiment.

FIG. 3 is an exemplary view for explaining the operation of the storage unit 1 in the embodiment.

FIG. 4 is an exemplary view for explaining the operation of the storage unit 1 in the embodiment.

FIG. 5 is an exemplary view for explaining the operation of the storage unit 1 in the embodiment.

FIG. 6 is an exemplary view for explaining the operation of the storage unit 1 in the embodiment.

FIG. 7 is an exemplary view for explaining the operation of the storage unit 1 in the embodiment.

FIG. 8 is a block diagram showing a configuration of a reproducing unit 2 in the embodiment.

FIG. 9 is an exemplary view for explaining the operation of the reproduction unit 2 in the embodiment.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 storage unit 2 reproduction unit 4 A / D converter 5 transfer control circuit 6 double buffer 7 DMAC 8 hard disk device 10 level determination unit 12 control unit 13 ... silence code generator.

Claims (2)

(57) [Claims] 1. A means for inputting waveform data, a storage means for continuously storing sampled waveform data, a buffer means for temporarily storing sampled waveform data, and a means for inputting waveform data to the buffer means. First transfer means for sequentially transferring, and each time the capacity of the waveform data transferred to the buffer means by the first transfer means reaches a predetermined amount, a predetermined amount of waveform data in the buffer means is stored in the storage means. A second transfer means for transferring the data to the memory; a silent part detecting means for detecting a silent part in which the input waveform data is equal to or lower than a predetermined level; a silent state for detecting that the silent part has continued for a predetermined time or more and detecting it as a silent state a detection unit, according to the detection of the silent state, a stop instruction means for instructing a stop of the transfer operation of the first transfer means, the first transfer means Replacement means for replacing the silence state included in the waveform data transferred to the buffer means with a silence code; and, when a silence state is detected, from the start of the silence state until the stop instruction means instructs the halt. Invalidating means for invalidating the transfer performed by the second transfer means during the period. 2. The storage / reproducing apparatus according to claim 1, wherein said replacement means replaces the amount of waveform data corresponding to a plurality of transfers by said second transfer means with said silence code.