JP2924788B2 - Heat sink structure - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat sink structure, and more particularly to a cooling structure of a logic package suitable for use in a computer or the like.

[0002]

2. Description of the Related Art Conventionally, the structure of a heat sink for heat dissipation of an integrated circuit mounted on a logic package has been disclosed in Japanese Patent Application Laid-Open No.
Japanese Patent No. 11863 proposes a shape as shown in FIGS. 3 and 4 and is generally adopted. FIG. 3 is a perspective view of a conventional ceramic package with a heat sink proposed in the above publication, and FIG. 4 is a sectional view thereof. Referring to FIGS. 3 and 4, the conventional package with a heat sink includes a chip 12 bonded on a ceramic substrate 11, a cap 16 bonded on the ceramic substrate 11 so as to cover the chip 12, The heat sink 17 has a structure in which a plurality of columns 17a to which horizontal fins 17b are attached are provided in parallel on a heat radiating surface.

[0003] The reason for using such a heat sink structure for heat dissipation is that the mounting arrangement of integrated circuits in a logic package is becoming denser year by year for the purpose of ensuring performance and achieving low cost, and the heat dissipation surface area of the heat sink is secured. For this reason, as shown in FIG. 3, it is necessary to employ a method of securing the surface area of the fins 17b of the heat sink 17 as necessary as shown in FIG. 3 directly above, that is, in the space above the surface of each integrated circuit.

[0004]

However, the first problem in the above-mentioned conventional heat sink structure for heat dissipation is that the above-mentioned required heat dissipation surface area of the fins of the heat sink is secured in the space above the surface of the integrated circuit. Is becoming more difficult.

[0005] In recent years, with the recent downsizing and higher performance of computers, it has become necessary to reduce the mounting interval between a plurality of logical packages mounted in a housing as much as possible. This is because the range that can be used in a space above the surface of the integrated circuit (surface mounting height) has been reduced as in the above-described prior art.

A second problem with the conventional heat sink structure for heat dissipation is that the structure of the heat sink becomes complicated and low cost cannot be expected.

The reason is that, as described above, the conventional heat sink structure for heat radiation has to realize the shape of the heat radiation fin having good heat radiation efficiency in the space above the surface of the integrated circuit, and thus the fin shape is complicated. This is due to the need to increase the heat radiation surface area.

Accordingly, the present invention has been made in view of the above circumstances, and an object of the present invention is to realize a heat sink having a three-dimensional space in a space on an integrated circuit surface in a planar shape. Another object of the present invention is to provide a heat sink structure that can improve the mounting efficiency of the logic package, simplify the shape of the heat sink, and reduce the cost.

[0009]

In order to achieve the above object, a heat sink structure of the present invention joins a plurality of integrated circuits mounted on a logic package to a heat conductive block whose height is individually set. A flat heat sink is stacked corresponding to the height of the heat conduction block so as to face the logic package.

[0010] The heat sink structure of the present invention further includes a heat conduction block formed by joining one side end surface to a surface of a plurality of integrated circuits mounted on the logic package, and each of the plurality of integrated circuits has A heat sink member corresponding to the one or more heat conduction blocks is stacked, and a flat heat sink member provided individually in opposition to the logic package is stacked in accordance with a difference in height of the other side end surface of the provided heat conduction block. Means for fixing one or more heat conductive blocks corresponding to the own heat sink member, and when there is another heat conductive block higher than the heat conductive block corresponding to the own heat sink member, It is characterized by having a hole for inserting the conductive block into the upper layer.

In the present invention, the area of the heat sink is substantially equal to the area of the logic package.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. 1 and 2 are diagrams for explaining an embodiment of the present invention.

In the embodiment of the present invention, a heat conductor 3 such as solder is vertically bonded to the surface of an integrated circuit 2 mounted on the logic package 1 and a plurality of integrated circuits on the logic package 1. A heat conduction block 3 provided with a fixing means such as a female screw 5 is provided on the joint surface with the body and the other end surface. The heat conduction block 3 has an integrated circuit whose height in the vertical direction with respect to the integrated circuit surface is individually set. It is prepared individually for each. One or a plurality of layers of flat heat sinks 6 each having an area substantially equal to that of the logic package 1 and individually prepared for each integrated circuit are provided, and each heat sink 6 is provided on an end face of an arbitrary heat conductor. A fixing hole 7 facing the female screw and an interference escape hole 8 for penetrating another heat conductor are provided.

In the embodiment of the present invention, by adopting the above-described structure, it is possible to secure a wide heat radiation surface area substantially equal to that of the logic package without being affected by the arrangement of other integrated circuits in the logic package. .

Further, in the embodiment of the present invention, since it is not necessary to occupy much space on the surface of the integrated circuit, the mounting intervals of the plurality of logic packages can be narrowed, and the performance of the device can be improved and the size can be reduced. Can contribute to

Further, according to the embodiment of the present invention, since the shape of the heat sink can be extremely simplified, low cost can be realized.

[0017]

Next, embodiments of the present invention will be described in detail with reference to the drawings.

Referring to FIGS. 1 and 2, it is assumed that four integrated circuits 2, 2 ', 2 ", 2"' are mounted on logic package 1. Although FIGS. 1 and 2 show a configuration in which four integrated circuits are mounted on the logic package 1, it goes without saying that the present invention is not limited to this configuration.

As shown in FIG. 1A as a plan view and an AA 'line view, a heat conduction block 3 preset to an integrated circuit 2 mounted on a logic package 1 is joined by soldering. ing. The heat conduction block 3 on the integrated circuit 2 has at least one female screw 5 on the end face opposite to the solder joint face.

Referring to FIG. 1A, heat sink 6
Has an area approximately equal to the surface of the logic package 1, is fixed on the heat conductive block 3 on the integrated circuit 2 so that the fixing hole faces the heat conductive block 3, and is fixed to the female screw 5 of the heat conductive block 3 with the male screw 7.

The heat sink 6 has, in addition to the fixing holes for the heat conduction block 3, other heat conduction blocks 3 ', 3 ",
Interference relief holes (openings) 8, 8 ′, 8 ″ having predetermined clearances for avoiding interference with 3 ″ ″ are provided. The conductive blocks 3 ', 3 ", 3"' pass through the interference relief holes 8, 8 ', 8 "of the heat sink 6.

In the embodiment of the present invention, the heat sinks 6, 6 ', 6 ", 6"' are respectively laminated corresponding to the heat conductive blocks 3, 3 ", 3"'3 having different heights. And constitute a cooling structure for the logic package.

That is, referring to FIG. 1B, the heat sink 6 'of the second layer has an area substantially equal to the surface of the logic package 1, and is fixed in the heat conduction block 3' of the integrated circuit 2 '. Are superposed so as to face each other, and are fixed to the female screw 5 ′ of the heat conduction block 3 ′ with the male screw 7 ′. The heat sink 6 'has an interference escape hole (opening) 8' having a predetermined clearance for avoiding interference with the other heat conductive blocks 3 "and 3"', in addition to the fixing hole with the heat conductive block 3'. , 8 ″, and an integrated circuit 2 ″,
The heat conducting blocks 3 "and 3""on the 2""pass through the interference escape holes 8 'and 8" of the heat sink 6'.

Similarly, referring to FIG. 2A, the heat sink 6 "of the third layer has substantially the same area as the surface of the logic package 1 and is fixed to the heat conducting block 3" on the integrated circuit 2 ". The holes are overlapped to face each other and the heat conducting block 3 ″
Is fixed to the female screw 5 ″ by a male screw 7 ″. The heat sink 6 "has an interference escape hole (opening) 8""having a predetermined clearance for avoiding interference with another heat conductive block 3"", in addition to the fixing hole for the heat conductive block 3".
The heat conduction and heat conduction block 3 "" on the integrated circuit 2 "" is inserted through the interference escape hole 8 "" of the heat sink 6 ", and as shown in FIG. The block 3 "" is overlapped by the heat sink 6 "" of the fourth layer so that its fixing holes face each other, and is fixed to the female screw 5 "" of the heat conduction block 3 "" by the male screw 7 "".

[0025]

As described above, according to the present invention,
It is possible to have a large area substantially equal to that of the logic package, and it is possible to efficiently radiate heat generated by the integrated circuit.

According to the present invention, a heat sink having an escape hole which does not interfere with the heat conduction block on another integrated circuit is mounted on the logic package so as to be stacked thereon, so that a sufficient heat radiation surface area is secured. It is possible to do.

Further, according to the present invention, since the shape of the heat sink can be greatly simplified, low cost can be realized.

This is because, in the present invention, a wide heat radiation area can be secured without being affected by the arrangement of the integrated circuits in the logic package.

[Brief description of the drawings]

FIG. 1 is a diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing an embodiment of the present invention.

FIG. 3 is a perspective view showing an example of a conventional technique.

FIG. 4 is a cross-sectional view showing an example of the related art.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Logic package 2 Integrated circuit 3 Heat conduction block 4 Solder 5 Female screw of heat conduction block 3 6 Heat sink

Claims (5)

(57) [Claims] 1. A plurality of integrated circuits mounted on a logic package, a plurality of heat conductive blocks having individually set heights are joined, and a flat heat sink corresponding to the height of the heat conductive blocks is provided. A heat sink structure, which is stacked so as to face the logic package. 2. A logic package on which a plurality of integrated circuits are mounted, and a fixing member which is vertically joined to a surface of each of the plurality of integrated circuits by a heat conductor, and which is fixed to the joint surface and the other end surface. A plurality of heat conduction blocks; a fixing hole having an area equivalent to the logic package and facing one or more heat conduction blocks of the plurality of heat conduction blocks; and a hole penetrating another heat conduction block. A heat sink structure comprising: one or more flat heat sinks provided. 3. The heat sink structure according to claim 2, wherein the heat conduction block has a screw member on the other end surface, and is screwed by overlapping with the corresponding heat sink at the fixing hole. 4. A plurality of integrated circuits mounted on a logic package, the plurality of integrated circuits each having a heat conduction block formed by joining one end surface thereof, and a heat conduction block provided for each of the plurality of integrated circuits. In accordance with the difference in the height of the side end surface, flat heat sink members provided individually facing the logic package are stacked, and the heat sink member corresponding to the one or a plurality of heat conduction blocks is the one corresponding to its own heat sink member. Or, if there is a means for fixing a plurality of heat conduction blocks and there is another heat conduction block that is higher than the heat conduction block corresponding to the heat sink member, the heat conduction block is inserted into the upper layer. Heat sink structure, characterized by having holes for the heat sink. 5. The heat sink structure according to claim 4, wherein an area of said heat sink is substantially equal to an area of said logic package.