JP2923990B2 - Method of manufacturing flat display panel - Google Patents
Method of manufacturing flat display panelInfo
- Publication number
- JP2923990B2 JP2923990B2 JP21397489A JP21397489A JP2923990B2 JP 2923990 B2 JP2923990 B2 JP 2923990B2 JP 21397489 A JP21397489 A JP 21397489A JP 21397489 A JP21397489 A JP 21397489A JP 2923990 B2 JP2923990 B2 JP 2923990B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- display
- electrode
- display panel
- panel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【発明の詳細な説明】 〔概 要〕 ガス放電パネルなどの平板型表示パネルの製造方法に
関し、 表示電極の断線、短絡などの検査作業を容易にするこ
とを目的とし、 表示電極の形成された絶縁基板を備えてなる表示パネ
ルの製造において、前記絶縁基板の表面に前記表示電極
を形成する際、表示領域外の基板周辺部に当該基板面の
X方向およびY方向の位置を検出する座標を当該表示電
極と共に厚膜または薄膜技法によって形成する工程を含
んだ構成とする。DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a method for manufacturing a flat display panel such as a gas discharge panel. In the manufacture of a display panel including an insulating substrate, when forming the display electrodes on the surface of the insulating substrate, the coordinates for detecting the positions of the substrate surface in the X direction and the Y direction on the periphery of the substrate outside the display area are displayed. A configuration including a step of forming the display electrode together with a thick film or thin film technique is adopted.
この発明は、平板型表示パネルの製造方法に係り、さ
らに詳細には絶縁基板上に形成した表示電極の断線、短
絡などの検査作業を容易にするパネル製造法に関する。The present invention relates to a method for manufacturing a flat panel display panel, and more particularly, to a method for manufacturing a panel for facilitating inspection work such as disconnection or short circuit of a display electrode formed on an insulating substrate.
平板型表示パネルとしては、ガス放電パネル、液晶パ
ネル、ELパネルなどが周知である。As a flat panel display panel, a gas discharge panel, a liquid crystal panel, an EL panel and the like are well known.
これらパネルの製作には表示電極を形成したガラス基
板が用いられるが、その電極形成基板の品質検査におい
て電極パターンの断線、短絡検査は不可欠であるため、
その検査作業を容易にする方法の開発が望まれている。A glass substrate on which display electrodes are formed is used for the production of these panels, but disconnection and short-circuit inspection of the electrode pattern are indispensable in quality inspection of the electrode formation substrate.
It is desired to develop a method for facilitating the inspection work.
第3図は、ガス放電パネルの一例構成を概念的に示す
図であり、1および2はガラス基板、3および4は表示
電極を示す。FIG. 3 is a view conceptually showing an example of the configuration of a gas discharge panel, wherein 1 and 2 are glass substrates, and 3 and 4 are display electrodes.
一対のガラス基板1、2は、所定の間隔(ガス放電空
間)を挟んで対向配置され、その対向する基板表面に一
対の表示電極3、4を形成し、さらにその電極上に図示
しない誘電体層、表面保護層を積層している。また基板
周辺はフリット材(図示せず)により封じされ、その密
閉されたガス放電空間には放電ガスが封入されている。The pair of glass substrates 1 and 2 are opposed to each other with a predetermined space (gas discharge space) therebetween, and a pair of display electrodes 3 and 4 are formed on the opposed substrate surfaces. Layer and a surface protective layer. The periphery of the substrate is sealed by a frit material (not shown), and a discharge gas is sealed in the sealed gas discharge space.
このように構成されたガス放電パネルの製造には、ま
ず各ガラス基板の表面に厚膜または薄膜技法により電極
パターンを形成する。次いでこの形成電極パターンの断
線・短絡などを検査し、検査パスした電極形成基板に対
しては、誘電体層、表面保護層を厚膜または薄膜技法を
用いて順次形成する。なお、断線などが検出された電極
形成基板に対しては、その基板裏面に当該不良箇所を示
すマークをマジックペンなどにより記入してから、補修
作業をする。In manufacturing the gas discharge panel configured as described above, first, an electrode pattern is formed on the surface of each glass substrate by a thick film or thin film technique. Next, the formed electrode pattern is inspected for disconnection, short circuit, etc., and a dielectric layer and a surface protection layer are sequentially formed on the electrode-formed substrate that has passed the inspection by using a thick film or thin film technique. Note that, for the electrode-formed substrate on which a disconnection or the like is detected, a mark indicating the defective portion is written on the back surface of the substrate with a magic pen or the like, and then repaired.
しかる後、それら電極形成基板を表示電極が交差する
ように対向配置するとともに、その基板間に、表示領域
D部分にはスペーサ、表示領域外の基板周辺部にはフリ
ット材をそれぞれ介在させてから、該フリット材を加熱
溶融して一体化する。Thereafter, the electrode forming substrates are arranged to face each other so that the display electrodes intersect, and a spacer is interposed between the substrates in a display region D portion, and a frit material is interposed in a peripheral portion of the substrate outside the display region. Then, the frit material is heated and melted to be integrated.
そしてこの基板間に形成されたガス放電空間に放電ガ
スを封入して、さらにエージング工程を経て、表示パネ
ルとして完成する。Then, a discharge gas is sealed in a gas discharge space formed between the substrates, and an aging process is further performed to complete a display panel.
上述のように従来の電極パターン検査では、断線など
の不良箇所はマーキングしなければ位置づけできない。
このマーキング作業は容易でないばかりか煩わしいもの
であった。また不良箇所が目視的でしか認識できないた
め、その部分の補修作業を機械化することが困難である
という問題があった。As described above, in the conventional electrode pattern inspection, a defective portion such as a disconnection cannot be positioned without marking.
This marking operation was not only easy but also troublesome. Further, there is a problem that it is difficult to mechanize the repair work of the defective portion because the defective portion can be recognized only visually.
この発明は、以上のような従来の状況から、電極パタ
ーン検査時の不良箇所の認識を容易にするとともに、補
修作業の機械化を容易にする平板型表示パネルの製造方
法の提供を目的とする。SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a flat panel display panel which facilitates recognition of a defective portion during inspection of an electrode pattern and facilitates mechanization of a repair operation from the above-described conventional situation.
上記目的を達成するため、この発明の表示パネル製造
方法では、前記絶縁基板の表面に表示電極を形成する際
に、表示領域外の基板周辺部に当該基板面のX方向およ
びY方向の位置を検出する座標を当該表示電極と共に厚
膜または薄膜技法によって形成することを特徴としてい
る。In order to achieve the above object, in the method of manufacturing a display panel according to the present invention, when forming a display electrode on the surface of the insulating substrate, the positions of the substrate surface in the X direction and the Y direction are located around the substrate outside the display area. It is characterized in that coordinates to be detected are formed together with the display electrodes by a thick film or thin film technique.
いま絶縁基板上に形成した電極パターンの一部に断線
が生じていると仮定すると、その断線箇所は基板周辺部
に形成したX方向およびY方向座標によって容易に位置
づけできる。またその座標情報に基づき機械化された補
修工具を該当不良箇所に自動的に位置決めすることも可
能である。Now, assuming that a part of the electrode pattern formed on the insulating substrate is broken, the broken part can be easily located based on the X-direction and Y-direction coordinates formed on the periphery of the substrate. It is also possible to automatically position the mechanized repair tool at the defective location based on the coordinate information.
第1図は、この発明の一実施例による一方側の電極形
成基板11の平面図を図示し、図中、12はガラス基板、13
は一方の表示電極(X電極)、14はX方向座標、15はY
方向座標である。なお、座標の目盛間隔は1cm程度で十
分である。FIG. 1 is a plan view of an electrode forming substrate 11 on one side according to an embodiment of the present invention.
Is one display electrode (X electrode), 14 is the X direction coordinate, 15 is Y
Directional coordinates. Note that a scale interval of about 1 cm is sufficient.
前記表示電極13と各座標14、15は、電極形成工程にお
いてガラス基板12の表面に同時に形成される。すなわ
ち、第2図はその形成方法を示す図である。この図にお
いて、21は電極および座標のパターニング用フォトマス
ク、P1は表示電極用パターン、P2はX方向座標用パター
ン、P3はY方向座標用パターンを示す。The display electrode 13 and the coordinates 14 and 15 are simultaneously formed on the surface of the glass substrate 12 in the electrode forming step. That is, FIG. 2 is a diagram showing a method of forming the same. In this figure, 21 is a photomask for patterning electrodes and coordinates, P1 is a pattern for display electrodes, P2 is a pattern for X-direction coordinates, and P3 is a pattern for Y-direction coordinates.
このフォトマスク21を全面にレジストを形成したガラ
ス基板12の上に重ねて露光した後、例えば蒸着法により
その基板表面に電極材料を被着し、各パターンP1,P2,P3
に従ったX電極13およびX方向座標14、Y方向座標15を
形成する。After exposing the photomask 21 on the glass substrate 12 having a resist formed on the entire surface, an electrode material is applied to the substrate surface by, for example, a vapor deposition method, and the respective patterns P1, P2, P3
The X electrode 13 and the X-direction coordinate 14 and the Y-direction coordinate 15 according to the above are formed.
このようにして形成された電極と座標は、位置関係に
ずれがないため、高精度の不良箇所位置決めが行える。Since there is no deviation in the positional relationship between the electrode and the coordinates formed in this way, highly accurate defective portion positioning can be performed.
なお、X方向座標14およびY方向座標15は、パネル組
立て後は通常の基板周辺部分の切除によって除去され
る。After the panel assembly, the X-direction coordinates 14 and the Y-direction coordinates 15 are usually removed by cutting off the peripheral portion of the substrate.
以上説明したように、この発明によれば、電極形成時
に同時に当該基板上の位置検出用座標を形成し、その座
標によって電極パターン検査時の不良箇所を容易に認識
することができる。また電極パターン補修作業の自動化
が容易に行えるなどの効果が期待できる。As described above, according to the present invention, the coordinates for position detection on the substrate are formed at the same time when the electrodes are formed, and the defective portions at the time of the electrode pattern inspection can be easily recognized based on the coordinates. Further, it is possible to expect an effect that the electrode pattern repair work can be easily automated.
第1図は、この発明の一実施例による一方側の電極形成
基板を示す平面図、 第2図は、第1図の電極形成基板を形成する説明図、 第3図は、ガス放電パネルの一例構成を概念的に示す図
である。 第1、第2図において 11は電極形成基板、 12はガラス基板、 13は表示電極、 14はX方向座標、 15はY方向座標、 Dは表示領域、 P1は表示電極用パターン、 P2はX方向座標用パターン、 P3はY方向座標用パターンをそれぞれ示す。FIG. 1 is a plan view showing an electrode forming substrate on one side according to an embodiment of the present invention, FIG. 2 is an explanatory diagram showing the formation of the electrode forming substrate of FIG. 1, and FIG. It is a figure which shows an example structure notionally. 1 and 2, 11 is an electrode forming substrate, 12 is a glass substrate, 13 is a display electrode, 14 is an X direction coordinate, 15 is a Y direction coordinate, D is a display area, P1 is a display electrode pattern, and P2 is X A directional coordinate pattern, P3 indicates a Y-directional coordinate pattern.
Claims (1)
る表示パネルの製造において、 前記絶縁基板の表面に前記表示電極を形成する際、表示
領域外の基板周辺部に当該基板面のX方向およびY方向
の位置を検出する座標を当該表示電極と共に厚膜または
薄膜技法によって形成する ことを特徴とする平板型表示パネルの製造方法。In a method of manufacturing a display panel including an insulating substrate having display electrodes formed thereon, when forming the display electrodes on the surface of the insulating substrate, the X of the substrate surface is formed on a peripheral portion of the substrate outside a display area. A method of manufacturing a flat panel display panel, comprising forming coordinates for detecting a position in the direction and the Y direction together with the display electrode by a thick film or thin film technique.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21397489A JP2923990B2 (en) | 1989-08-19 | 1989-08-19 | Method of manufacturing flat display panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21397489A JP2923990B2 (en) | 1989-08-19 | 1989-08-19 | Method of manufacturing flat display panel |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0377234A JPH0377234A (en) | 1991-04-02 |
JP2923990B2 true JP2923990B2 (en) | 1999-07-26 |
Family
ID=16648150
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21397489A Expired - Lifetime JP2923990B2 (en) | 1989-08-19 | 1989-08-19 | Method of manufacturing flat display panel |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2923990B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1510708A (en) * | 1998-04-28 | 2004-07-07 | ���µ�����ҵ��ʽ���� | Plasma displaying board and producing meethod thereof |
-
1989
- 1989-08-19 JP JP21397489A patent/JP2923990B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0377234A (en) | 1991-04-02 |
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