JP2917553B2 - Aging method for semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for aging a semiconductor in a chip state.

[0002]

2. Description of the Related Art A semiconductor device such as an LSI is usually subjected to an accelerated life test called aging after packaging, that is, after assembling in a manufacturing process.

Here, a typical conventional manufacturing process will be described in advance. First, in a process called a pre-process, a wafer including a large number of LSI chips having a predetermined circuit function is completed, and a probe is formed. LSI in wafer by inspection
Each chip is inspected to determine whether a predetermined circuit function operates normally. Thereafter, a process called a post-process is performed. First, in a dicing process, the LSI chips in the wafer are separated one by one, and the LSI chips which are determined to be non-defective by the probe inspection are packaged. In the packaging step, the LSI chip is sealed with a resin together with a lead pin or hermetically sealed in a ceramic container to adjust the shape as a finished product. Also, a TAB (Tape Auto Connect) in which an electrode of an LSI chip is connected to a lead terminal formed on the tape.
matted bonding).

[0004] Next, the LSI having the shape as a finished product described above enters an aging process. Aging is a process in which a predetermined voltage is applied to an individual semiconductor device at a predetermined ambient temperature, for example, 125 ° C. for a predetermined time,
This is an accelerated life test operated for 96 hours. The purpose is
As is well known, it is an object to stabilize the circuit operation of a semiconductor device and make a short-lived semiconductor device appear as a defective product. As a specific method, usually, an LSI is housed in a socket on an aging board provided with wiring and components required for aging, and an electrical operation is performed in a high-temperature constant temperature bath. In this step, even if the LSI is determined to be non-defective in the probe inspection, it will fail at a certain rate due to the temperature stress and the electrical stress being applied for a predetermined time. Such an LSI does not become defective in the probe inspection, even though some cause of failure is created in the previous process, and the failure phenomenon appears in the aging process. Defective products generated in the aging process are removed in the next sorting process, and only non-defective products are shipped. Therefore, by performing aging under appropriate conditions, only products having a useful life sufficient for actual use can be shipped, and aging is an indispensable step in the manufacturing process of semiconductor devices. .

[0005] This aging is sometimes called screening or burn-in.
This is described on page 259 of the "Microelectronics Packaging Technology" issued by the Japan Microelectronics Association, published by the Industrial Research Institute Co., Ltd. on the 5th.

[0006]

However, the conventional aging process has the following problems.

First, since the aging process in the prior art is performed after the packaging as described above, a defective chip having a short life is assembled, resulting in unnecessary work. Will be.

Further, when a large number of defective products are detected in the sorting process after aging, most of the causes are often in the previous process up to the completion of the wafer, and the defect information is quickly input to the previous process. Despite the fact that feedback should be performed, there is a problem that the feedback of the defect information is delayed because aging is performed after packaging.

Further, in recent years, while high-density mounting technology is rapidly developing, there is an increasing demand for mounting a semiconductor device in a chip state. However, aging is not performed in the chip state. There is a problem that reliability remains uneasy.

An object of the present invention is to provide a method of aging a semiconductor device in a chip state before packaging.

[0011]

In order to achieve the above object, the present invention is to pass a pipe for vacuum suction of the chip through a socket bottom for housing the chip and an aging board on which the socket is mounted. The chip is placed at a predetermined position of the socket, and is temporarily fixed by the pipe passing through the through hole, and is completely fixed by a pressing lid of the socket.
A power source and a signal voltage are supplied to the jing board to operate the chip, and a plurality of chips are aged in a state of the chip.

An elastic sheet provided with the through-hole is mounted on a bottom portion in the socket, and a power supply electrode disposed on the elastic sheet corresponding to the electrode of the chip is disposed on the elastic sheet. An enlarged pitch electrode arranged at a coarse pitch and connected to each of the power supply electrodes and a flexible substrate provided with the through-hole are placed, and the electrodes of the chip are positioned so as to face the power supply electrodes, After temporarily fixing the chip with the pipe passing through the through hole, completely fixing the chip with the pressing lid of the socket, supplying power and signal voltage to the aging board to operate the chip,
Aging is performed on a plurality of chips in a chip state.

[0013]

The through holes formed in the bottom of the socket for accommodating the chip and the aging board on which the socket is mounted serve to pass a pipe for vacuum suction of the chip. After placing the chip at a predetermined position of the socket, the pipe temporarily suction-fixes the chip at a predetermined position by vacuum suction. The pressing lid of the socket completely fixes the chip in a predetermined position of the socket.

The electrodes of the chip come into contact with the power supply electrodes of the flexible substrate to conduct electricity. This power supply electrode is electrically connected to the enlarged pitch electrode. The enlarged-pitch electrode faces and contacts the internal connection terminal of the socket, and conducts. Since the pitch of the contact conducting portions is enlarged, the contact conducting portions can be easily opposed and contacted with each other to be conducted. Each of the contact portions is clamped between the socket and the pressing lid via an elastic sheet, and the contact pressure is applied to ensure reliable conduction. The through holes formed in the flexible substrate and the elastic sheet play a role of passing the chip through a pipe for vacuum suction.

[0015]

1 is an exploded perspective view showing an embodiment of an aging method according to the present invention, and FIG. 2 is a sectional view thereof.

Although FIG. 1 shows only one socket 1 on the aging board 6, it is desirable that a plurality of sockets 1 be mounted when the present invention is implemented.

The main devices used in this embodiment are a socket 1 having a through hole 19 at the bottom, a silicon rubber sheet 2 having a through hole 21, a flexible substrate 3 having a through hole 35,
It comprises a half mirror-4 for positioning, a chip 5, an aging board 6 and a pipe 7.

The socket 1 is made of heat-resistant plastic or ceramic, and has a structure similar to that of a normal LSI socket (that is, a structure similar to a socket for aging a packaged LSI instead of a chip state). ), Which is electrically connected to the external lead 11 and the external lead 11,
And an elastic internal connection terminal 12. And
At the bottom of the socket 1, a through hole 19 for passing the pipe 7 is provided at the center where the chip 5 is located.

On the inner bottom surface of the socket 1, there is provided a recess 13 for accommodating an elastic sheet 2 (abbreviated as silicon rubber sheet) made of silicone rubber.
A silicone rubber sheet 2 is adhered to the bottom surface of the device. A through hole 21 for passing the pipe 7 is provided at the center of the silicone rubber sheet 2.

The flexible substrate 3 is a member for electrically connecting the chip 5, which is a semiconductor device in a chip state, to the internal connection terminal 12 of the socket 1 which is compatible with the packaged semiconductor device. The portion is provided with a through hole 35 for passing the pipe 7. The flexible substrate 3 of the present example is made of a polyimide material, and on the upper surface thereof, a number of power supply electrodes 32 that are in contact with the chip electrodes of the chip 5 are arranged. The enlarged pitch electrodes 31 that are electrically connected to each other are arranged.
A copper foil pattern 33 connects the power supply electrode 32 and the enlarged pitch electrode 31.

In order to position the flexible board 3 and the socket 1 relative to each other, the socket 1 is provided with two positioning pins 14, while the flexible board 3 is provided with two guide holes 34. Reference numeral 17 denotes a relief hole provided so that the pressing lid 15 does not interfere with the positioning pin 14.

The flexible substrate 3 has a thickness of 25 in this embodiment.
It was composed of a micron polyimide film, and had moderate flexibility and heat resistance. The enlarged pitch electrode 31 provided on the lower surface of the flexible substrate 3 is made of a copper foil having a thickness of 18 μm in this example, is arranged corresponding to the internal connection terminal 12, and is plated with gold to ensure reliability of conduction. Was. The power supply electrode 32 provided on the upper surface of the flexible substrate 3
Were arranged corresponding to the chip electrodes of the chip 5, and were subjected to gold plating to project from the surface of the flexible substrate by 20 μm to form protruding electrodes. Thereby, contact and conduction between the chip electrode and the power supply electrode 32 are ensured. However, if the chip electrode has a projection shape, the power supply electrode 32 does not necessarily need to be formed in a projection shape. The power supply electrode 32 and the enlarged pitch electrode 31 are connected to a through-hole provided on the flexible substrate 3.
Through a copper foil pattern 33 via

The lower surface of the pressing lid 15 is provided with a concave portion 16 which is in contact with the upper surface of the chip 5. Also, as shown in FIG. 2, the pressing lid 15 can be held in a closed state.
A lock mechanism 18 shown in FIG. 1 is provided.

To perform aging by applying the method of the present invention, a flexible substrate 3 is placed on a socket 1 on which a silicon rubber sheet 2 is placed, and a pipe 7 for vacuum-sucking a chip 5 is provided. The flexible substrate 3 is passed through the through holes 61, 19, 21 and 35 from below the aging board 6.
Insert just above. Next, the chip 5 is arranged above the flexible substrate 3 so that the chip electrode of the chip 5 and the power supply electrode 32 of the flexible substrate 3 are opposed to each other. The chip 5 and the flexible substrate 3 are aligned by an apparatus (not shown). Next, the half mirror 4 is retracted to bring the chip 5 into contact with the flexible substrate 3, and
The chip 5 is vacuum-sucked by the pipe 7 and a predetermined force is applied to pull the pipe 7 downward, thereby temporarily fixing the chip 5. Thereafter, the pressing lid 15 is closed (the state shown in FIG. 2), the chip 5 is completely fixed to the socket 1 by the lock mechanism 18, and the pipe 7 is pulled out from the through holes 61, 19, 21 and 35. In this state, the chip electrode 51 comes into contact with the power supply electrode 32 due to the elasticity of the silicon rubber sheet 2 and the flexibility of the flexible substrate 3, and the copper foil pattern 33 and the external connection via the internal connection terminal 12. To the gate 11.

Thus, the same operation is performed on the plurality of sockets 1 mounted on the aging board 6 to house the chip 5, and the power supply and the signal voltage are applied to the external lead 11 to operate the chip 5. Aging is performed at a predetermined temperature for a predetermined time.

The alignment between the chip 5 and the flexible substrate 3 is not limited to the one using the half mirror-4, but other optical means may be used.

The advantages of the present embodiment are summarized as follows.

First, the chip is temporarily fixed at a predetermined position in the socket using a pipe for vacuum suction of the chip, and then completely fixed by the pressing lid. And can be contacted.

Since a flexible substrate having an enlarged pitch electrode is used, a chip can be housed in a socket having a coarse pitch of internal connection terminals used for a packaged LSI. Further, even when the type of the semiconductor device is changed and the shape of the chip and the number and shape of the chip electrodes are changed, the same socket can be used by using a flexible substrate adapted to each specification.

[0030]

According to the present invention, a semiconductor device is packaged.
Since aging can be performed in a chip state before aging, packaging of defective products checked out by aging can be avoided.

[Brief description of the drawings]

FIG. 1 is an exploded perspective view showing one embodiment of an aging method for a semiconductor device according to the present invention.

FIG. 2 is a sectional view showing an embodiment of an aging method for a semiconductor device according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Socket, 2 ... Silicon rubber sheet, 3 ... Flexible board, 4 ... Half mirror for positioning, 5 ... Chip, 6 ... Aging board, 7 ... Pipe, 11 ... External lead, Reference numeral 12: internal connection terminal, 14: positioning pin, 15: pressing lid, 16: concave portion, 18: locking mechanism, 31: enlarged pitch electrode, 32: power supply electrode, 33: copper foil pattern, 34: guide hole, 19, 21, 35, 61 ... through-holes.

Claims (2)

(57) [Claims] 1. A method of aging a semiconductor device in a chip state, wherein a pipe for vacuum suction of the chip is passed through a bottom of a socket for housing the chip and an aging board on which the socket is mounted. Provide a through hole,
The chip is placed at a predetermined position of the socket, and is temporarily fixed by the pipe passing through the through-hole, and then completely fixed by a pressing lid of the socket.
A method of aging a semiconductor device, comprising supplying a power supply and a signal voltage to an aging board to operate the chip, and aging a plurality of chips at once according to the state of the chip. . 2. A power supply electrode according to claim 1, further comprising an elastic sheet provided with said through hole at a bottom portion in said socket, and a power supply electrode disposed thereon corresponding to an electrode of said chip. An enlarged pitch electrode arranged at a coarser pitch than the power supply electrode and connected to each of the power supply electrodes and a flexible substrate provided with the through-hole are placed, and the electrode of the chip is opposed to the power supply electrode. Aging method for a semiconductor device, which is positioned by positioning.