JP2901507B2 - Bipolar transistor and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a bipolar transistor and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 2 is a diagram showing a cross section of a conventional bipolar transistor.

In FIG. 1, n-G is formed on a semi-insulating substrate 1.
An aAs collector contact layer 2 is formed, on which a collector electrode 10 is connected, an n-GaAs collector layer 3 and a p-GaAs base layer 4 are laminated, and p-Ga
A base electrode 9 is connected on the As base layer 4 and n-
An AlGaAs emitter layer 5 is formed. Also n-
The emitter electrode 8 is connected to the upper surface of the AlGaAs emitter layer 5, and the SiO ₂ film 12 is adhered to the side surface. The flow of the carrier is indicated by an arrow line. As described above, in the conventional bipolar transistor as shown in FIG. 2, recombination of carriers occurs around the emitter mesa and on the surface of the external base due to a large number of interface states existing on the semiconductor surface, resulting in a decrease in current amplification factor.

FIG. 3 shows a cross section of a bipolar transistor provided with a device for suppressing such a decrease in the current amplification factor. The bipolar transistor shown in FIG. 3 has a thin protective layer 7 composed of a part of the emitter layer around the emitter mesa and on the surface of the external base. If the thickness of the protective layer 7 is optimal, the protective layer 7 is completely depleted during device operation, and supply of carriers to the surface of the protective layer is cut off. Therefore, recombination around the emitter mesa and the surface of the external base is suppressed, and an improvement in current amplification factor can be expected.

A method conventionally used for forming a bipolar transistor having the above-described protective layer 7 is shown in FIG.
This will be described with reference to FIG. In this conventional example, first, an n-GaAs collector contact layer 2 and an n-Ga
As collector layer 3, p-GaAs base layer 4, n-Al
After sequentially stacking the GaAs emitter layers 5, the emitter layers 5
An emitter electrode 8 processed into a predetermined pattern is formed thereon. Etching is performed using this as a mask, and the emitter layer 5 is partially removed and removed (FIG. 4A).

Next, a side wall 12 made of a SiO ₂ film is formed on the side surface of the emitter mesa. Then, etching is performed using the SiO ₂ side wall 12 as a mask, the remaining emitter layer 5 is removed, and the base layer 4 is exposed on the surface (FIG. 4B). At this time, a thin n-AlGaAs layer 7 remains under the SiO ₂ side wall 12. This thin n-AlGAs layer 7 functions as the above-mentioned protective layer. Next, after the base electrode 9 is formed on the base layer 4 exposed on the surface, the base layer 4 and the collector layer 3 are removed by etching, and then the collector electrode 10 is formed on the surface of the collector contact layer 2. A bipolar transistor having the protective layer 7 as shown in FIG. 3 is obtained.

[0007]

As described above, in order to effectively suppress the recombination current, it is necessary to design the thickness of the protective layer to a predetermined value so that the protective layer is completely depleted during the operation of the device. There is.

However, in the above-mentioned conventional method, it is difficult to control the film thickness for forming a thin protective layer by etching, and the uniformity of the film thickness of the protective layer is deteriorated due to the in-plane variation of the etching depth. .

Further, since a part of the emitter layer is used as it is as the protective layer, there is a problem that the range of selection of the protective layer material is narrow in order to further enhance the effect of suppressing recombination.

An object of the present invention is to solve the above problems,
An object of the present invention is to provide a bipolar transistor in which a protective layer can be formed with good controllability and a method for manufacturing the same.

[0011]

According to the present invention, a collector layer made of a first semiconductor of a first conductivity type, a base layer made of a second semiconductor of a second conductivity type, and a first layer are formed on a semi-insulating substrate.
In a third bipolar transistor having an emitter mesa layer are sequentially stacked of semiconductor conductivity type, formed by regrowth at a side across and around the emitter mesa, and a fourth semiconductor having a thickness that completely depleted during operation have a thin layer consisting of an insulating film on a side surface of said fourth semiconductor layer
It is characterized by having .

Further, the method of manufacturing a bipolar transistor according to the present invention is characterized in that the first conductive type first semiconductor layer, the second conductive type second semiconductor layer, and the first conductive type third semiconductor layer are formed on a semi-insulating substrate. Successively laminating semiconductor layers, forming a mask having a predetermined pattern made of a first insulator on the third semiconductor layer, and etching the third semiconductor layer using the mask. A step of exposing the second semiconductor layer to the surface; and a step of re-growing the entire side surface of the mesa formed on the second semiconductor layer and the third semiconductor layer so as to completely deplete during operation . Forming a fourth semiconductor layer, forming a side wall made of a second insulator on a side surface of a mesa formed of the third semiconductor layer and the fourth semiconductor layer, and using the side wall as a mask, Etching the semiconductor layer 4 And a step of further removing.

[0013]

In the present invention, since the protective layer is formed by regrowth, the thickness of the thin protective layer is excellent in controllability, and the uniformity in the wafer surface is also good.

Further, the selection range of the material for the protective layer is wider than in the past. For example, when a semiconductor having a high energy barrier to carriers is used as a protective layer material, carriers can be separated from the semiconductor surface, and recombination on the semiconductor surface is suppressed.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

FIGS. 1A to 1D are sectional views showing a method of manufacturing a bipolar transistor according to an embodiment of the present invention in the order of steps, and FIG. 1D is a sectional view showing a bipolar transistor according to the present invention. FIG.

First, the GaAs semi-insulating substrate 1 is
After sequentially stacking an As collector contact layer 2, an n-GaAs collector layer 3, a p-GaAs base layer 4, and an n-AlGaAs emitter layer 5, an emitter electrode 8 processed into a predetermined pattern on the n-AlGaAs emitter layer 5 and An SiO ₂ film 11 is formed. Next, etching is performed using the SiO ₂ film 1 as a mask to selectively remove the n-AlGaAs emitter layer 5 to form an emitter mesa.
Further, the p-GaAs base layer 4 is exposed on the surface (FIG. 1A).

Next, using the SiO ₂ film 11 as a mask, p-G
A thin layer 6 made of p-AlGaAs is regrown on the aAs base layer 4 and on the side surface of the n-AlGaAs emitter layer 5 (FIG. 1B).

Subsequently, after an SiO ₂ film 12 is formed on the entire surface, the SiO ₂ film 12 is removed by anisotropic reactive ion etching, whereby the n-AlGaAs emitter layer 4 and the p-A
An SiO ₂ film 12 is formed on the side surface of the mesa
Is formed. Next, the SiO ₂ films 11 and 1
2 is used as a mask to perform p-AlGaAs
The thin layer 6 is removed, and the p-GaAs base layer 4 is again exposed on the surface (FIG. 1C).

As described above, the n-AlGaAs emitter layer 5
P-AlGaAs on the side of the mesa made of
A thin protective layer 6 made of is formed.

On the side of the emitter mesa, the p-AlGa
The recombination is suppressed because the As protective layer 6 is depleted.

On the surface of the external base, the protective layer 6 having a smaller electron affinity than the base layer 4 serves as a high energy barrier for electrons, thereby preventing the penetration of electrons into the semiconductor surface and suppressing recombination.

Next, a base electrode 9 is formed on the p-GaAs base layer 4 exposed on the surface. Further, a photoresist (not shown) having a predetermined pattern is formed, and using the photoresist as a mask, the p-GaAs base layer 4 and the n-GaAs collector layer 3 are selectively removed by etching.
The As collector contact layer 2 is exposed on the surface. When a collector electrode 10 is formed on the n-GaAs collector contact layer 2, a bipolar transistor having a structure as shown in FIG. 1D is obtained.

In the above embodiment, the semiconductor thin layer 6 serving as a protective layer
Although p-AlGaAs is used as the material for the above, another material can be used as long as it satisfies the function of separating carriers from the semiconductor surface.

[0025]

According to the present invention, when the protective layer is formed, regrowth which is excellent in controlling the film thickness is used, so that a thin protective layer can be easily and uniformly formed.

Further, in the present invention, since the range of selection of the material of the protective layer is wide, the improvement of the current amplification factor can be expected by using a material system which is more effective in suppressing the recombination.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a bipolar transistor and a method for manufacturing the same according to one embodiment of the present invention.

FIG. 2 is a sectional view showing a conventional bipolar transistor.

FIG. 3 is a sectional view showing another conventional bipolar transistor.

FIG. 4 is a cross-sectional view illustrating a method for manufacturing the bipolar transistor of FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Semi-insulating substrate (GaAs) 2 n-GaAs collector contact layer 3 n-GaAs collector layer 4 p-GaAs base layer 5 n-AlGaAs emitter layer 6 p-AlGaAs protection layer 7 protection layer 8 emitter electrode 9 base electrode 10 collector Electrodes 11, 12 Insulator (SiO ₂ )

Claims (2)

(57) [Claims] 1. A semiconductor device comprising: a semiconductive substrate having a collector layer made of a first semiconductor of a first conductivity type, a base layer made of a second semiconductor of a second conductivity type, and a third semiconductor of the first conductivity type. in the bipolar transistor emitter mesa layer are sequentially laminated made, the entire side surface of the emitter mesa layer and
Have a fourth semiconductor layer having a thickness that completely depleted during operation is formed by regrowth around further semiconductive said 4
A bipolar transistor having an insulating film on a side surface of a body layer . 2. a step of sequentially laminating a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a third semiconductor layer of the first conductivity type on a semi-insulating substrate. Forming a mask having a predetermined pattern made of a first insulator on the third semiconductor layer; and etching the third semiconductor layer using the mask to form the second semiconductor layer. forming thereby exposing the surface, a fourth semiconductor layer having a thickness that completely depleted during operation by regrown entire side of the mesa composed of the upper second semiconductor layer and said third semiconductor layer Forming a side wall made of a second insulator on a side surface of a mesa formed of the third semiconductor layer and the fourth semiconductor layer; and removing the fourth semiconductor layer by etching using the side wall as a mask. And a process. A method for manufacturing a transistor.