JP2894758B2 - Semiconductor mask data conversion processor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a semiconductor mask data conversion processing device, which is capable of increasing the efficiency of mask data conversion processing and shortening the processing time, and providing an economical semiconductor mask data conversion processing device. In a semiconductor mask data conversion processing device for converting a format of a CAD device corresponding to LSI pattern data into mask data of a real device using a CPU,
Is divided into a control CPU that controls the mask data conversion process and a calculation CPU that performs the calculation process required for the mask data conversion process. A graphic processor is configured to include a secondary memory for exchanging data with the highest-order memory, and the graphic processor can be controlled in parallel by the control CPU. A tertiary memory that can be referred to and updated is provided, and the tertiary memory has a capacity capable of accommodating all of graphic data necessary for mask data conversion processing in the form of expanded line segment information. The memory and the tertiary memory are hierarchized as graphic data memories, and the secondary memory on each graphic processor has at least the field area of the mask data of the real device. Configured to be capable of storing over data.

Further, the tertiary memory is configured to be able to store at least data necessary for creating one mask layer of the mask data of the real device, and a field between the secondary memory and the tertiary memory is provided. It is configured to transfer graphic information in units of areas.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor mask data conversion processing apparatus, and more particularly, to a graphic format conversion processing in a mask pattern formation as an initial step of a semiconductor pattern formation and a graphic processing in a print pattern formation step. The present invention relates to a mask data conversion processing device.

Semiconductor device layout design is LSI
This is the most important design step in the design, and is the work of designing LSI mask patterns. In this method, logic gates are arranged and wired using connection information obtained by logic design and a logic cell library prepared by circuit design. Is required to be as small as possible, and it is said that this is a work to control the life of LSI performance. And after the layout design is completed,
It is passed to the manufacturing process as a mask pattern. At this time, the manufacturing data and verification data format (for example, MEBES, KLSRIS).

In recent years, the time required for the format conversion processing has been increasing along with the increase in the scale of the IC pattern, and there is an urgent need to reduce the processing time.

[Conventional technology]

Conventional mask data conversion processing equipment for semiconductors uses LSI
The data exchange work and the conversion work are performed using one CPU for the format of the CAD device corresponding to the pattern data. Accordingly, one CPU simultaneously has two functions of a high-speed data channel, which is important for data transfer, and high-speed arithmetic, which is important for data conversion.

[Problems to be solved by the invention]

However, in such a conventional semiconductor mask data conversion processing apparatus, one CPU must have a high-speed data channel function (control function) and a high-speed operation function (operation function). Because of the configuration, there is a problem that the efficiency of the mask data conversion processing is low due to the limitation of the capacity of the CPU to be used, and the processing time is long.

Further, since a dedicated CPU having both a control function and an arithmetic function for mask data conversion processing is required, there is a disadvantage that it is not economical.

On the other hand, in response to the above-mentioned problem, other data processing devices, for example, use of a parallel processor and memory hierarchies are performed. However, this is in a completely different field from a semiconductor mask data conversion processing device. That is. Therefore, the memory capacity for each memory hierarchy is determined without being aware of the mask data conversion processing, and even when a parallel processor is used, there is no concept of a field that always exists in the manufacturing data format or the verification data format, and control efficiency is poor. However, the degree of parallelism cannot be increased, and as a result, the above problems have not been solved.

Specifically, data other than the data currently being processed is also taken into the higher-order memory, which causes a reduction in the memory use efficiency. For this reason, the frequency of data transfer from the low order to the high order increases, and the data processing time becomes enormous. Therefore, it is impossible to execute the process for each field without waste and in parallel.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an economical semiconductor mask data conversion processing apparatus that can increase the efficiency of mask data conversion processing and reduce the processing time, and is economical.

[Means for solving the problem]

According to the present invention, there is provided a semiconductor mask data conversion processing apparatus for converting a format of a CAD apparatus corresponding to LSI pattern data into mask data of an actual device using a CPU to achieve the above object. In the conversion processing device, the CPU is divided into a control CPU for controlling mask data conversion processing and a calculation CPU for performing calculation processing required for mask data conversion processing. A graphic processor is configured to include a highest-order memory that directly exchanges data and a secondary memory that exchanges data with the highest-order memory, and the graphic processor can be controlled in parallel by the control CPU. In both cases, a tertiary memory that can be referenced and updated from all graphic processors is provided, and the tertiary memory stores graphic data necessary for mask data conversion processing. Has all capable of accommodating capacity in the form of expanded into partial information, the highest order memory, 2
The secondary memory and the tertiary memory are hierarchized as graphic data memories, and the secondary memory on each graphic processor is configured to be able to store at least data corresponding to the field area of the mask data of the real device. .

According to a second aspect of the present invention, in the mask data conversion processing apparatus according to the first aspect, the tertiary memory includes at least a mask layer 1 of mask data of a real device.
It is configured to be able to store the data required to create the layers.

According to a third aspect of the present invention, in a semiconductor mask data conversion processing apparatus for converting a format of a CAD device corresponding to LSI pattern data into mask data of a real device using a CPU, The control CPU is configured to be divided into a control CPU that performs control and a calculation CPU that performs calculation processing required for mask data conversion processing.
Constitutes a graphic processor including a highest-order memory for directly transmitting and receiving processing data and a secondary memory for transmitting and receiving data to and from the highest-order memory, wherein the graphic processor is controlled in parallel by the control CPU. That can be referenced and updated from all graphic processors.
A secondary memory, and the tertiary memory has a capacity capable of accommodating all the graphic data required for the mask data conversion process in the form of expanded line segment information. It is hierarchized as a graphic data memory, and is configured to transfer graphic information between the secondary memory and the tertiary memory on a field area basis.

[Action]

According to the first aspect of the present invention, the highest-order memory, the secondary memory, and the tertiary memory are hierarchized as a graphic data memory, and each graphic processor including an arithmetic CPU is controlled in parallel by one control CPU. Data is stored in units of data for the field area of the mask data of the device, and a mask data conversion process is performed.

Therefore, the two functions of control and operation are divided, and the operation is performed in parallel, so that the efficiency of the data conversion process is increased, and the concept of a field is adopted, so that the data processing time is shortened.

According to the second aspect of the present invention, in addition to the configuration of the first aspect, data necessary for creating one mask layer is stored in the tertiary memory.

Further, in the third aspect of the invention, graphic information is transferred between the secondary memory and the tertiary memory in units of a field area.

Therefore, data is handled by adopting the concept of a field as described above, and the data processing time is reduced.

〔Example〕

 Hereinafter, the present invention will be described with reference to the drawings.

FIGS. 1 to 3 show one embodiment of a semiconductor mask data conversion processing apparatus according to the first to third aspects of the present invention.

First, the configuration will be described. FIG. 1 is a diagram showing the overall hardware configuration of this apparatus. In this figure, a mask data conversion processing apparatus includes a control CPU 1, a keyboard 2, a mouse 3, a frame buffer 4, a CRT 5, a disk interface 6, a disk 7, a CMT 8 , MT interface 9, magnetic tape (MT) 10, graphic processor 11, large-capacity memory 1
2. It comprises an image memory 13, a CRT 14, a system bus 15 and a local bus 16.

The control CPU 1 controls a mask data conversion process. One control CPU 1 performs a process necessary for operating a plurality of graphic processors 11 in parallel. At this time, a command from an operator via the keyboard 2 and the mouse 3 is issued. Is controlled
Captured by CPU1. The processing contents of the control CPU 1 are imaged by an image circuit including the frame buffer 4 and displayed externally by the CRT 5.

The disk 7 is composed of, for example, a hard disk, stores data necessary for processing of the control CPU 1, transmits and receives data to and from the control CPU 1 via a disk interface 6 of the SCSI standard, and the CMT 8 stores a plurality of cassettes MT. Have. Also, data with a larger capacity than disk 7
It is exchanged with the magnetic tape 10 via the MT interface 9.

As shown in FIG. 2, the graphic processor 11
U21, cache memory 22, and data memory 23 are provided, and a total of eight are provided. Arithmetic CPU21
Performs necessary arithmetic processing for mask data conversion processing. At this time, necessary data is fetched from the cache memory 22 and is accessed from the data memory 23 when it is not in the cache memory 22. The cache memory 22 corresponds to the highest-order memory, and has about 128 KB. The data memory 23 corresponds to a secondary memory, and a memory of about 16 MB is used.

The large-capacity memory 12 is equivalent to a tertiary memory, and has a capacity capable of accommodating all graphic data required for mask data conversion processing in the form of being expanded into line segment information. Are provided. The cache memory 22, the data memory 23, and the large-capacity memory 12 are hierarchized as graphic data storage means.
Is accessible from Therefore, large memory 12
The stored contents can be referred to / updated from all the graphic processors 11. Further, the data memory 23 is configured to be able to store at least the data of the field area of the mask data of the real device, and the large capacity memory 12 stores the data of one mask layer of the mask data of the real device. Data necessary for creation can be stored, and further, graphic data can be transferred between the data memory 23 and the large-capacity memory 12 in units of field regions.

Here, the field refers to the maximum beam exposure range of the exposure apparatus (for example, a reticle exposure apparatus), and is used when converting design data into exposure data in a mask data conversion process. Disassemble into units. The fields include a main field and a subfield. In addition, the exposure performed by disassembling in field units includes electron beam exposure, X-ray exposure, and laser beam exposure. Therefore, for example, when information is sent from the large-capacity memory 12 to the data memory 23 as input field data, the data of the field area is transferred in the form of line segment information. Transfer data.

The image memory 13 stores image data necessary for displaying the processing contents of the graphic processor 11 as an image, and this image data is displayed externally by the CRT 14.

 Next, the operation will be described.

When the layout design of a certain LSI is completed by the CAD device, the data after the completion of the design is passed to the manufacturing process as a mask pattern. At this time, the CA used when creating the pattern design data in the semiconductor pattern creation is used.
The format of the D device is converted into an actual exposure pattern by the present device.

Various logical processes are performed when an exposure mask pattern is formed at the stage of the conversion process. An example is shown in FIG. For example, when the graphic data 31 and 32 before processing are OR-processed, they are shown as graphic data 33 after processing, and similarly,
The graphic data 34 to 37 after the AND processing, the ANDNOT processing, and the EXCLUSIVE-OR processing are represented as illustrated.

Also, as shown in FIG. 4, one exposed mask layer
When there is 41, the mask layer 41 is sequentially converted into an exposure pattern that allows reticle exposure by the eight graphic processors 11 with the field 42 as one unit. The number of mask layers is usually several or more.

Furthermore, the expression of the repetition part in the mask pattern has only necessary minimum information, and the data amount is reduced as much as possible to increase the data processing efficiency. More specifically, a repeated portion is represented by having only one original pattern and having information on the pitch and the number of arrangements in the X and Y directions.

In this case, in the present embodiment, a sufficient memory capacity is determined in consideration of the mask data conversion processing of the semiconductor, and the hierarchy of the memory is appropriately performed. Are controlled in parallel. Also,
The large-capacity memory 12 stores data necessary for creating one mask layer. Therefore, since all necessary data is collected in one large-capacity memory 12, the efficiency of data access is greatly improved.

Further, data is stored and graphic information is transferred between the large-capacity memory 12, the cache memory 22 and the data memory 23 in units of data of the field area of the mask data of the actual device, and the mask data conversion processing is performed. Done. For this reason, access to data other than the one to be processed at present is not performed to the higher-order memory, and a decrease in memory use efficiency can be avoided.

Therefore, the two functions of control and operation are separated, and the efficiency of data conversion processing is increased by parallel processing of operations, and the concept of a field is adopted. The processing can be executed in parallel without waste, thereby increasing the efficiency of control, increasing the degree of parallelism and shortening the data processing time. As a result, the mask data conversion processing time can be significantly reduced, and a dedicated mask data conversion processing control function and calculation function are provided.
Since a CPU is not required, a normal CPU can be used and the configuration of the hardware and software can be made economical (low cost).

In the above embodiment, eight graphic processors 11 are used,
Although the configuration is such that two large-capacity memories 12 are provided, the configuration is not limited to this, and other parallel configurations may be used. In other words, the configuration is such that the required mask data conversion processing can be performed. Good.

〔The invention's effect〕

According to the first aspect of the present invention, the two functions of the control and the operation of the mask data conversion process are divided, the operations are performed in parallel, and the data is stored in units of fields. And the efficiency of the mask data conversion process can be increased, and the data processing time can be shortened.

Further, according to the second aspect of the present invention, the tertiary memory can store the data necessary for creating one mask layer of the mask data, and the efficiency of data access is greatly improved. Can also shorten the data processing time.

Further, according to the third aspect of the present invention, since graphic information is transferred between the secondary memory and the tertiary memory in units of field regions, the efficiency of data transfer is particularly increased, and the data processing time is further reduced. Can be shortened.

[Brief description of the drawings]

1 to 4 are diagrams showing an embodiment of a semiconductor mask data conversion processing apparatus according to the first to third aspects of the present invention. FIG. 1 is an overall configuration diagram thereof, and FIG. 2 is a graphic processor thereof. FIG. 3 is a view for explaining the logical processing of the mask pattern, and FIG. 4 is a view showing an example of the mask layer. 1 ... Control CPU, 2 ... Keyboard, 3 ... Mouse, 4
... frame buffer, 5, 14 ... CRT, 6 ... disk interface, 7 ... disk, 8 ... CMT, 9 ...
... MT interface, 10 ... Magnetic tape, 11 ... Graphic processor, 12 ... Large capacity memory (tertiary memory),
13 image memory, 15 system bus, 16 local bus, 21 arithmetic CPU, 22 cache memory (highest order memory), 23 data memory (secondary memory).

──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Akihiro Okazaki 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Hiroshi Fuji 4-6-1, Ebisu, Shibuya-ku, Tokyo Japan Control System Co., Ltd. (72) Inventor Hiroaki Tsuda 4-6-1, Ebisu, Shibuya-ku, Tokyo Japan Control System Co., Ltd. (56) References JP-A-63-7632 (JP, A) JP-A-60-204061 (JP, a) JP Akira 63-6646 (JP, a) JP Akira 61-28155 (JP, a) JP flat 1-126758 (JP, a) (58 ) investigated the field (Int.Cl. ⁶ G03F 1/00-1/16 G06F 15/60

Claims (3)

(57) [Claims] 1. A semiconductor mask data conversion processor for converting a format of a CAD device corresponding to LSI pattern data into mask data of an actual device using a CPU, wherein the CPU controls a mask data conversion process. Control CPU
And an operation that performs the operation required for the mask data conversion process
The arithmetic CPU comprises a graphic processing processor including a highest-order memory for directly sending and receiving processing data and a secondary memory for sending and receiving data to and from the highest-order memory; The graphic processor is provided with a tertiary memory which can be controlled in parallel by the control CPU and which can be referred to and updated by all graphic processors. The tertiary memory stores graphic data required for mask data conversion processing. Is expanded into line segment information, and the highest-order memory, the secondary memory, and the tertiary memory are hierarchized as a graphic data memory. The secondary memory on each graphic processor has at least a real memory. A mask data conversion processing device for semiconductors, wherein data for a field area of mask data of a device can be stored. 2. The tertiary memory according to claim 1, wherein the tertiary memory is configured to be able to store at least data necessary for creating one mask layer out of mask data of an actual device. Semiconductor mask data conversion processor. 3. A semiconductor mask data conversion processing device for converting a format of a CAD device corresponding to LSI pattern data into mask data of a real device using a CPU, wherein the CPU controls the mask data conversion process. Control CPU
And an operation that performs the operation required for the mask data conversion process
The arithmetic CPU comprises a graphic processing processor including a highest-order memory for directly sending and receiving processing data and a secondary memory for sending and receiving data to and from the highest-order memory; The graphic processor is provided with a tertiary memory which can be controlled in parallel by the control CPU and which can be referred to and updated by all graphic processors. The tertiary memory stores graphic data required for mask data conversion processing. Has a capacity that can be accommodated in the form of expanded line information. The highest-order memory, the secondary memory, and the tertiary memory are hierarchized as graphic data memory, and a field area is provided between the secondary memory and the tertiary memory. A mask data conversion processing device for semiconductors, characterized in that graphic information is transferred in units.