JP2886186B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to a semiconductor device.

(Prior Art) A complementary metal insulating film semiconductor device (hereinafter, referred to as a CMOS transistor) according to a conventional technique will be described below with reference to FIGS. 3 and 4 (a) to (e).

FIG. 3 is a plan view of a CMOS transistor. The CMOS transistor is composed of an N-channel MOS transistor (hereinafter referred to as NMOS) and a P-channel MOS transistor (hereinafter referred to as PMOS), each of which has a gate electrode (11) and a source diffusion layer region (1).
2), (14) and drain diffusion layer regions (13), (15).

4 (a) to 4 (e) are cross-sectional views taken along the line AA 'of FIG. 3, which will be described according to the manufacturing process.

As shown in FIG. 4 (a), the semiconductor substrate (1) has an NMOS
A semiconductor substrate region to which a P-type impurity is added as a transistor region (hereinafter referred to as P Well) (2), and a semiconductor substrate region to which an N-type impurity is added as a PMOS transistor region (hereinafter referred to as N Well) (3) ) Is formed. An element isolation film (4) is formed at a predetermined location, a gate insulating film (5) is formed on the surface of the semiconductor substrate surrounded by the element isolation film (4), and subsequently substantially contains impurities as a gate electrode material. A polycrystalline silicon film (6) is formed on the entire surface.

Next, as shown in FIG. 4 (b), when different impurities are added to the gate electrode material of each of the PMOS and NMOS transistors, a polycrystalline silicon film (6b) on N Well (3) serving as a PMOS region is formed. A resist pattern (7a) is formed and NMOS
N-type impurities, for example, arsenic (As) are ion-implanted into the polycrystalline silicon film (6a) on the P-well (2) to be a region.

As shown in FIG. 4 (c), the resist pattern (7a)
Then, a resist pattern (7b) is formed on the polycrystalline silicon film (6a) on the P-well (2), which is an NMOS region, and the polycrystalline silicon film ( 6b), ions of a P-type impurity such as boron (B) are implanted.

As shown in FIG. 4 (d), the resist pattern (7b)
After stripping, a metal silicide film (8) is formed on the entire surface.

As shown in FIG. 4 (e), the resist pattern (9)
The gate insulating film (5), the polycrystalline silicon films (6a) and (6b) and the metal silicide film (8) where no elements are formed are etched using the mask as a mask to form the PMOS and NMOS gate electrodes. Form at the same time. Thus, the gate electrode (11) shown in FIG. 3 is formed.

After that, N-type impurities are ion-implanted using the gate electrode (11) as a mask on the N-well (3) serving as a PMOS region, and the source / drain diffusion layer regions (12) and (13) are formed in a self-aligned manner. Similarly, the P well (2) serving as an NMOS region is covered with a resist, and a P type impurity is ion-implanted also into the N well (3) serving as a PMOS region to form a P type source / drain diffusion layer region (14).
Form (15).

As described above, a CMOS transistor having a gate electrode containing a different impurity is formed.

However, since the semiconductor device according to the prior art has a stacked gate electrode of a polycrystalline silicon film and a metal silicide film containing different impurities, impurities added to the polycrystalline silicon film in an oxidation or diffusion process after the formation of the gate electrode. Each redistributes and the transistor characteristics fluctuate. This redistribution will be described with reference to FIG. FIG. 5 is an enlarged view near the boundary between the polycrystalline silicon films (6a) and (6b) and the metal silicide film (8). The numbers correspond to FIG. By the heat treatment in the oxidation and diffusion steps after the formation of the gate electrode, arsenic as an N-type impurity and boron as a P-type impurity in the polycrystalline silicon film are diffused into the metal silicide film (8). These impurities diffuse very fast in the metal silicide film (8). For example, by heat treatment at 900 ° C. for 30 minutes in a nitrogen atmosphere, arsenic as an N-type impurity diffuses by 100 μm or more and boron as a P-type impurity diffuses by 10 μm or more. The diffusion paths of these impurities are mainly at boundaries between crystal grains of the metal silicide film (hereinafter referred to as grain boundaries). Each impurity readily diffuses along this grain boundary to the opposite type of added region. In the polycrystalline silicon film, impurities added in advance by ion implantation before depositing the metal silicide film are diffused into the metal silicide film by heat treatment, and the concentration is reduced, so that impurities of the opposite type diffuse from the metal silicide film. Then, the work function of the polycrystalline silicon film changes, and the absolute value of the threshold value of the transistor changes. FIG. 6 shows this change. FIG. 6 shows the gate voltage V _g [V] on the horizontal axis.
And the vertical axis represents the drain current I _D [A].
This shows the characteristics of the S transistor. The graph shows the characteristics of a PMOS transistor in the case where the gate electrode has a laminated structure composed of a polycrystalline silicon film to which only a P-type impurity is added and a metal silicide film. 4 shows the characteristics of a PMOS transistor in the case where a multilayered wiring composed of a polycrystalline silicon film doped with an N-type impurity and a metal silicide film is connected to the gate electrode of a PMOS transistor having the same structure as that of FIG. From FIG. 6, it can be seen that the absolute value of the threshold voltage of the PMOS transistor has increased.

(Problems to be Solved by the Invention) In the conventional semiconductor device as described above, a P-type impurity and an N-type impurity are added to the same polycrystalline silicon film, and these are used as gate electrodes of PMOS and NMOS transistors, respectively. There is a problem in that redistribution of impurities occurs due to heat treatment after the formation, so that the transistor does not operate normally and the reliability of the semiconductor device is reduced.

The present invention has been made in consideration of the above-described problem, and suppresses redistribution of impurities due to heat treatment after forming a gate electrode.
It is an object to provide a highly reliable semiconductor device.

[Structure of the Invention] (Means for Solving the Problems) In order to solve the above object, in the present invention, a semiconductor substrate of a first conductivity type, a first conductivity type region formed in the semiconductor substrate, and a second semiconductor substrate are formed. A conductive type region; an element isolation film formed on a predetermined portion of the semiconductor substrate; a first conductive type region formed on the first conductive type region and the second conductive type region via a gate insulating film; A polysilicon film containing a second conductivity type impurity on the second conductivity type region, a polysilicon film containing the first conductivity type impurity on the second conductivity type region, and an impurity diffusion blocking conductive film formed on the polysilicon film. And a semiconductor device having a layer.

(Operation) According to such a semiconductor device and its manufacturing method, since the impurity diffusion blocking film is formed on the polycrystalline silicon film to which different impurities are added, oxidation after the formation of the gate electrode,
Redistribution of impurities due to heat treatment such as a diffusion step is suppressed.

(Embodiment) Hereinafter, the embodiment of the present invention will be described with reference to the drawings by attaching the same reference numerals to the same parts as the conventional example.

FIG. 1 is a sectional view showing the structure of a semiconductor device according to a first embodiment of the present invention.
FIG.

As shown in FIG. 1, a P-well (2) serving as an NMOS transistor region and an N-well (3) serving as a PMOS transistor region are formed on a semiconductor substrate (1), and a device isolation film (4) is formed on a portion where no device is formed. ) Is formed. A polysilicon film is formed on the surface of the semiconductor substrate through a gate insulating film (5) of about 100 mm, for example, about 1000 mm.
A P-type impurity (for example, boron) is ion-implanted into the polycrystalline silicon film (6b) on the N Well (3) serving as a region, and the NMOS is formed.
N-type impurities (for example, arsenic) are ion-implanted into the polycrystalline silicon film (6a) on the P-well (2) to be a region.
On this polycrystalline silicon film (6a) (6b), a tungsten silicide film (8a), which is a metal silicide film, is formed, for example, at about 1000 ° to form a gate electrode. This tungsten silicide film (8a) has been completely amorphized by ion implantation of silicon (Si).

According to the semiconductor device of the first embodiment, since there is no grain boundary in the amorphized tungsten silicide film formed on the polycrystalline silicon films (6a) and (6b),
The impurity diffusion is similar to the ordinary diffusion in the bulk, and does not cause the extremely fast diffusion through the grain boundary as described in the prior art. Therefore, the redistribution of the P-type and N-type impurities contained in the polycrystalline silicon films (6a) and (6b) can be suppressed, and the threshold voltage fluctuation of the transistor can be prevented. Can be obtained.

In the first embodiment, when the Si ion implantation for amorphizing the tungsten silicide film (8a) is performed after the gate electrode patterning, the surface of the silicon substrate can be simultaneously amorphized. Since the channeling phenomenon in the ion implantation step of forming the drain diffusion layer can be suppressed, the formation of a shallow diffusion layer can be realized, and a large effect can be achieved for high speed and high integration.

In the first embodiment, a tungsten silicide film is used as the metal silicide film. This film electrically connects the P-type polycrystalline silicon film (6b) and the N-type polycrystalline silicon film (6a). It is needless to say that the same effect can be obtained by using molybdenum silicide, titanium silicide, cobalt silicide, tantalum silicide, or the like. Further, Si ions are used to make the tungsten silicide film amorphous, but other ions (eg, Ge, Ne, Ar, etc.) may be used.

FIG. 2 is a sectional view showing the structure of a semiconductor device according to a second embodiment of the present invention.

As shown in FIG. 2, a P-well (2) serving as an NMOS transistor region and an N-well (3) serving as a PMOS transistor region are formed on a semiconductor substrate (1), and a device isolation film (4) is formed on a portion where no device is formed. ) Is formed. A polysilicon film is formed on the surface of the semiconductor substrate through a gate insulating film (5) of about 100 mm, for example, about 1000 mm.
A P-type impurity (for example, boron) is ion-implanted into the polycrystalline silicon film (6b) on the N Well (3) serving as a region, and the NMOS is formed.
N-type impurities (for example, arsenic) are ion-implanted into the polycrystalline silicon film (6a) on the P-well (2) to be a region.
On this polycrystalline silicon film (6a) (6b), a titanium nitride film (10) is formed, for example, at about 1000 °. Further, a metal silicide film (8) is formed thereon at about 1000 mm,
A gate electrode is formed.

According to the structure of the semiconductor device of the second embodiment, the titanium nitride film formed on the polycrystalline silicon films (6a) and (6b) is a dense film and has a blocking effect on impurities. Redistribution of P-type and N-type impurities contained in the polycrystalline silicon films (6a) and (6b) can be suppressed. Further, the resistance of the gate electrode is reduced by forming a metal silicide film (8) having a lower resistance value than the titanium nitride film on the titanium nitride film (10). Therefore, a highly reliable semiconductor device can be obtained.

Although the titanium nitride film is used in the second embodiment, the same effect can be obtained by using another conductive metal nitride film or metal oxide film.

[Effects of the Invention] As described above in detail, according to the semiconductor device of the present invention, a change in the threshold voltage of a transistor can be prevented, and a highly reliable semiconductor device can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a structure of a semiconductor device according to a first embodiment of the present invention, FIG. 2 is a sectional view showing a structure of a semiconductor device according to a second embodiment of the present invention, and FIG. 4 (a) to 4 (e) are cross-sectional views showing a manufacturing process of a semiconductor device according to the prior art, FIG. 5 is a cross-sectional view showing the structure of the semiconductor device according to the prior art, and FIG. 5 is a graph showing characteristics of a transistor. 1 ... Semiconductor substrate, 2 ... P Well, 3 ... N Well, 4 ...
... Element isolation film, 5 ... Gate insulating film, 6 ... Polycrystalline silicon film, 6a ... Polycrystalline silicon film containing As, 6b ... Polycrystalline silicon film containing B, 7a, 7b, 9 ... Resist Membrane, 8,8a
... metal silicide film, 10 ... metal nitride film (titanium nitride film), 11 ... gate electrode, 12, 14 ... source diffusion layer region, 13, 15 ... drain diffusion layer region.

Claims (2)

(57) [Claims] A first conductivity type semiconductor substrate; a first conductivity type region and a second conductivity type region formed in the semiconductor substrate; an element isolation film formed in a predetermined portion of the semiconductor substrate; A second conductive type impurity is formed on the first conductive type region and the second conductive type region via a gate insulating film, and the second conductive type impurity is contained on the first conductive type region. Is characterized by comprising a polycrystalline silicon film containing a first conductivity type impurity, and an impurity diffusion preventing conductive layer of a metal silicide film formed on the polycrystalline silicon film and made amorphous. Semiconductor device. 2. The semiconductor device according to claim 1, wherein said impurity diffusion preventing conductive layer is formed by ion implantation.