JP2886016B2 - Solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device,
More specifically, interline transfer CCD (charge transfer device)
Solid-state imaging device.

[0002]

2. Description of the Related Art Conventionally, as this type of solid-state imaging device, for example, one shown in FIG. 5 (plan view) has been known (Japanese Patent Laid-Open No. Hei 1-208863). This solid-state imaging device
On the gate insulating film 29 on the surface of the semiconductor substrate, a plurality of rows of the first gate electrodes 21 shown by broken lines in the figure, which are connected in the horizontal direction by the wiring 21a, are formed at predetermined intervals in the vertical direction. A plurality of rows of the second gate electrodes 22 indicated by solid lines in the figure are formed so that the tip portion 22b and the wiring 22a partially overlap each other with an insulating film interposed therebetween. 1st, 2nd
In each rectangular area surrounded by the gate electrodes 21 and 22 and the wirings 21a and 22a, a photoelectric conversion unit 8 as shown in FIGS. 6A and 6B corresponding to aa and bb cross sections is formed. Under the first and second gate electrodes 21 and 22, the vertical direction in FIG.
Is formed in a direction perpendicular to the plane of the drawing.

As shown in FIG. 6A, the right end of the second gate electrode 22 is formed adjacent to the photoelectric conversion section 8. The dual-purpose electrode serves also as the gate electrode of the transfer gate section 14 composed of the first diffusion layer 4 for transferring the charge generated by the light reception at the junction surface to the transfer section 6 on the left side. On the other hand, as shown in FIG. 6B, the first gate electrode 21 is formed such that the right end is separated from the photoelectric conversion unit 8 and cannot be the gate electrode of the transfer gate unit. No charge transfer through the one diffusion layer 4 occurs. FIG.
Reference numeral 7 in (A) and (B) denotes a fifth diffusion layer of a conductivity type opposite to that of the transfer unit 6, and the charge generated in the photoelectric conversion unit 8 is transferred to the transfer unit 6 on the right side.
Plays a role in blocking transmissions to

[0004]

In recent solid-state imaging devices, the size of the lens used is reduced from 1/2 inch to 1 inch.
As the size is reduced to / 4 inch, the size (chip size) of the semiconductor substrate needs to be reduced.
However, when the transfer unit 6 described in FIGS. 6A and 6B is reduced, the maximum amount of charge to be handled is reduced, and when the photoelectric conversion unit 8 is reduced, the sensitivity is reduced. When the length Lt of the cross section in the direction (see FIG. 6A) is reduced, the stability of the potential of the transfer gate portion 14 is impaired. Here, reduction of the transfer unit 6 and the photoelectric conversion unit 8 that causes a decrease in the maximum signal charge amount and a decrease in sensitivity is not preferable, and therefore, there is almost no possibility of realizing the transfer. It is possible to reduce the length Lt of the gate section 14. However, in the conventional solid-state imaging device, the second gate electrode 22 also serving as the gate electrode of the transfer gate section 14 has a rectangular shape as shown in FIG.
(I.e. the width of the electrode), and it W ₂ at the transfer gate section 14, not differ de it W ₂ 'in the transfer section 6
(W ₂ = W ₂ ′), and therefore, the length L of the transverse section of the transfer gate portion 14 while maintaining the stability of the potential.
There is a disadvantage that t cannot be reduced, and consequently the chip size cannot be reduced.

Accordingly, an object of the present invention is to increase the width of this portion of the gate electrode also serving as the gate electrode of the transfer gate portion, thereby stabilizing the potential of the transfer gate portion and vertically transferring charges in the transfer portion. Another object of the present invention is to provide a solid-state imaging device capable of reducing the length of the transfer gate portion and reducing the chip size while maintaining the above efficiency.

[0006]

In order to achieve the above object,
The solid-state imaging device according to the present invention is configured such that a plurality of photoelectric conversion units are formed on a semiconductor substrate so as to form a group of columns at predetermined intervals in a horizontal direction, and charges generated in these photoelectric conversion units are transferred to respective transfer gate units. A transfer portion that receives in the horizontal direction through the device and sequentially transfers in the vertical direction is formed between each of the photoelectric conversion portions, and an insulating film is formed on the transfer portion in order to transfer charges in the vertical direction. In a solid-state imaging device, first and second gate electrodes that partially overlap each other vertically are formed, and one of the first and second gate electrodes is a dual-purpose electrode that also serves as a gate electrode of the transfer gate unit.
The length of the vertical section of the transfer gate portion of the dual-purpose electrode is larger than the length of the vertical section of the gate electrode that is not the dual-purpose electrode, and the length of the vertical section of the dual-purpose electrode and the gate electrode that is not the dual-purpose electrode changes. Where
The vertical section length of the dual-purpose electrode at the transfer section located at the end of the transfer section or outside the transfer section is constant, and is substantially equal to the vertical cross-sectional length of the gate electrode that is not a dual-purpose electrode. It is characterized by becoming.

Further, the photoelectric conversion section may be formed adjacent to the dual-purpose electrode. Further, the photoelectric conversion unit may be formed at a distance from the gate electrode which is not the dual-purpose electrode. Further, the second gate electrode is
The first gate electrode may be formed in alignment with the target formed on the semiconductor substrate in the step of forming the first gate electrode.

[0008]

According to a first aspect of the present invention, in the solid-state imaging device, charges generated in a plurality of photoelectric conversion units formed in a lattice on a semiconductor substrate are transferred to a first transfer unit in a cascade between the photoelectric conversion units. In the first and second gate electrodes, the dual-purpose electrode serving also as the gate electrode of the transfer gate portion has a vertical cross-sectional length in the transfer gate portion that is larger than the vertical cross-sectional length of the gate electrode that is not the dual-purpose electrode. The location where the length of the vertical cross section of the gate electrode changes is located at or outside the end of the transfer portion, and the length of the vertical cross section of the transfer portion of the dual-purpose electrode is constant. In addition, the gate electrode is formed so as to be substantially equal in length to a vertical cross section of the gate electrode which is not a dual purpose electrode. Therefore, the horizontal length of the transfer gate section is shortened, the horizontal length of the transfer section and the photoelectric conversion section is maintained to a certain extent, and the chip size is reduced without deteriorating the maximum signal charge amount or sensitivity characteristics. The effective area of the transfer gate is secured by extending the vertical length of the dual-purpose electrode while maintaining the potential stability in this area, and the capacity of the photoelectric conversion unit per unit voltage amplitude is deteriorated. Can be prevented.
In addition, the location where the length of the vertical section of the dual-purpose electrode and the non-double-purpose electrode, that is, both gate electrodes changes, is located at the end of the transfer section or outside the transfer section, and the vertical direction in the transfer section of both gate electrodes. Since the lengths of the cross-sections are substantially equal to each other, the transfer of the charges in the vertical direction in the transfer section is not hindered. it can.

In the solid-state imaging device according to the second aspect, since the photoelectric conversion portion is formed adjacent to the dual-purpose electrode, an afterimage can be prevented. In the solid-state imaging device according to the third aspect, since the photoelectric conversion unit is formed at a distance from the non-shared electrode, transfer from the photoelectric conversion unit to the transfer unit via the non-shared electrode can be reliably prevented. In the solid-state imaging device according to the fourth aspect, since the second gate electrode is formed by being aligned with the target formed on the semiconductor substrate in the step of forming the first gate electrode, the positional deviation between the two gate electrodes can be reduced. In this device, which can be minimized, and the widths of both electrodes change in the transfer gate portion and the transfer portion, respectively, it is possible to reduce the adverse effect on the element characteristics particularly due to the displacement.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments. FIG. 1 shows an interline transfer CC according to the present invention.
FIG. 3 is a plan view illustrating an example of a D-type solid-state imaging device. This solid-state imaging device has two gate electrodes 2 shown in FIG. 5 except that the planar shape of the overlapping end portions 1b and 2b of the first gate electrode 1 and the second gate electrode 2 is bent in an L-shape.
The structure is substantially the same as that of the conventional example in which 1, 22 form a rectangle. That is, in the solid-state imaging device, a row of the first gate electrodes 1 (see the broken line in the figure) connected in the horizontal direction by the wiring 1a is formed in the vertical direction on the gate insulating film 9 of the semiconductor substrate 3 made of N-type silicon. A plurality of gate electrodes are formed at intervals, and the second gate electrodes 2 (between the first gate electrodes 1) are overlapped with each other via the insulating film 12 (see FIG. 2C) so that the tip 2 b and the wiring 2 a partially overlap. A plurality of rows (see the solid line in the figure) are formed. Each rectangular area surrounded by the first and second gate electrodes 1 and 2 and the wirings 1a and 2a is shown in FIGS. 2A, 2B and 2C corresponding to aa, bb and cc cross sections. As described above, while the photoelectric conversion section 8 is formed as the fourth diffusion layer (N layer), the third diffusion layer 8 is formed below the first and second gate electrodes 1 and 2 via the gate insulating film 9. As a layer (N layer) 6, a transfer section 6 for transferring charges in a direction perpendicular to the plane of FIG. 2 is formed.

As shown in FIG. 2A, the second gate electrode 2 has a right end formed adjacent to the photoelectric conversion unit 8 and a first diffusion layer (P-type) of the photoelectric conversion unit 8. The transfer electrode 14 also serves as a gate electrode of the transfer gate section 14 composed of the first diffusion layer 4 for transferring the charge generated by light reception at the junction surface with the layer 4 to the transfer section 6 on the left side. On the other hand, as shown in FIG. 2B, the right end of the first gate electrode 1 is formed at an interval from the photoelectric conversion unit 8, so that the gate electrode of the transfer gate unit is not used.
No transfer of charges from the first transfer layer 6 to the left transfer section 6 via the first diffusion layer 4 occurs. The second gate electrode 2 is formed in alignment with a target formed on the semiconductor substrate 3 in the step of forming the first gate electrode 1. In FIG. 2, 5 is a second diffusion layer (P layer), 7 is a fifth diffusion layer (P layer) for preventing charge transfer from the photoelectric conversion unit 8 to the right transfer unit 6, 10 is an insulating film of the second gate electrode 2, and 11 is a sixth diffusion layer (P + layer).

The end portions 1b of the first and second gate electrodes 1 and 2,
The portion where 2b is bent in an L shape in FIG.
As shown in FIG. 2 (C) corresponding to the cc section,
The second gate electrode 2 is a combined electrode, as can be seen from the fact that only the right side in the figure is hatching, the width in the left of the transfer section 6 W ₂ '(see FIG. 1) wider than the width W ₂
Thus, it overlaps the transfer gate section 14 on the right side. That is, as shown in FIG. 3E corresponding to the ee section in FIG. 1, the length of the vertical section of the second gate electrode 2 serving as the dual-purpose electrode is W ₂ in the transfer gate section 14.
Exhibits a be considerably greater than the length W ₁ of the longitudinal section of the first gate electrode 1, as shown in FIG. 3 (D) corresponding to dd section of Figure 1, the W ₂ 'in the transfer section 6 In this case, the length is substantially equal to the length W ₁ ′ of the vertical cross section of the first gate electrode 1. The overlap width of the second gate electrode 2, which is a dual-purpose electrode, is as large as W ₂ , that is, the length of the transfer gate section 14 in the horizontal direction, that is, the photoelectric conversion section 8 and the transfer section 6 that form both ends of the transfer gate section 14. (See FIG. 2C) is shorter than its own standard interval.
In addition, the vertical cross-sectional lengths W ₂ , W _{2 of} the second gate electrode 2 as the shared electrode and the first gate electrode 1 as the non-shared electrode shown in FIG.
_{The portion where 2} ′ and W ₁ , W ₁ ′ change is located at the end of the transfer portion 6 as can be seen from the boundary between the hatched portion and the non-hatched portion in FIG.

The solid-state imaging device of the interline transfer CCD type having the above configuration is manufactured as follows. First, boron ions are implanted over the entire surface of an N-type silicon substrate 3 which is a semiconductor substrate, and then a P- layer 4 which is a first diffusion layer is formed by thermal diffusion. The thermal diffusion conditions are 1000 ° C. to 1200 ° C., and the gas type is N ₂ . Next, a predetermined region of the second diffusion layer (P layer) 5 is opened with a photoresist on the P− layer 4, boron ions are implanted, and the second diffusion layer is formed.
(P layer) 5 is formed. After removing the photoresist, a predetermined region of the third diffusion layer (N layer) 6 is opened with the photoresist, phosphorus ions are implanted, and the third diffusion layer (N layer) serving as a charge transfer region is formed. 6 is formed. After removing the photoresist, the fifth diffusion layer (P
A predetermined region of the (+ layer) 7 is opened, boron ions are implanted, and a fifth diffusion layer (P
(+ Layer) 7 is formed. After removing the photoresist, a gate insulating film 9 serving as a first insulating film is formed on the entire surface of the N-type silicon substrate 3.
Is formed by thermal oxidation. The conditions for forming the thermal oxide film are 850
At a temperature between 1 ° C. and 1100 ° C., the gas species is HCl, O ₂ , and N ₂ .

Thereafter, a polysilicon film 1 serving as the first gate electrode 1 is formed on the gate insulating film 9. The conditions for forming the polysilicon film are to deposit the film to a thickness of 0.3 to 0.7 μm using CVD. The deposition temperature is 500 to 700 ° C. and the gas species is monosilane. After that, phosphorus is ion-implanted into the polysilicon film or P
The polysilicon film is doped with phosphorus by the OCl ₃ method. Thereafter, a predetermined region where the first gate electrode 1 is to be formed is covered with a photoresist on the polysilicon film 1, and the polysilicon film 1 is etched away using reactive ion etching. Etching was performed using a microwave plasma etching apparatus and SF ₆ gas. Thereafter, a thermal oxide film 12 on the first gate electrode, which is a second insulating film, is formed by thermal oxidation. The conditions for forming the thermal oxide film are 850-1000 ° C and the gas species is HCl,
H ₂ , O ₂ , and N ₂ .

Thereafter, a polysilicon film 2 as a second gate electrode 2 is formed on the thermal oxide film 12 on the first gate electrode as a second insulating film. The condition for forming the polysilicon film is C
It is deposited to a thickness of 0.3 to 0.7 μm using VD. The deposition temperature is 500 to 700 ° C. and the gas species is monosilane. Thereafter, in order to make the polysilicon film have a specified resistivity, phosphorus is ion-implanted into the polysilicon film or the polysilicon film is doped with phosphorus by the POCl ₃ method. Thereafter, the second gate electrode 2 is formed on the polysilicon film 2 by using a photoresist.
Is formed, and the polysilicon film 1 is etched away using reactive ion etching. Etching was performed using a microwave plasma etching apparatus and SF ₆ gas. Thereafter, a thermal oxide film 10 on the second gate electrode, which is a third insulating film, is formed by thermal oxidation. The conditions for forming the thermal oxide film are 850 ° C. to 1000 ° C., and the gas species is HCl, H ₂ , O ₂ , and N ₂ .

Next, a predetermined region of the fourth diffusion layer (N layer) 8 is opened with a photoresist, phosphorus ions are implanted, and the fourth diffusion layer (N layer) serving as a photoelectric conversion portion is formed. )
8 is formed. At this time, of the first and second gate electrodes 1 and 2, a gate electrode for transferring charges photoelectrically converted by the fourth diffusion layer 8 to the third diffusion layer 6 (in the present embodiment, a dual-purpose electrode). The second gate electrode 2) is ion-implanted by self-alignment, and the other gate electrode (the first gate electrode 1 in this embodiment) is ion-implanted at a position distant by photoresist. A fourth diffusion layer 8 is formed. After the removal of the photoresist, a predetermined region of the P + layer 11 serving as the sixth diffusion layer is opened with a photoresist, boron ions are implanted, and the sixth diffusion layer (P +) serving as a photoelectric conversion unit inversion layer is formed. Layer) 11
To form The purpose of forming the photoelectric conversion inversion layer is to prevent the depletion layer from spreading on the surface of the photoelectric conversion unit and to make the photoelectric conversion unit 8 less susceptible to the generation of charges from the interface state at the boundary between silicon and the oxide film. It is in.

The interline transfer CCD type solid-state imaging device having the above-described structure operates as follows. In this solid-state imaging device, a transfer gate unit 14 that transfers a charge generated by receiving light in each of the plurality of photoelectric conversion units 8 formed in a lattice shape on the semiconductor substrate 3 to each of the left transfer units 6 in a horizontal direction is provided. The length Lt is shorter than the standard length and the transfer unit 6
Of the first and second gate electrodes 1 and 2, the second gate electrode 2, which also serves as the gate electrode of the transfer gate section 14, is defined by the length (ie, width) W of the transfer gate section 14 in the vertical section. _2, it corresponds greater than longitudinal sectional length (that is the width) W ₁ of the first gate electrode 1 is not a combined electrode, the length of the longitudinal section of the transfer unit 6 of the second gate electrode 2 (i.e. the width ) W ₂ ′ is formed so as to be substantially equal to the length (ie, width) W ₁ ′ of the vertical cross section of the first gate electrode 1. Therefore, by shortening the horizontal length Lt of the transfer gate section 14, the horizontal length of the transfer section 6 and the photoelectric conversion section 8 is maintained to some extent large, and the maximum signal charge amount and the sensitivity characteristics are not degraded. while achieving a reduction in size, to ensure the effective area of the transfer gate portion 14 in the width W ₂ of the combined electrode 2 extension, also it can be maintained stable potential at this portion.

The width W ₂ of the dual-purpose electrode 2 in the transfer gate section 14 is extended to a value indicated by an arrow on the horizontal axis in FIG. It can be seen that the capacitance of the photoelectric conversion unit 8 is maintained at a high value near the saturation value, and the deterioration of the capacitance is prevented. Further, the dual-purpose electrode 2 and the non-multipurpose electrode 1 in the transfer unit 6
The width W ₂ of the ', W _1' so are substantially equal, FIG. 4 the gate electrode width ratio W ₁ of the horizontal axis in (A) '/ W _2' is a substantially 1, the longitudinal direction of the charge in the transfer section 6 It can be seen that the transfer efficiency becomes maximum.
The above operations and effects are already achieved by the solid-state imaging device according to claim 1 of the present invention. The above ratio W ₁ ′ / W ₂ ′
Becomes substantially 1 in the transfer section 6 because the first and second gate electrodes 1 and 2
This is because the position where the width 2 changes is located at the end of the transfer unit 6 as shown in FIG. 2 (C). Thus, transfer deterioration can be prevented.

In the above embodiment, the photoelectric conversion unit 8 is
2 (A) and 2 (C), it is formed adjacent to the second gate electrode 2 which is a dual-purpose electrode, and is formed away from the first gate electrode 1 which is a non-multi-purpose electrode as shown in FIG. 2 (B). Therefore, afterimages can be prevented, and transfer of charges from the photoelectric conversion unit 8 to the transfer unit 6 via the non-shared electrode 1 can be reliably prevented. Further, in the above embodiment, the second gate electrode 2 is connected to the first gate electrode 2.
Since the gate electrode 1 is formed in alignment with the target formed on the semiconductor substrate 3 in the step of forming the gate electrode 1, the mutual displacement between the gate electrodes 1 and 2 can be minimized. Thus, the solid-state imaging device of the present invention, in which the widths of both electrodes 1 and 2 change respectively, has an advantage that adverse effects on the element characteristics due to displacement can be reduced.

[0020]

As is apparent from the above description, the solid-state imaging device according to the present invention includes a plurality of photoelectric conversion units on a semiconductor substrate;
Forming a transfer portion that receives the charges generated here from the horizontal direction via the transfer gate portion and sequentially transfers the charges in the vertical direction,
One of the first and second gate electrodes of the transfer portion, which partially overlaps vertically with an insulating film interposed therebetween, is also used as a dual-purpose electrode for the gate electrode of the transfer gate portion. The length of the cross section in the direction is larger than that of the non-shared electrode, and the point where the length of the vertical cross section of the two gate electrodes changes is located at or outside the end of the transfer section, and the transfer of the shared electrode is performed. The vertical section length of the gate is constant and almost equal to that of the non-purpose electrode, so only the horizontal length of the transfer gate is shortened to maintain the maximum signal charge and sensitivity characteristics well. The effective area is secured by extending the width of the dual-purpose electrode while maintaining the stability of the potential at the transfer gate, and the capacity of the photoelectric conversion unit is reduced. Prevent deterioration, the vertical transfer efficiency can be improved in the transfer portion, it is possible to prevent the vertical transfer deterioration in the transfer unit.

Further, if the photoelectric conversion portion is formed adjacent to the shared electrode or formed separately from the non-shared electrode, afterimages can be prevented, and charge transfer to the transfer portion via the non-shared electrode can be ensured. Can be prevented. Further, the second gate electrode is connected to the first gate electrode.
If the gate electrodes are formed by being aligned with a target formed on a semiconductor substrate at the time of forming the gate electrodes, the mutual positional deviation between the two gate electrodes can be minimized, and the adverse effect on the element characteristics due to the positional deviation can be reduced.

[Brief description of the drawings]

FIG. 1 is a plan view showing an embodiment of an interline transfer CCD type solid-state imaging device according to the present invention.

FIG. 2 is a sectional view taken along line aa, bb, cc of FIG. 1;

3 is a sectional view taken along line d-d and e-e of FIG. 1, respectively.

FIG. 4 is a diagram illustrating characteristics of the solid-state imaging device.

FIG. 5 is a plan view showing a conventional interline transfer CCD solid-state imaging device.

6 is a sectional view taken along line aa and bb of FIG. 5, respectively.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... 1st gate electrode, 2 ... 2nd gate electrode, 3 ... Semiconductor substrate (N-type silicon), 4 ... 1st diffusion layer (P-layer), 6 ...
Transfer section (third diffusion layer, N layer), 8 photoelectric conversion section (fourth diffusion layer, N layer), 9 gate insulating film, 10, 12 insulating film,
14 ... Transfer gate section.

Claims (4)

(57) [Claims] 1. A plurality of photoelectric conversion units are formed on a semiconductor substrate so as to form a group of columns arranged at predetermined intervals in a horizontal direction, and electric charges generated in these photoelectric conversion units are transferred via respective transfer gate units. A transfer portion for receiving in the horizontal direction and sequentially transferring in the vertical direction is formed between the photoelectric conversion portions. In addition, in order to transfer the electric charge in the vertical direction, the transfer portion is vertically arranged on the transfer portion via an insulating film. A solid-state imaging device in which first and second gate electrodes overlapping each other are formed, and one of the first and second gate electrodes is a dual-purpose electrode also serving as a gate electrode of the transfer gate unit. Wherein the length of the vertical cross section of the transfer gate portion is larger than the length of the vertical cross section of the gate electrode that is not a dual-purpose electrode, and the vertical cross-section of the gate electrode that is not the dual-purpose electrode and the non-double-purpose electrode. Where the length changes,
The vertical section length of the dual-purpose electrode at the transfer section located at the end of the transfer section or outside the transfer section is constant, and is substantially equal to the vertical cross-sectional length of the gate electrode that is not a dual-purpose electrode. A solid-state imaging device, comprising: 2. The solid-state imaging device according to claim 1 , wherein the photoelectric conversion unit is formed adjacent to the dual-purpose electrode. 3. The solid-state imaging device according to claim 1, wherein the photoelectric conversion unit is formed at a distance from the gate electrode that is not the dual-purpose electrode. 4. The semiconductor device according to claim 1, wherein the second gate electrode is formed in alignment with a target formed on a semiconductor substrate in the step of forming the first gate electrode. Solid-state imaging device.