JP2882618B2 - Distance measuring device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distance measuring apparatus, and more particularly, to a distance measuring apparatus based on an active triangular distance measuring method. The present invention relates to a distance measuring device for calculating a distance to a vehicle.

[0002]

2. Description of the Related Art FIG. 1 shows a conventional active triangulation system.
The light beam projected from the light projecting element 101 is condensed by the light projecting lens 102 and projected toward the subject 103. Light reflected by the subject 103 is converged by a light receiving lens 104 and received by a light receiving element such as a PSD 10.
An image is formed on the light receiving surface 5. Then, a photocurrent corresponding to the incident position of the reflected light spot is supplied from both end electrodes to I4 and I4.
Output as I5. Therefore, the subject distance is obtained by performing arithmetic processing on the photocurrents I4 and I5.

[0006] The distance measurement calculation output thus obtained is represented by one characteristic line L1 proportional to the reciprocal of the subject distance, as shown in FIG. However, the signal light quantity from the subject is usually a very weak photocurrent of about several tens of pA at a long distance, so in practice, the shot current of the photocurrent detection circuit and the photocurrent itself, the noise of the sensor itself, etc. 17 has an uncertainty No indicated by a hatched portion surrounded by the curves L2 and L3.

Therefore, as one of the effective means for reducing the uncertainty No and improving the ranging accuracy, for example, Japanese Patent Application Laid-Open Nos. 1-224617 and 1-244310,
As shown in Japanese Patent Application No. 2-178611 and Japanese Patent Application No. 3-135139, there is a type that accumulates a plurality of (n times) distance measurement calculation output currents in an integrating capacitor.
This is known as means for extracting a weak signal buried in noise with a good S / N ratio. According to this measure uncertainty
It can be reduced to 1 / n1 / ² .

[0005]

By the way, the above means are:
This is a so-called signal processing device applicable to all active distance measuring devices, and is very useful for improving the distance measuring accuracy, but has the following four problems.

<< 1 >> An external capacitor is required to perform the integration process.

<< 2 >> An IC pin for externally attaching the above capacitor to the distance measuring IC is required.
Package becomes large, and the compactness of the camera is impaired in mounting.

<< 3 >> A processing circuit such as a circuit for charging / discharging the capacitor or a circuit for resetting the capacitor is required.
This leads to an increase in the circuit size of C.

<< 4 >> As the external capacitor, a capacitor having a small leakage and a small dielectric absorption characteristic must be selected. However, such a capacitor is not only expensive but also has an outer shape similar to that of a normal ceramic capacitor. It is almost twice as large as this, which is a mounting problem. Here, how the dielectric absorption affects the distance measurement will be described below.

FIG. 18 is an equivalent circuit diagram of such an external capacitor.
19, when a voltage Vref is applied through the switch 107 as shown in FIG. 19A, when the switch is turned off compared to when the switch is turned on as shown in FIG.
The voltage between both ends is reduced by ΔV due to dielectric absorption.

Now, it is assumed that the distance measurement is performed three times within a short time after the power of the AFIC is turned on. First, in the first distance measurement, as shown in FIG. 20, when the power is turned on, the integration capacitor is charged to Vref. In this case V
ref is 0.2V to minimize the influence of dielectric absorption.
Although the value is selected as small as possible, as shown in the figure, at the first stage, it is affected by dielectric absorption and decreases by ΔV of several mV. Also, since the integration capacitor is affected by dielectric absorption even during the integration period, Cs shown in FIG.
In this case, the electric charge is absorbed, and the integrated voltage is slightly reduced.

In the second and subsequent distance measurement, the amount of charge absorbed by Cs is reduced, and as a result, the first distance measurement value is smaller than the second and third distance measurement values. This causes a problem that a distance measurement value smaller by about 10% occurs.
To make matters worse, the characteristic of the dielectric absorption fluctuates non-linearly with temperature, so that it is difficult to consider an effective correction means.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and to provide a distance measuring apparatus which does not require an integrating capacitor when integrating a plurality of distance values in an active triangulation method to measure a distance. To be.

[0014]

As shown in FIG. 1, one of the distance measuring devices according to the present invention has a light projecting means 1 for projecting a pulsed light to an object to be measured. Light emitting means 1
Light control means 2 for projecting the pulsed light from the object to be measured a plurality of times toward the object to be measured, and receiving the reflected light of the pulsed light projected from the object to be measured by the light control means 2 The light receiving means 3 for outputting a photoelectric conversion signal, the analog distance calculation means 4 for receiving the photoelectric conversion signal and calculating the distance to the object to be measured, and the calculation result by the analog distance calculation means 4 A / D conversion means 5 for A / D conversion
In synchronization with the light emission by the light emission control means 2,
And an adder 6 for adding the result of the distance measurement by the / D converter 5 and digitally storing the result.
The distance to the object to be measured is obtained based on the output of the above. The distance to the object to be measured is read by the reading means 7. Distance measuring device of the present invention
The two are light emitting means that emits pulsed light to the object to be measured
And the pulse light from the light emitting means
Light emitting control means for emitting light toward an elephant, and this light emitting control
From the distance measurement target of the pulsed light projected by the means
Receiving means for receiving reflected light of the light and outputting a photoelectric conversion signal
Receiving the photoelectric conversion signal, and the distance to the object to be measured.
Calculating means for obtaining a digital value corresponding to the separation;
To add the above digital value to
Means, and based on the output of the adding means,
The distance to the object to be measured is determined. Measurement of the present invention
Three of the distance measuring devices emit pulse light multiple times to the object to be measured.
Means for reflecting the pulsed light from the object to be measured
Means for receiving the light, and receiving the output of the
Digital data corresponding to the distance to the distance measurement object for each light
Data and send it to the
Addition and accumulation, and based on the accumulation result,
Means for determining the distance at the vehicle.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is an external perspective view of the distance measuring device according to the present invention.

The three-division SPD 11 is used for the IC chip 1 for distance measurement.
2 so as to form a so-called sensor-on-chip. Only the portion of the three-split SPD 11 is mounted without being shielded from light, and the circuit area of the other ranging ICs is shielded from light by the hatched aluminum vapor-deposited film. By adopting the sensor-on-chip configuration in this manner, the sensor and the distance measuring I
The connection of C is made by an internal aluminum wiring, and it is devised to reduce the number of pins of the distance measuring IC in accordance with the effect of the present invention. As a result, the number of pins of the distance measuring IC of this embodiment is
The following 8 pins are sufficient.

[1] Vcc1 terminal: directly connected to battery [2] Vcc2 terminal: connected to stabilized power supply [3] COM terminal: connected to CPU with serial communication terminal of obtained distance measurement data [4] CEN terminal : Connected to CPU with chip enable terminal of AFIC [5] GND terminal: [6] IRD1 terminal: Connected to the base of drive transistor for driving IRED1 [7] IRD2 terminal: Drived for terminal of IRED2 [8] IRD3 terminal: A terminal for driving IRED3, connected to the base of the driving transistor. FIG. 3 shows an example in which the number of terminals in FIG.
Make one RD terminal, configure a stabilized power supply inside the circuit,
This is an example in which a communication line is devised so that a CEN terminal and a COM terminal are commonly used. In this case, as few as four pins can be achieved.

FIGS. 4 and 5 are block diagrams of the internal equivalent circuit of the distance measuring IC 12. The light receiving means and the analog distance measuring means are shown in FIG.
FIG. 5 shows the A / D conversion means and the subsequent parts excluding these two means.
Describe each. The connection between these drawings is indicated by reference numerals A1, A2, A3 and A4, respectively. For the sake of simplicity, the circuit block configuration of FIG. 3 having the least number of IC pins will be described here. Since the distance measuring IC 12 in FIG. 2 is merely an extension of the circuit block configuration, the first embodiment of the present invention will be described with the circuit block configurations in FIGS.

The description will be started from the power-on of the distance measuring IC shown in FIGS. First, when the CEN terminal (see FIG. 5) is lowered to “L”, the PNP transistor Q1 turns on, and the NPN transistors Q2 and Q3
Current flows to the base of the Therefore, the collector of transistor Q2 draws current from the base of transistor Q1. Thus, once the CEN terminal is lowered to "L", positive feedback of the transistors Q1 and Q2 circuit system occurs,
Transistor Q3 keeps on.

The collector of the transistor Q3 is connected to the PW input terminal of the control circuit block 21. When the PW input terminal becomes "L", power is supplied to the control circuit 21. Then, the control circuit 21 activates an internal power-on reset, and thereafter starts a predetermined sequence operation (not shown). The collector of the transistor Q3 is also connected to other circuit blocks (not shown), and power is supplied to each circuit block.

The stabilized power supply circuit 22 has a reference voltage Vcc.
2, Vref1 and Vref2 are generated from the voltage Vcc1 directly connected to the battery. By the way, the battery voltage Vcc1 fluctuates due to the large current drive at the time of projecting the IRED, and the one without the fluctuation of the power supply is the same as the reference voltages Vcc2, Vref1, Vref2.
It is.

The first preamplifier circuit block 23
Made using cc2. PNP transistors Q4 and Q5 form a current mirror circuit,
A current having the same current value as the sink current of the output terminal (2) of the AC (D / A converter) 26 is injected into the cathode of the SPD1 through the collector of the transistor Q5. This current value is set to an amount that can cancel the background light current generated in the SPD 1 by a mechanism described later.

The operation of the above-described preamplifier circuit 23 will be briefly described. Now, assuming that the photocurrent of SPD1 increases by ΔI1 due to light emission, the change is amplified by transistor Q6, and the emitter potential of transistor Q7 rises. Then, the collector potential of transistor Q8 fluctuates in a direction falling from Vcc2, and as a result, the voltage between the base and emitter of transistors Q10, Q11, Q12 increases.
The collector currents of Q11 and Q12 increase. The collector of the transistor Q10 is connected to the emitter of the transistor Q9, and the base of the transistor Q9 is connected to the SPD1.
Connected to the cathode.

Therefore, the collector current of the transistor Q10 becomes 1 / β of the transistor Q9,
The current is fed back to the cathode of PD1, and the balance is achieved when the increase ΔIc1 of the collector current of the transistor Q10 becomes ΔIc1 / β = ΔI1. By the way, since the current mirror circuit of the transistors Q10, Q11, and Q12 is formed, the photocurrent {I1 incident on the SPD1 becomes β} as the collector output of the transistors Q11 and Q12.
It is amplified to I1 and output. The operation of the other two preamplifier circuit sections 24 and 25 is the same, and thus the overlapping description is omitted.

Next, the means for canceling the background photocurrent will be described. The background photocurrent corresponding to each SPD is output to each terminal (3) of each of the preamplifiers 23, 24, and 25, respectively. Therefore, these background photocurrents are converted into first, second, and third DACs (D / A converters) 26, 2
The cancellation operation is performed by feeding back to the feedback terminals (2) of the preamplifiers 23, 24, and 25, respectively, while performing successive comparisons by 7, 28.

Each of the DAC circuits includes a logic circuit section including a 16-bit shift register and a latch shown in FIG. 7, and a current weighting circuit section shown in FIG. The current weighting circuit shown in FIG. 6 is composed of a total of 16 bits, with B15 to B12 corresponding to the MSB at the top of the figure, and B11 to B8 at 2 in the figure.
B7 to B4 are drawn in the third row, and B3 to B0 corresponding to the LSB are drawn in the lowest row. Since the circuits at these stages differ only in the reference current value, only the circuit at the top will be described.

Transistors Q21, Q22, Q24, Q
Assuming that the emitter area of transistors Q28 and Q40 is 1, the emitter area of transistors Q27 and Q41 is doubled, that of transistor Q26 is quadrupled, and transistors Q23 and Q25 are
Is set to 8 times on the pattern. Also, transistors Q21, Q38, Q39, Q4
0 and Q41 constitute a current mirror circuit. Similarly, the transistors Q21 to Q28 form a current mirror circuit.

Therefore, the constant current value of the constant current source IC 9 is 5 μm.
If A, the collector current of Q25 is 5 μA The collector current of Q26 is 5/2 μA The collector current of Q27 is 5/2 ² μA The collector current of Q22 and Q28 is 5/2 ³ μA The collector current of Q40 is ... 5/2 ⁴ μA. The collector current 5/2 ⁴ (= 5/16) μA of the transistor Q40 is the next 4 bits, that is, B
It becomes the basic current for 11 to B8. Note that each of the above currents is hereinafter referred to as a weighted current.

These weighted currents are supplied to the transistors Q34, Q35, Q36, Q3 by the on / off control of the transistors Q30, Q31, Q32, Q33.
7 is output or not output from the terminal (2) as the collector current of 7. Since this terminal (2) is connected to the terminal (2) of the first, second and third preamplifiers 23, 24 and 25 as shown in FIG.
The collector current of the 4,25 transistors Q4 will be drawn.

As described above, the current weighting circuit section has three stages in the same configuration, and as a result, the current output of the terminal (2) is 5 μA, 5/2 μA, 5/2 ² μ.
^{A, 5/2 3 μA,} 5/2 4 μA, 5/2 5 μA, 5 /
^{2 6 μA, 5/2 7} μA, 5/2 8 μA, 5/2 9 μ
A, 5/2 ¹⁰ μA, 5/2 ¹¹ μA, 5/2 ¹² μA, 5 /
Weighted current control up to 2 ¹³ μA, 5/2 ¹⁴ μA, 5/2 ¹⁵ μA becomes possible.

FIG. 7 is a block diagram of a main part of a logic section constituting the first to fourth DACs, and includes 17 D-type flip-flop circuits FF0 to FF16 forming a 16-bit shift register; Latch signal LATCH1 or LATC output from circuit 21 (see FIG. 5)
H2, two-input AND gates A0 to A15 whose gates are controlled to open and close, and 16 D AND gates forming a latch circuit
Type flip-flop circuits F0 to F15 and NOR gates NOR0 to NOR1 for controlling on / off of the gate transistors Q34, Q35, Q36, Q37 and the like in FIG.
5 are connected as shown.

The operation of the above-configured logic circuit will be briefly described.

<1> At resetting The reset signal RS1 from the control circuit 21 is supplied to the terminal (2)
Is applied to each of the D-type flip-flop circuits FF0 to FF0.
FF16 and F0 to F15 are all reset, and the Q output goes to L level. Then NOR gate NOR0
Since all the outputs B0 to B15 of NOR15 to NOR15 become H level, all the gate transistors Q30 to Q33 of the current weighting circuit shown in FIG. 6 are turned on.
Therefore, no current is drawn from the terminal (2) of the current weighting circuit.

<2> When one clock pulse CK1 is output Only the first stage FF 15 of the 16-bit shift register is set. Therefore, only the output of NOR15, that is, only B15 is at L level, so that only the gate transistor Q30 of the current weighting circuit is turned off and the transistor Q3
Since 4 is turned on, a current of 5 μA is drawn from the terminal (2) as described above. In this state, if the background photocurrent generated in the SPD1 (see FIG. 5) in the first preamplifier is larger than the current supplied from the transistor Q5 of the same preamplifier,
The voltage of 10 drops. Then, since this voltage is applied from the terminal (3) of the amplifier to the inverting input terminal of the comparator CP11 of this logic unit via the terminal (3) of the first DAC 26, the output terminal of the comparator CP11 becomes H Become a level. On the other hand, in the opposite case, that is, when the current drawn from the terminal (2) of the current weighting circuit is larger than the background light current of the SPD1 of the first preamplifier, the output of the comparator CP11 of the logic is low. become.

<3> When the latch signal is output When the latch signal LATCH1 of the control circuit 21 becomes active H, one of the input terminals of the AND gates A0 to A15 becomes H via the terminal (5) of the logic unit. become. In this case, since only the FF15 is in the set state, the output of the comparator CP11 is read only to the F15 and stored, that is, latched. As a result, even when the control circuit 21 outputs the clock pulse CK1, the FF 15
CP11 when H level is output from
The on / off control of the control transistor Q30 of the current weighting circuit is performed in accordance with the output of
D conversion can be performed.

<4> Next, when the second clock pulse CK1 is output from the control circuit 21, the FF 14 is set and the operations <2> and <3> are performed. in this case,
Since the control transistor Q31 of the current weighting circuit unit is turned on and off, the drawn current values are different. And FF
The above operation is repeated until 1 is set.

Next, the distance measuring operation in the first embodiment will be described with reference to the timing chart of FIG. First,
When the RS1 terminal of the control circuit 21 (see FIG. 5) becomes L,
All the D-type flip-flop circuits in FIG. 7 are cleared. Next, when one pulse is output from CK1, FF1 is output.
Since the Q output of No. 15 becomes H, the transistor Q30 is turned off, and the output (2) of the current weighting circuit section is -5 μA
Becomes That is, a current of 5 μA is supplied to SPD1 via the current mirror circuit of transistors Q4 and Q5 in FIG. At this time, if the background photocurrent generated in SPD1 is large, transistors Q10 and Q1
The output of the comparator CP11 shown in FIG. At this time, when a pulse is output to the LATCH1 output of the control circuit 21, a trigger is applied to the CK input of F15, and the Q output of F15 stores H. Conversely, if the background photocurrent is smaller than the value set by the weighting circuit, F
The 15 Q outputs store L.

Next, when one more pulse is output from CK1, the Q output of the FF 15 becomes L, Q (the bar which should be originally attached to the upper side of the Q is attached to the lower side in view of the electronic application). Becomes H and returns. Instead, FF1
4, the Q output becomes H, the Q output becomes L, and the next current weight 5 /
2 μA turns on.

Thereafter, the same sequence is repeated, and CK
At the point in time when 16 pulses have been output from 1 and LATCH1, a current equivalent to the background photocurrent of SPD1 is output from the current weighting circuit, and as a result, the background photocurrent is canceled. SPD2 and SPD3 other than the SPD1 are also canceled by the second DAC 27 and the third DAC.

Next, the control circuit 21 outputs a pulse from the IRD0, drives the IRD terminal, and projects a pulse light on the subject. SPD1, SPD2, SPD3 at this time
The reflected light components △ I1, △ I2, △ I3 of FIG.
Output of transistors Q11 and Q12
The output is multiplied by β as shown in FIG.

These amplified pulsed photocurrents are input to the analog ranging calculation means 4 at the next stage, where the diode D1 has a β △ I1 diode D2, a β (△ I2 + △ I3) diode D3 , Β (△ I1 + △ I2) β △ I3 is injected into the diode D4. The transistor Q14 at this time
The collector current of

(Equation 1) However, the collector current of the transistor Q16 is

(Equation 2) Are respectively output, and the sum of the outputs is
A / D, which is folded back by a current mirror circuit consisting of a second DAC 18 and a fourth DAC 30 of the next stage and a comparator CP1
It is supplied to the conversion means 5.

[0042]

(Equation 3) This gives a sonia output according to the incident position of the reflected light spot as shown in FIG. That is, the distance measurement output is proportional to the reciprocal of the subject distance.

The distance measurement output obtained in this manner is represented by A
The way of A / D conversion in the / D conversion means 5 will be described. During the light emission, the distance measurement output is not output. The ranging output is applied to the terminal (2) of the fourth DAC 30 and also to the inverting input terminal of the comparator CP1 to which Vref2 is applied to the non-inverting input terminal. Input to terminal (3). The control circuit 21 uses the reset signal RS2, the latch signal LATCH2, and the clock pulse CK1 to give 16 pulses during light emission in the same procedure as the previous background photocurrent cancellation, thereby completing A / D conversion.

After the end of the A / D conversion, the L
When one pulse is output from the ATCH 3, the adding means 6
Adds the 16-bit digital data from the fourth DAC 30 to the previously held value in response to the pulse. In this case, the data in the adding means 6 has been cleared in advance by the active L pulse of the reset pulse RS1 applied at the time of background light current cancellation.

The above-mentioned A / D conversion and addition are performed every 16 light projections, and the adder 6 integrates the distance measurement outputs. When the 16 accumulations have been completed, the control circuit 21 sets L
A pulse is output from the ATCH 4 and the content stored in the adding means is shifted to the shift register 29. in this case,
At the same time, by shifting the decimal point position to the left by four digits, the average value of the 16 integrated outputs is calculated. And
The shift register 29 outputs the most significant bit from the CEN terminal in synchronization with the clock pulse from the SCLOCK terminal. With such a configuration that the most significant bit is output, the communication time can be reduced according to the required distance measurement accuracy.

That is, if coarse data is sufficient, it is sufficient to read only the upper few bits, and if fine data is required, more data should be read. It becomes possible to provide a possible distance measuring device.

Further, since the integration is performed using the digital value, the time from when the CEN terminal is set to the active L level to when the distance measurement data is output is constant regardless of the distance. Therefore, the communication form is simple, and the reliability can be increased.

When the above communication is completed, the control circuit 21 sets the OFF terminal to active L. Then, the transistors Q3, Q2, and Q1 are all turned off, and the power is turned off by themselves to end all the operations.

FIG. 10 is a block diagram of a main part of a distance measuring apparatus according to a second embodiment of the present invention. In the first embodiment, three SPDs are used as light receiving elements, whereas in the second embodiment, one PSD is used. With the change of the light receiving element from the SPD to the PSD, the light receiving means and the analog ranging calculation means are different, but the parts after the A / D conversion means including the control circuit are completely the same as those in FIG. 5 in the first embodiment. Is the same. Therefore, FIG. 10 and FIG. 5 constitute an internal equivalent circuit of the distance measuring IC in the second embodiment.

In general, a PSD is formed such that a P-type semiconductor is formed on an N-type semiconductor, and an incident position of a reflected light spot is obtained from a division ratio of a resistance component of the P-type semiconductor.
On the other hand, an IC is formed by forming an N-type and a P-type based on a P-type semiconductor. However, usually, the PSD and the IC for distance measurement are composed of separate chips. Therefore, PSD and I
An IC pin for connecting C is required.

Therefore, in this embodiment, as shown in FIG. 11, a plurality of N-type semiconductors 52 are formed on a P-type semiconductor substrate 51.
a, 52b,... and a light receiving element having a configuration in which each N-type semiconductor is jointed with a P-type resistance layer, thereby adopting a novel PSD that can be integrally formed with an IC. Play reduction.

The present chip is set in a light receiving optical system having an opening substantially equal to the size of the light receiving portion as shown in FIG. By using such an optical system, it is possible to prevent a phototransistor operation of a transistor in a circuit portion due to unnecessary light entering other than the light receiving element portion of the IC.

Since the current weighting circuit section and the like in the second embodiment are the same as those in the first embodiment, the overlapping description will be omitted, and the background light canceling sequence will be described with reference to the timing chart of FIG. .

First, the RS1 terminal goes low, and all the D-type flip-flop circuits shown in FIG. 7 are all cleared. Next, when one pulse is output from CK1, FF1 is output.
The 15 Q outputs are H and the Q output is L. At this time, the transistor 30 is turned off, whereby the output of the terminal (2) of the current weighting circuit section becomes -5 μA.

That is, a current of 5 μA is supplied to one channel CH1 of the PSD via the current mirror circuit of the transistors Q4 and Q5 in FIG. At this time, if the background photocurrent generated in CH1 is larger, the base potential of transistor Q6 decreases, and as a result, the collector current of transistor Q11 increases. If the collector current value is larger than the current source I1, the comparator CP of the logic unit (see FIG. 7) shown in FIG.
The output of CP 12 (see FIG. 14) corresponding to 11 indicates H. At this time, when a pulse is output to the LATCH1 output of the control circuit, the CK input of F15 is triggered, and the Q output of F15 stores H. Conversely, if the background photocurrent is smaller than the value set by the weighting circuit, L is stored.

Next, when one more pulse is output from CK1, the FF 15 is reset, the FF 14 is set instead, and the next current weight of 5/2 μA is turned on.

Hereinafter, the same sequence is repeated, and CK
At the point in time when 16 pulses from 1 and LATCH1 have been output, a current equivalent to the background photocurrent of PSD CH1 is output from the current weighting circuit, and as a result, the background photocurrent is canceled. The same applies to the other channel CH2 of the PSD.

Next, the control circuit outputs a pulse from IRD0 and drives the IRD terminal to project pulse light on the subject. At this time, if the reflected light components of the PSDs CH1 and CH2 are △ I1 and △ I2, they are multiplied by β by the sub-PNP transistors Q9 and Q9 'and the transistors Q11 and Q9
It is output from 11 'and input to the diodes D2 and D1 of the analog ranging calculation means 4a at the next stage. At this time, the collector current of the transistor Q14 is

(Equation 4) The signal is turned back by the current mirror of the transistors Q17 and Q18 and supplied to the A / D converter 5 in the next stage.

A / A of the distance measurement output thus obtained is
The A / D conversion method in the D conversion means 5 and the addition means 6
The method of addition is the same as that of the first embodiment, and therefore the description is omitted. However, in the present embodiment, unlike the first embodiment, the A / D conversion and the addition are further performed during one light projection. By performing it a plurality of times, it is devised to reduce an A / D conversion error caused by bit skipping or the like due to noise during A / D conversion. When the light emission ends and the integration of the distance measurement output into the adding means ends, the control circuit 21
A pulse is output from TCH4, and the content stored in the adding means is shifted to the shift register. And SCLOC
The most significant bit is output from the CEN terminal in synchronization with the clock pulse from the K terminal. When the output is completed, the control circuit sets the OFF terminal to L, and sets the transistors Q3, Q2,
Q1 is all turned off, and the power is turned off by itself to terminate the distance measuring operation.

According to each of the above embodiments, the distance measurement output output in synchronization with the emission of the pulse light for distance measurement is A / converted during light emission, and the digital value is stored in the digital memory a plurality of times. Compared with the conventional method of accumulating the distance measurement calculation output in the capacitor, the voltage can be accurately detected without any voltage fluctuation due to the physical properties of the capacitor such as leakage or dielectric absorption. Distance accuracy can be significantly improved. In addition, the number of capacitors and the number of IC pins for externally attaching the capacitors can be reduced.
It is possible to greatly reduce the size and cost of the ranging IC.

[0061]

As described above, according to the present invention, the subject distance obtained by the analog distance measuring means is A / D converted,
Since the distance to the object to be measured is obtained by digitally accumulating the digital data by the adding means, a remarkable effect that an integrating capacitor required in this kind of distance measuring apparatus is not required is obtained. Be demonstrated.

[Brief description of the drawings]

FIG. 1 is a conceptual diagram of a distance measuring apparatus according to the present invention.

FIG. 2 is an external perspective view of a distance measuring apparatus according to the present invention.

FIG. 3 is an external perspective view when the number of terminals in FIG. 2 is further reduced.

FIG. 4 is a diagram showing a light receiving means and an analog distance measuring means in an internal equivalent circuit of the distance measuring IC according to the first embodiment of the present invention.

FIG. 5 is a diagram showing A / D conversion means and subsequent parts in an internal equivalent circuit of the distance measuring IC according to the first embodiment of the present invention.

FIG. 6 is a circuit diagram of a current weighting circuit section in the background light canceling means in FIG. 4;

FIG. 7 is a block diagram of a main part of a logic unit in the background light canceling means in FIG. 4;

FIG. 8 is a timing chart of a distance measuring operation in the first embodiment.

FIG. 9 is a diagram plotting distance measurement calculation outputs with respect to incident positions of reflected light spots in FIG. 8;

FIG. 10 is a diagram showing a light receiving unit and an analog distance measuring unit according to a second embodiment of the present invention.

FIG. 11 is a perspective view of a principal part of a PSD that can be integrally formed with an IC in the second embodiment.

FIG. 12 is a perspective view of a light receiving optical system set in a light receiving unit in the second embodiment.

FIG. 13 is a timing chart of a distance measuring operation in the second embodiment.

FIG. 14 is a circuit diagram showing a comparator included in a logic unit in the background light canceling unit and its periphery according to the second embodiment.

FIG. 15 is an optical path diagram illustrating a conventional active triangulation method.

FIG. 16 is a diagram plotting distance measurement calculation outputs with respect to the reciprocal of the subject distance in FIG. 15;

FIG. 17 is a diagram when noise is weighted in FIG. 16;

FIG. 18 is an equivalent circuit diagram of an external capacitor in a conventional distance measuring device.

FIG. 19 is a diagram illustrating a case where a voltage is applied to a capacitor represented by the equivalent circuit shown in FIG. 18;

FIG. 20 is a diagram showing a change in the capacitor terminal voltage when three distances are measured using the capacitor represented by the equivalent circuit shown in FIG. 18;

[Description of Signs] 1 ... Light emitting means 2 ... Light emitting control means 3 ... Light receiving means 4 ... Analog distance measuring means 5 ... A / D converting means 6 ... Addition means for digitally storing

Claims (3)

(57) [Claims] 1. A light projecting means for projecting a pulse light on a distance measuring object, a light projecting control means for projecting the pulse light by the projecting means a plurality of times toward the distance measuring object, A light receiving unit that receives reflected light of the pulse light emitted by the light emission control unit from the object to be measured and outputs a photoelectric conversion signal; and a distance to the object to receive the photoelectric conversion signal and receive the photoelectric conversion signal. A / D conversion means for A / D converting the calculation result by the analog distance calculation means, and the A / D conversion means in synchronization with the light emission by the light emission control means And an addition means for digitally accumulating the distance measurement results according to (1) and (2), and obtaining a distance to the distance measurement target based on an output of the addition means. 2. A light projector for projecting a pulsed light to an object to be measured.
Steps and The light beam emitted by the light emitting means is transmitted a plurality of times to the object to be measured.
Light emission control means for emitting light toward The above-described measurement of the pulse light emitted by the light emission control means is performed.
Receives reflected light from distance objects and outputs photoelectric conversion signals
Light receiving means, Receives the photoelectric conversion signal and sets the distance to the object to be measured.
Calculating means for obtaining a corresponding digital value; The digital value is added for each light emission and stored digitally.
Adding means for multiplying, The distance measuring object based on the output of the adding means.
A distance measuring device for determining a distance to an object. 3. A method for projecting a plurality of pulses of light onto an object to be measured.
Means, The reflected light of the pulse light from the object to be measured is received.
Means, Receiving the output of the light receiving means, the object to be measured for each light emission
Digital data corresponding to the distance to the object is required
In addition, this is added and accumulated over the above multiple
For calculating the distance to the object to be measured based on the accumulation results
Steps and A distance measuring device comprising: