JP2719086B2 - Photodetector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photodetection technique for removing a component of background light from an output of a photodetector to more accurately detect light.

[0002]

2. Description of the Related Art Light-receiving elements such as silicon photodiodes are used in various consumer products. For example, position detection elements using silicon photodiodes such as PSDs are known.
In recent years, it has been applied to an autofocus system of a camera.

FIG. 4 shows the general principle. Pulse light is projected onto the subject using a light projecting means such as an LED, and spot light reflected from the subject is projected onto the PSD through optical means of a camera. Regarding the position of the spot light on the PSD, if it is just at the center, the ratio between the currents IL1 and IL2 detected from both ends is 1: 1. As this moves to the left or right, the ratio between IL1 and IL2 also increases. It changes according to the position. By this operation, distance information to the subject can be obtained by applying the principle of triangulation.

In this detection method, how to accurately identify and read the information of the spot light from the surrounding background light is a technical point in measuring an accurate distance. FIG. 5 shows an example of a conventional system in which this point is improved. The figure shows one side of the PSD,
The other is omitted in the figure.

When the light emitting means does not emit light, P
The photocurrent component IL1 of only the background light from SD is the transistor Q
1 flows into the transistor Q2. The operational amplifier A1 acts to keep the terminal voltage of the PSD constant regardless of the magnitude of the current from the PSD. During this time, the switch SW is on and IL1 is connected to the base of the transistor Q2.
Is maintained at a base voltage for flowing as a collector current. In the case of this figure, the current is about 0.5 V, and only the current IL1 flows through the diodes D2 and D3 due to the operation of the current mirror circuit formed by using the diode D1A and the transistor Q4. This is a steady state when there is no spot light.

Next, when the pulse light emitter is turned on, the switch SW is turned off, and the transistor C2 is held while the base voltage of the transistor Q2 is stored in the capacitor C. Therefore, only the steady light component IL1 continues to flow through the transistor Q2. Then, the current increase ΔIL1 due to the spot light component flows into the base of the transistor Q3, and h
It is multiplied by fe and flows to the diodes D2 and D3. The final voltage output Vo1 at this time is expressed by the following equation (1).

Vo1 = 2kT / q · ln {(hfe · {IL1 + IL1) / Is)} (1) where q: electronic charge k: Boltzmann constant T: absolute temperature Is: saturation current of diodes D2 and D3 , And the second detection circuit connected to the other end of the PSD is also configured by the same circuit, so that the voltage difference Vod between both channels is obtained.
Then, a voltage proportional to the distance is obtained in a logarithmic form (Equation (2)).

Vod = 2kT / q × ln ((hfe2 · ΔIL2 + IL2) / (hfe1 · ΔIL1 + IL1)) (2) Usually hfe1 · ΔIL1 >> IL1, hfe2 · ΔIL2 >> IL2, and , Hfe1 and hfe2 are approximately equal, the voltage difference Vod is expressed by equation (3).

Vod = 2 kT / q · ln (△ IL2 / △ IL1) (3) After A / D conversion of this, the CPU or
By performing antilogarithmic conversion by an antilogarithmic circuit before A / D conversion, a ratio (△ IL2 / △ IL1) is obtained. The distance is measured using this.

[0010]

In the above-mentioned circuit, the equation (3) holds when the voltage of the storage capacitor is ideally held. However, since the base current component of Q2 actually flows even after the SW is turned off, the collector current of Q2 also decreases steadily, and the accuracy becomes extremely poor. As an attempt to solve this, for example, Japanese Patent Laid-Open No.
42412 ". FIG. 6 shows this, and in principle, the transistors Q5 to Q5
In FIG. 8, a current mirror circuit is formed, and thereby, it is intended to guarantee the charge retention of the storage capacitor. However, this circuit principle is ideally satisfied when the characteristics of the hfe of the transistors Q2 and Q5 are equal. In practice, it is quite difficult to adjust the hfe, so that the accuracy of the final output voltage is maintained. It has become difficult.

The variation in hfe of the transistor is as follows:
It is the cry of a bipolar circuit, and it is extremely difficult to keep it constant throughout the circuit. Further, as shown in FIG. 5, since the operational amplifier A2 that determines the terminal voltage of the storage capacitor C always generates an offset voltage, the base voltages of the transistors Q2 and Q3 cannot be kept equal.
Therefore, the value of the current flowing through the diode D1B and the transistor Q3 deviates from the ideal current mirror state.
This also tends to deteriorate accuracy.

Although the circuit type is slightly different from that of the above example, Japanese Patent Publication No. 4-34087 introduces a method for suppressing the influence of these circuit variations when detecting the position of a PSD or the like. In this method, the light emission / detection cycle is repeated several times for one distance measurement, and the detection circuits connected to the left and right PSDs are alternately replaced each time, and the average is taken.
This is to reduce the variation. However,
This method has a drawback that the circuit structure becomes large and operations such as timing switching become considerably complicated.

In the above-mentioned conventional system, since an analog output is provided, an external A / D converter is always required. For this reason, it is inevitable that the cost will increase,
The time required for the A / D conversion also becomes a bottleneck when trying to speed up the operation of the entire system.

In general, the storage capacitor C is generally used in the order of several .mu.F in order to ensure accuracy, and since it is difficult to integrate this portion into one chip, it is necessary to use an external capacitance element. I have used it. This was a major problem in applications such as cameras, where all parts had to be packed compactly.

SUMMARY OF THE INVENTION In view of the above problems, it is a first object of the present invention to provide a photodetector capable of obtaining a highly accurate detection output, and a second object of the present invention is to make it more compact. I do.

[0016]

In order to solve the above problems, a first photodetector according to the present invention comprises (1) a photodetector for converting incident light into a photocurrent, and (2) an input of an amplifier. An integrator provided between the terminal and the output terminal, wherein the first and second capacitors are provided in parallel with each other;
(3) The background light component contained in the incident light of the photocurrent
And the photocurrent is stored in the second capacitor, and then one of the first and second capacitors is connected in parallel in reverse between the input terminal and the output terminal of the amplifier. And switch means for subtracting the background light component of the photocurrent.

Further, a second photodetector according to the present invention comprises:
(1) a photodetector that converts incident light into photocurrent, and (2) a capacitor is provided between the input terminal and the output terminal of the amplifier,
An integrator that inputs the photocurrent to the input terminal, and (3) the component of the background light included in the incident light of the photocurrent is stored in the capacitor, and the capacitor is connected in reverse parallel between the input terminal and the output terminal of the amplifier. And a switch means for accumulating a photocurrent in the capacitor after the connection to the capacitor and subtracting a background light component from the photocurrent.

Further, the first or second photodetector comprises: (1) discharging means for discharging after the integrator integrates the photocurrent; and (2) comparing the output of the integrator with a predetermined voltage. And (3) a counter that counts from the start of discharge of the integrator until the output of the comparator changes.

The first or second photodetector is characterized in that a plurality of integrators and switch means are provided for each output of the photodetector.

[0020]

In the first photodetector, incident light is converted into a photocurrent by a photodetector, and the photocurrent is integrated by an integrator. Here, the switch means causes the background light component included in the incident light of the photocurrent to be accumulated in the first capacitance of the integrator, the photocurrent to be accumulated in the second capacitance of the integrator, and The first and second capacitors are connected in parallel so that the polarities of the charges stored in the and the second capacitors are opposite to each other, and the background light component of the photocurrent is subtracted. Thus, a true signal component from which the background light component is removed from the photocurrent is obtained. In the second photodetector, the incident light is converted into a photocurrent by a photodetector, and the photocurrent is integrated by an integrator. Here, the switch means
The component of the background light included in the incident light of the photocurrent is accumulated in the capacitance of the integrator, and the photocurrent is accumulated in the capacitance after the capacitance is connected so that the polarity of the accumulated charge is reversed. Of these, the component of the background light is subtracted. Thus, a true signal component from which the background light component is removed from the photocurrent is obtained.

When a configuration having a comparator, a counter, and the like is provided, the output of the integrator changes with the discharge time constant from the start of discharge. The time required for the output of the comparator to change to a predetermined voltage is proportional to the logarithm of the accumulated electric charge (the photocurrent component from which the background light component has been removed) of the integrator.
Therefore, by counting this time, the photocurrent component from which the background light component has been removed from the counter is logarithmically compressed and obtained as a digital value.

When a plurality of systems are provided for the output of the photodetector, a photocurrent component from which the background light component has been removed can be obtained for each system.

[0023]

An embodiment of the present invention will be described with reference to the drawings.
FIG. 1 shows a circuit configuration of the most basic embodiment, which is formed monolithically on a semiconductor substrate.

This photodetector comprises a photodetector D1, an amplifier A1, integrating capacitors C1 and C2, switches S11, S12 and S21.
24, S31, and S41.

The photodetector D1 receives incident light and converts it into a photocurrent. For example, a semiconductor photodetector such as a photodiode or a PSD is used. The amplifier A1 and the integration capacitors C1 and C2 constitute an integrator and accumulate the photocurrent from the photodetector D1. This capacity C1, C
2 has one terminal connected to the input terminal of the amplifier A1,
The other terminal is connected to the output terminal of the amplifier A1 and the switch S11,
The connection is made via S12 and S21 to S24. The symbol “ten” or “one” in the figure indicates the amplifier A1 for easy understanding of the operation.
Indicates the polarity of the charge when a current flows into the input terminal of the capacitor, and does not indicate the polarity of the capacitor itself. In this circuit, since the integration operation time is on the order of several microseconds, the capacitances C1 and C2 are set to very small values of several pF, and are formed monolithically on the substrate.

Switches S11, S12, S21-24, S31, S
Reference numeral 41 denotes a switch constituted by a MOS transistor, which is turned on and off at both ends by a pulse from a control circuit (not shown). The switches S11 and S12 are for controlling the connection of the integration capacitance C1, and the switches S21 to S24 are for controlling the integration capacitance C1.
The switch S41 is for discharging or resetting the integration capacitors C1 and C2, and the switch S31 is for turning on and off the input of the amplifier A1.

FIG. 2 shows a configuration in which a two-dimensional PSD is used for the photodetector D1 and the above-described circuit is provided for each output of the PSD. Here, the comparator A2 to the output of the amplifier A1, counter Q11, the circuit 110 ₁ outputs a digital value is obtained by further providing a register Q12, 110 ₂ and then, these circuits 110 _1, 110 ₂ subtraction circuit the output of Q13 , The above-mentioned ratio (△ IL2 / △ IL1) is obtained.

Further, a resistor R1 is provided in series with the switch S41, so that discharging and resetting of the capacitance are performed with a constant time constant. This resistor R1 can be replaced by a MOS switch.

The comparator A2 compares the output voltage of the amplifier A1 with a reference voltage Vref. The counter Q11 is
After the integration of the amplifier is started, the time until the output signal of the comparator changes is measured by the reference clock, and the reset time of the integrator is measured to detect the logarithmic conversion information of the true value of the optical information. The register Q12 is for holding the count value of the counter Q11.

It should be noted that a light projecting means such as an LED for projecting a spot light on a subject is omitted in the figure. This LED projecting a pulsed spot light between t ₃ ~t ₄ in FIG.

FIGS. 3 (a) to 3 (h) show control signals to the above switches. When the switches are high, the switches are on, and when they are low, the switches are off. (I) and (j) show the outputs of the amplifier A1 and the comparator A2. An operation example of the above circuit will be described with reference to this timing chart.

In the initial state, the switch S31 and the reset switch S41 of the integrator are both on and fixed in the reset state. Also, the switch S11 is on, the switch S12 is off, the switches S21 and S24 are on,
Switches S22 and S23 are off. No light shines on the measurement object from a specific light source such as an LED,
When only natural light is irradiated, the reset switch S41 of the amplifier A1 is turned off. Perform background light capture from the time t ₁ to a predetermined time period T1. At time T1 until time t ₂ in this state, a current corresponding to the background light component of the photocurrent of the photodetector D1 is stored in the capacitor C2. After the elapse of the period T1, the switch S31 is turned off, and the accumulation operation to the capacitor C2 ends. At the same time the switch S21, the switch S24 is also turned off (t ₂ in the figure).

Further, the switch S11 is turned off and the switch S
12 is turned on, further resets the integral capacitor C1 by the switch S41 is briefly turned on to prepare for the next operation (t ₂ ~t ₃ in the figure).

At the same time as the spot light is emitted from the LED toward the object to be measured, the switch S31 is turned on at this time (t _{3 in the} figure). Thereafter, a photocurrent corresponding to the sum of the component of the spot light and the component of the background light is stored in the storage capacitor C1 during the time T2. After the period T2, by the turned off again switches S31, cumulative effect is stopped (t ₄ in FIG.).

Next, the switch S22 is turned on and the capacitance C2
Is connected to the input of the amplifier A1, and at the same time, the switch S23 is also turned on for the + terminal, and the reference power supply V
is connected to the ref, the charge accumulated in the capacitor C2 until it flows toward all capacitance C1 (t ₅ in FIG.). At this time, the capacitors C1 and C2 are connected in parallel, and the total charge amount Qt stored therein is expressed by the following equation.

Qt = − (Vref + (Id × T1 / C2) −Vref) × C2 + (Vref + ((lsh + ld) × T2 / C1) −Vref) × C1 = − (Id × T1) + ((lsh + ld) × T2) ... (4) where Vref: reference reference voltage Ish: spot light component photocurrent Id: background light component T1, T2: is the integral time, (Ish + Id) are light detected at t ₃ ~t ₄ in FIG. This is the photocurrent of the device D1. If T1 = T2, Qt = Ish × T1 (5), and only the charge amount of the spot light component is stored in the capacitors C1 and C2. At this time, the output voltage "I
sh × T1 / (C1 + C2 ) "is the true value of the spot light component, this value is obtained in a digital value which at t ₄ onward in FIG by detecting the like A / D converter. Amplifier A1
Is not shown in the equation, but the capacitance C
It decreases according to the value of 1, C2.

[0037] Up to this point, the circuit of FIG. 1 and FIG. 2 is the same operation, the true value of the spot light component from the amplifier A1 will be obtained at t ₅ onward in FIG. Thereafter, the circuit of FIG. 2 converts the digital value into a digital value as follows.

[0038] In t ₅ in Figure, with the turning on the reset switch S41, to start the counting operation of the counter Q11 at this pulse. The time Tr at which the output of the amplifier A1 returns to the reference voltage Vref is expressed by the following equation.

Tr = R1 × (C1 + C2) × ln (Vo / Vref) (6) where Vo: output of the amplifier A1 immediately before reset.

That is, the reset time Trst is a value obtained by multiplying a logarithmic conversion value of a value obtained by dividing the voltage Vo proportional to the amount of incident light by Vref by a constant. And the amplifier A1
Becomes equal to Vref, the comparator A2 generates a signal to stop the operation of the counter Q11. The data of the counter Q11 at this time is saved in the register circuit Q12.

That is, the counter value N saved at this time is expressed by the following formula using the counter basic clock time To: N = Tr / To = R1 × (C1 + C2) × ln (Vo / Vref) / To (7) .

Thus, the circuits 110 ₁ and 110 _{2 of} FIG.
Thus, the logarithmic conversion value of the true value of the spot light component can be obtained without using a special logarithmic converter or the like. The adder / subtractor Q13 calculates the difference between the count results N1 and N2 of the _two circuit blocks 110 ₁ and 110 ₂ (the following equation).

N1−N2 = R1 × (C1 + C2) × ln (Vo1 / Vref) / To−R1 × (C1 + C2) × ln (Vo2 / Vref) / To = R1 × (C1 + C2) × In (Vo1 / Vo2) / To (8) Thus, a value proportional to the position of the spot light on the PSD,
That is, the ratio between Vo1 and Vo2 can be obtained in logarithmic form. Since this is already a digital value, it can be immediately taken into an external CPU for data processing.

The true value of Vo1 / Vo2 may be taken out to an external CPU by performing antilogarithmic conversion on the value obtained by the equation (8) in consideration of a constant term, or this circuit may be provided. A ROM table may be prepared on-chip in the obtained solid-state image pickup device, and an antilogarithmic conversion may be performed in real time to obtain a true value of Vo1 / Vo2.

As described above, according to the present invention, the photocurrent including the components of the spot light and the background light is integrated, and the subtraction value is obtained therefrom. Therefore, the accuracy is determined by the ability of the integrator. In general, if a predetermined gain can be secured for an amplifier constituting an integrator, the accuracy of the integrator depends on the integral capacitance value. Since it is easy to keep the variation of the capacitance value formed on-chip small,
Variations in the integration capacitances C1 and C2 can also be suppressed. Therefore, the true spot light component can be obtained with high accuracy by subtracting the background light component.

In applications where the above circuit is used, the integration time is on the order of several μsec. Therefore, since the integrated charge amount does not become extremely large, the order of several pF is sufficient for the feedback capacitances C1 and C2 of the amplifier A1. Conventionally, it was necessary to use a capacitor having a large value such as several μF, and it was impossible to incorporate the capacitor. However, in the present invention, it is possible to configure a function by incorporating a capacitor having a small value of about several pF. Since it is possible, it can be made into one chip, and the whole circuit can be made compact.

Further, in the circuit of FIG. 2, the capacitors C1 and C2
Utilizing the fact that the time at which the output of the integrator becomes a predetermined value due to the discharge is proportional to the logarithm, the detection output is obtained as a digital logarithmic value.Therefore, an analog or digital divider is not required, and The scale can be relatively small. Also, since it is obtained as a digital value, the external A /
No D converter is required. Therefore, if a system is configured using this circuit, the overall cost can be significantly reduced.

The present invention is not limited to the above-described embodiment, but can be variously modified.

[0049] In the above embodiment has been adapted to remove components of the stored background light at t ₅ in Figure in the capacitor C2 after accumulating photo current to the capacitor C1, the switch S22 and switch t ₃ in FIG. S23 is turned on, and may be accumulated t ₄ subsequent photocurrent figure capacitor C1, C2 in advance remove components of the background light. In this case, the switch S22 and the switch S23 becomes t ₃ after the ON state in FIG. (FIG. 3 (f), the
(G)).

Although two types of integration capacitors are provided, one for storing background light and the other for storing photocurrent, a plurality of types may be provided. In this case, the saturation of the integrator can be suppressed by making the integration capacitance switchable according to the size of the background light.
Further, if the output of the integrator is not saturated, FIGS.
It is also possible to omit the capacitor C1 and the switches S11 and S12 from the configuration shown in FIG. In this case, the integrator includes a capacitor C2 between the input terminal and the output terminal of the amplifier A1.
Are provided in parallel, and the parallel connection between the capacitor C2 and the amplifier A1 can be reversed by appropriate on / off operations of the switches S21 to S24. That is, in FIG. 3, during the time T1 from time t ₁ to time t _2, the accumulated current corresponding to the background light component of the photocurrent of the photodetector D1 to the capacitor C2. Then, in this case, the time t ₃ after the switch S22 and the switch S23, respectively as an on-state, are connected in parallel and a capacitor C2 and the amplifier A1 to the contrary to the case of the time T1. Then, from time t ₃ to time t
_During the time T2 up to ₄ , a photocurrent (spot light component + background light component) is stored in the capacitor C2 in which the background light component has already been stored so that the polarity is opposite to that at the time T1. . Thus, after time t ₄ , only the true spot light component of the photocurrent from which the background light component has been removed is accumulated in the capacitor C2 and output from the integrator, and the offset of the amplifier A1 is almost completely eliminated. Compensated.

The above structure may be connected to both ends of a position detecting element such as a PSD, one block at a time, and the position may be detected from the output ratio.
A plurality of 10 _n (n = 1, 2,...) May be arranged in an array.

[0052]

As described above, according to the present invention, of the photocurrent, the background light component of the incident light is integrated and held, and the held background light component is subtracted from the photocurrent to obtain the background light component. Since the component of the photocurrent from which the component has been removed is obtained, true optical information can be obtained from the incident light, and various measurements using more accurate light can be performed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration diagram of an embodiment.

FIG. 2 is a diagram showing a configuration diagram of an embodiment in a case where an output of a digital value is obtained.

FIG. 3 is a diagram showing a timing chart of the embodiment.

FIG. 4 is a diagram showing an explanatory diagram of a conventional example.

FIG. 5 is a diagram showing a configuration example of a conventional example.

FIG. 6 is a diagram showing a configuration example of a conventional example.

[Explanation of symbols]

D1: photodetector, A1: amplifier, C1, C2: integration capacity, S11, S12, S21 to 24, S31, S41: switch, A
2 ... Comparator, Q11 ... Counter, Q12 ... Register, Q13 ...
Addition / subtraction circuit.

Claims (4)

(57) [Claims] 1. A photodetector for converting incident light into a photocurrent, and first and second capacitors are provided in parallel between an input terminal and an output terminal of an amplifier. An integrator to be input to an input terminal, a component of the background light included in the incident light of the photocurrent is stored in the first capacitor, and the photocurrent is stored in the second capacitor; A switch configured to connect one of the first and second capacitors in parallel between the input terminal and the output terminal of the amplifier in reverse and subtract the background light component of the photocurrent Means, and a light detection device. 2. A photodetector for converting incident light into a photocurrent, a capacitor provided between an input terminal and an output terminal of an amplifier, and an integrator for inputting the photocurrent to the input terminal; After the component of the background light included in the incident light of the photocurrent is accumulated in the capacitor, and the capacitor is connected in reverse parallel between the input terminal and the output terminal of the amplifier, the photocurrent is reduced. Switch means for accumulating the capacitance and subtracting the background light component from the photocurrent. 3. A discharging means for discharging after the integrator integrates the photocurrent, a comparator for comparing an output of the integrator with a predetermined voltage, and the comparator from the start of discharging of the integrator. 3. The counter according to claim 1, further comprising: a counter that counts until the output changes.
3. The photodetector according to claim 1. 4. The photodetector according to claim 1, wherein the integrator and the switch are provided in a plurality of systems with respect to the output of the photodetector.