JP2880351B2 - Analog signal input / output device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog signal input / output device which converts an input analog signal into a digital signal, takes it into a processor, converts a digital signal output from the processor into an analog signal, and sends it out. It is.

[0002]

2. Description of the Related Art FIG. 11 is a block diagram showing a conventional analog signal input / output device. In the figure, 1 is a processor for controlling the analog signal input / output device, 2 is a read-only memory (hereinafter referred to as ROM) storing a program for the processor 1, and 3 is a processor for executing the program. This is a temporary memory (hereinafter, referred to as a RAM) in which the data at the time is stored. 4 receives an externally supplied analog signal and converts it into a digital signal;
An analog input unit 5 sends the digital signal from the processor 1 to the processor 1, converts the digital signal into an analog signal, and sends the converted signal to the outside.

FIG. 12 is a block circuit diagram showing the internal configuration of the analog input section 4. In FIG. 12, 6 is an input terminal to which an external analog signal is input, 7 is an operational amplifier for amplifying the analog signal, 8 is a volume for adjusting the offset of the operational amplifier 7, 9 is a volume for adjusting the gain, 10 is an A / D converter for converting the output signal of the operational amplifier 7 from analog to digital (hereinafter referred to as A / D conversion), and 11 is A buffer for holding a digital signal from the A / D converter 10 until the processor 1 takes in the data. An output terminal 12 outputs the digital signal.

FIG. 13 is a block circuit diagram showing the internal configuration of the analog output section 5. In FIG. 13, reference numeral 13 denotes an input terminal to which a digital signal from the processor 1 is input;
Is a latch circuit for latching the digital signal, and 15 is a digital-to-analog conversion (hereinafter, D /
A D / A converter for performing A / A conversion), an operational amplifier 16 for amplifying the analog signal from the D / A converter 15, a volume 17 for adjusting the offset of the operational amplifier 16,
Reference numeral 18 is a volume for gain adjustment, and reference numeral 19 is an output terminal from which an analog signal amplified by the operational amplifier 16 is output.

Next, the operation will be described. An analog signal supplied from the outside is input to the input terminal 6 of the analog input unit 4, amplified by a predetermined gain in the operational amplifier 7, and sent to the A / D converter 10. A / D converter 1
At 0, the analog signal amplified by the operational amplifier 7 is converted into a digital signal and sent to the buffer 11,
Captures the digital signal held in the buffer 11. The digital signal output from the processor 1 is input to the analog output unit 5 and is latched by the latch circuit 14. The digital signal latched by the latch circuit 14 is converted into an analog signal by a D / A converter 15 and sent to an operational amplifier 16, amplified with a predetermined gain, and output from an output terminal 19 to the outside. Therefore, it is necessary that the value of the digital signal taken into the processor 1 exactly corresponds to the value of the analog signal input to the analog input unit 4 and the value of the analog signal output from the analog output unit 5 The value must also correspond exactly to the value of the digital signal output from the processor 1.

Therefore, in the analog input section 4, the offset of the operational amplifier 7 is adjusted by the volume 8 and the gain of the operational amplifier 7 is adjusted by the volume 9, so that the value of the output digital signal is Corresponds exactly to the value. In order to adjust these potentiometers 8 and 9, a high-precision voltage generator is connected to the input terminal 6 of the analog input unit 4 so that accurate 1 V and 5 V are adjusted.
A voltage of 8 V is applied so that the value of the digital signal taken in by the processor 1 when 1 V is applied becomes “400” and the value of the digital signal taken in by the processor 1 becomes 5600 when 5 V is applied. And 9
Perform positioning.

On the other hand, in the analog output section 5, the offset of the operational amplifier 16 is adjusted by the volume 17 and the gain of the operational amplifier 16 is adjusted by the volume 18, so that the value of the output analog signal is Is exactly matched with the value of When adjusting these volumes 17 and 18, a high-precision load resistor of 250 Ω is connected to the output terminal 19 of the analog output unit 5, and a high-precision voltage measuring device is connected to both ends thereof. The values are “400” and “360”
The digital signal of "0" is latched in the latch circuit 14,
The instruction of the high-accuracy voltmeter at the time of latching the digital signal of “400” is set to be exactly 1 V, and “360”
Positioning of the volumes 17 and 18 is performed so that the high-precision voltage measuring device indicates exactly 5 V when the digital signal of the value 0 "is latched.

[0008]

Since the conventional analog signal input / output device is constructed as described above, the volumes 8, 9 and 1 are manually adjusted using a driver or the like.
It is necessary to adjust 7, 18 and these offset adjustment and gain adjustment are correlated with each other, and it takes a lot of time to complete the adjustment. Volume 8, 9, 1
Since the moving parts 7 and 18 have movable parts, there is a problem that the set positions are shifted due to vibration and impact during transportation.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and it is intended to reduce a conversion error caused by hardware caused by a variation in resistance, a variation in semiconductor, and the like used in many analog input / output circuits. It is an object of the present invention to obtain an analog signal input / output device that can be absorbed by software processing.

[0010]

An analog according to the present invention is provided.
The signal input / output device digitizes the input analog signal.
Analog input section for converting
Processor to capture the signal and input to the analog input section
One analog signal based on the two analog signals
Enter the value of the digital signal corresponding to the
Force data, the reference digital input data
Subtract the other digital input data (a) from (b)
Obtained measured data difference value (B), one of the analogs
Digital input data to be set in association with the signal
And should be set in association with the other analog signal
Digital set between digital input data
Setting data difference value (A) of input data and
From the span value set in the
Obtained by subtracting the correction value of digital input data (b)
The correction coefficient such as the reference offset value (C) is
The procedure for calculating the correction coefficient for the
Switch, the actual measurement data difference value (B), and the setting
Data difference value (A) and reference offset value (C)
And a non-volatile memory for storing the corrected correction coefficient.
The processor stores the set data difference value (A) in the actual measurement data.
Correction coefficient (A / A) obtained by dividing by the data difference value (B).
B) is multiplied by the acquired digital signal (X), and
To the multiplication result (A.X / B)
By adding (C), the acquired digital signal
The value is corrected. Other analogs according to the invention
The signal input / output device is a processor that outputs digital signals.
And the digital signal output from the processor
An analog output section for converting to an analog signal;
Two when a predetermined analog signal is output from the output unit
Of one digital signal based on the digital signal of
When the value is used as the reference digital output data,
The other digital output from the digital output data (d)
Measured data difference value obtained by subtracting data (c)
(D) is set in association with the one analog signal.
Digital output data to be output and the other analog signal
Of digital output data to be set in association with
Setting data of digital output data set in between
Difference value (E) and the reference de Ijitaru output data (d)
Of the span value set in the digital output data from
The reference offset value (F) obtained by subtracting the correction value
Correction factor for causing the processor to calculate the corrected correction factor.
Switch for instructing the procedure for calculating the number
Data difference value (D), setting data difference value (E) and reference
Non-volatile for storing correction coefficient such as offset value (F)
Memory, and the processor has the measured data difference.
Divided value (D) divided by the set data difference value (E)
Digital correction factor (D / E)
The signal (X) is multiplied, and the result of this multiplication (D · X / E)
By adding the above reference offset value (F) to the
This is to correct the value of the digital signal to be performed.

[0011]

[Action] processors in the present invention, according to the procedure indicated by the operation of the switch, the analog input unit Ah
Alternatively, a correction coefficient for absorbing the conversion error due to the hardware of the output unit by software is calculated and stored in a non-volatile memory.
An analog signal whose value can be easily adjusted by correcting the value of the captured digital signal or the value of the output digital signal using the correction coefficient, and whose set value does not fluctuate due to vibration, etc. Implement an input / output device.

[0012]

【Example】

Embodiment 1 FIG. Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. In FIG. 1, reference numeral 2 denotes a ROM, and reference numeral 3 denotes a RAM, which are the same as or corresponding to those in the related art having the same reference numerals in FIG. Further, reference numeral 20 denotes an analog circuit different from the one denoted by reference numeral 4 in FIG. 11 in that the internal configuration of the operational amplifier 7 excludes a volume 8 for offset adjustment and a volume 9 for gain adjustment, as shown in FIG. As shown in FIG. 3, reference numeral 21 denotes an input section, and an offset adjustment volume 17 and a gain adjustment volume 1 of the operational amplifier 16 are shown in FIG.
This is an analog output unit different from that denoted by reference numeral 5 in FIG.

Reference numeral 22 denotes a correction coefficient for processing and absorbing the conversion error caused by the hardware of the analog input section 20 and the analog output section 21 by software. Alternatively, the processor is different from the processor denoted by reference numeral 1 in FIG. 11 in that it has a function of correcting the value of a digital signal output to the analog output unit 21 based on the correction coefficient. Reference numeral 23 denotes a switch for instructing the processor 22 in the procedure of the operation of calculating the correction coefficient. The switch 23 is tilted to one of three states of left, center, and right to adjust the analog input unit 20 and perform normal processing. Switch A for instructing the adjustment of the analog output unit 21, and five momentary switches for setting input values, instructing increment / decrement of digital signal values, and instructing storage in a non-volatile memory described later. It is composed of a B switch to a F switch by a push button switch. Reference numeral 24 denotes a non-volatile memory such as an electric rewritable programmable ROM (EEPROM) for storing the correction coefficient calculated by the processor 22.

Next, the operation will be described. Here, FIG.
5 is a flowchart showing a procedure of an adjustment operation of the analog input unit 20, and FIG. 5 is a flowchart showing a flow of processing of the processor 22 at that time. In step ST1, the operator tilts the A switch of the switch 23 to the left to select adjustment of the analog input unit 20. Next, in step ST2, a high-precision voltage generator is connected to the input terminal 6 of the analog input section 20, and in step ST3, the voltage of the high-precision voltage generator is set to exactly 1 V.
The B switch among the switches 23 is pressed. When the processor 22 detects that the switch A has been tilted to the left in step ST11, the processor 22 determines in step ST12 whether the switch B has been pressed. When it is detected that the B switch has been pressed, the value of the digital signal converted by the A / D converter 10 is stored in the buffer 1 in step ST13.
1 and temporarily stored as "a". The value “a” is obtained by superimposing a conversion error by the hardware of the analog input unit 20 on a digital signal value corresponding to an accurate 1 V of the analog signal.

Next, in step ST5, the operator changes the setting of the voltage of the high-precision voltage generator to exactly 5 V, depresses the switch C of the switch 23 in step ST6, and further switches the switch 23 in step ST7. F
Press the switch. The processor 22 determines in step ST
When it is detected at step 14 that the C switch of the switch 23 has been pressed, the value of the digital signal converted by the A / D converter 10 is fetched from the buffer 11 and temporarily stored as "b" at step ST15. The value “b” is obtained by superimposing a conversion error caused by hardware of the analog input unit 20 on a digital signal value corresponding to an accurate 5 V analog signal. Next, step S
If the depression of the F switch is detected at T16, step S
Using the values “a” and “b” temporarily stored in T17, the correction coefficient “A”,
"B" and "C" are calculated, and the nonvolatile memory 2
4 is stored. Note that "A" is one analog signal
Digital input data to be set in association with
Digit to be set corresponding to the other analog signal
Digital input set between the
“B” corresponds to one of the data
The value of the digital signal corresponding to the analog signal is
If the input data is
From the data (b), the other digital input data (a)
"C" is equivalent to the measured data difference value obtained by subtraction.
From the span value set in the digital input data.
It is obtained by subtracting the correction value of the reference digital input data (b).
Corresponding to the reference offset value (C).

[0016] A = 3200 B = b-a C = 3600- {3200 / (b-a)} × b

FIG. 6 is a flowchart showing a procedure of an adjusting operation of the analog output unit 21, and FIG. 7 is a flowchart showing a processing flow of the processor 22 at that time. In step ST21, the operator tilts the A switch in the switch 23 to the right to select adjustment of the analog output unit 21. Next, in step ST22, a high-precision load resistor of 250Ω is connected to the output terminal 19 of the analog output section 21, and in step ST23, a high-precision voltage measuring device is connected to both ends thereof. Press. The processor 22 proceeds to step ST31.
When it is detected that the A switch has been tilted to the right, it is determined in step ST32 whether or not the B switch has been pressed. B
When the switch is pressed, "40" is set in step ST34.
The digital signal having a value of "0" is sent to the latch circuit 14 of the analog output unit 21 to be latched, and is temporarily stored as "x". As a result, a current of about 4 mA flows through the high-precision load resistor. The indication of the high-accuracy voltmeter is about 1V.

Next, in step ST25, the operator presses the D switch or the E switch among the switches 23 until the instruction of the high-accuracy voltage measuring device accurately becomes 1V. Here, the D switch is for increasing the output voltage of the analog output unit 21, and the E switch is for decreasing it. When the processor 22 detects that the D switch has been pressed in step ST37, the processor 22 temporarily stores the "x" in step ST38.
Is incremented and latched by the latch circuit 14 to increase the output voltage of the analog output unit 21. When the depression of the E switch is detected in step ST39, the value of “x” is changed in step ST40. While decrementing, the output voltage of the analog output unit 21 is lowered by latching it in the latch circuit 14.

After the instruction of the high-accuracy voltmeter is accurately set to lV, the operator switches the switch 2 in step ST26.
Press the C switch in 3. When the processor 22 detects in step ST35 that the C switch has been pressed, in step ST36 the value temporarily stored as " x " is transferred to "c" and temporarily stored, and the digital value of "3600" is stored. The signal is sent to the latch circuit 14 of the analog output unit 21 to be latched, and is temporarily stored as "x" at the same time. As a result, a current of about 20 mA flows through the high-precision load resistor, and the indication of the high-precision voltmeter becomes about 5 V. Next, the operator proceeds to step S
At T27, the D switch or the E switch of the switch 23 is pressed down until the instruction of the high-precision voltage measuring device accurately reaches 5V. The processor 22 sets D in step ST37.
When the switch press is detected, the value of “x” is incremented in step ST38, and E is incremented in step ST39.
When the switch press is detected, the value of “x” is decremented in step ST40. At the same time, the value is latched by the latch circuit 14 to increase or decrease the output voltage of the analog output unit 21.

After the instruction of the high-accuracy voltmeter has accurately reached 5 V, the operator sets the switch 2 in step ST28.
Press the F switch in 3. When the processor 22 detects in step ST41 that the F switch has been pressed, in step ST42 the value temporarily stored as "x" is transferred to "d" and temporarily stored. And "d", the correction coefficients "D", "E", and "F" are calculated according to the following equations, and are stored in the nonvolatile memory 24. "D" stands for
The value of one digital signal is used as the reference digital output data
, The above-mentioned reference digital output data (d)
From the other digital output data (c)
“E” corresponds to one analog signal
Digital output data to be set in association with
Data to be set in association with the other analog signal
Digital set between the digital output data
Equivalent to the set data difference value of output data, "F" is reference
Digital output data from digital output data (d)
Is obtained by subtracting the correction value of the span value set in
It corresponds to a quasi offset value.

D = dc E = 3200 F = d − {(dc) / 3200} × 3600

After the above adjustment processing is completed, when the operator returns the A switch of the switches 23 to the center, the processor 22 shifts to the normal processing. That is, in the input processing of the analog signal, the following equation is executed using the correction coefficients “A”, “B”, and “C” stored in the nonvolatile memory 24, and the buffer 11 of the analog input unit 20 is processed. The digital signal stored in the memory is corrected and taken in.

Y = (A / B) x + C where x is the value of the digital signal before correction, and y is the value of the digital signal after correction.

In the output processing of the analog signal, an arithmetic operation according to the following equation is executed using the correction coefficients "D", "E", and "F" stored in the nonvolatile memory 24, and the corrected digital signal is output. Is latched in the latch circuit 14 of the analog output unit 21.

Y = (D / E) x + F where x is the value of the digital signal before correction, and y is the value of the digital signal after correction.

Embodiment 2 FIG. In the first embodiment, the input terminal 6 of the analog input unit 20 and the analog output unit 21
In the above description, the number of output terminals 19 is one, but it is also possible to provide a plurality of input terminals or output terminals as shown in FIG. 8 or FIG. In FIG. 8, an operational amplifier 7 is provided for a plurality of input terminals 6.
And a multiplexer 25 for switching analog signals
Is provided between each operational amplifier 7 and the A / D converter 10 to enable a plurality of inputs. In FIG. 9, an operational amplifier 16 is prepared corresponding to a plurality of output terminals 19, and a sample hold for holding an analog signal is provided. By adding 26 to the input side of each operational amplifier 16, a plurality of outputs are possible.

Embodiment 3 FIG. FIG. 10 is a block diagram showing a third embodiment of the present invention. The operability is improved by adding an alphanumeric display 27. That is, when the adjustment operation described in the first embodiment is being performed, the pressed switch number, the value of the digital signal to be incremented / decremented, and the like can be displayed on the alphanumeric display 27. It is possible to operate while checking the situation, and erroneous operation can be prevented.

[0028]

As described above, according to the present invention, a correction coefficient for absorbing a conversion error caused by hardware of an analog input section or an analog output section by software is calculated according to a procedure instructed by a switch operation. The value of the digital signal to be fetched or the value of the digital signal to be output is corrected using the correction coefficient during the input / output processing of the analog signal. An analog signal input / output device that is extremely easy to use, allows anyone to make sure adjustments in a short period of time, eliminates fluctuations in set values due to vibration, and eliminates the need for readjustment after transportation. The effect is obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing a first embodiment of the present invention.

FIG. 2 is a block circuit diagram showing an internal configuration of an analog input unit of the embodiment.

FIG. 3 is a block circuit diagram showing an internal configuration of an analog output unit of the embodiment.

FIG. 4 is a flowchart showing a procedure for adjusting an analog input unit of the embodiment.

FIG. 5 is a flowchart illustrating a flow of processing of a processor when adjusting an analog input unit according to the embodiment.

FIG. 6 is a flowchart illustrating a procedure for adjusting an analog output unit according to the embodiment.

FIG. 7 is a flowchart illustrating a flow of processing of a processor when adjusting an analog output unit according to the embodiment.

FIG. 8 is a block circuit diagram showing an internal configuration of an analog input unit according to a second embodiment of the present invention.

FIG. 9 is a block circuit diagram showing an internal configuration of an analog output unit in the embodiment.

FIG. 10 is a configuration diagram showing a third embodiment of the present invention.

FIG. 11 is a configuration diagram showing a conventional analog signal input / output device.

FIG. 12 is a block circuit diagram showing an internal configuration of the analog input unit.

FIG. 13 is a block circuit diagram showing an internal configuration of the analog output unit.

[Explanation of symbols]

 Reference Signs List 20 analog input section 21 analog output section 22 processor 23 switch 24 non-volatile memory

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G06F 17/40 H03M 1/10

Claims (2)

(57) [Claims] An analog signal to be inputted is converted to a digital signal.
An analog input section for converting the digital signal, a processor for capturing the digital signal, and two analog signals input to the analog input section.
Digital signal corresponding to one analog signal
Signal value as the reference digital input data,
From the reference digital input data (b), the other digital
Actual data difference value obtained by subtracting input data (a)
(B) is set in association with the one analog signal.
Digital input data to be output and the other analog signal
Of digital input data to be set in association with
Setting data of digital input data set between
Set to the difference value (A) and digital input data
The reference digital input data from the span value
Reference offset value obtained by subtracting the correction value of (b)
And causing the processor to calculate a correction coefficient such as (C).
For instructing the procedure of the correction coefficient calculation operation for
And the measured data difference value (B) and the setting data difference value (A)
And correction coefficients such as reference offset value (C)
The processor stores the setting data difference value (A) in the actual memory.
Amplification correction coefficient obtained by dividing the measured data difference value (B)
(A / B) multiplied by the captured digital signal (X)
Then, the multiplication result (A.X / B) is added to the reference offset.
The digital value acquired by adding the
Analog signal input / output characterized by correcting signal values
Power device. 2. A processor for outputting a digital signal.
And the digital signal output from the processor
An analog output section for converting the analog signal into a analog signal, and a predetermined analog signal output from the analog output section.
One digital signal based on the two digital signals
When the value of the total signal is used as the reference digital output data
From the reference digital output data (d), the other data
Actual measurement data obtained by subtracting the digital output data (c)
Difference value (D), set in association with one of the analog signal the
Digital output data to be determined and the other analog
Digital output data to be set in association with the
Of digital output data set between the
Data difference value (E) and reference digital output data
The spa set in the digital output data from (d)
Offset value (F) obtained by subtracting the correction value of the
To make the above processor calculate the correction coefficient
A switch for instructing a procedure of a correction coefficient calculating operation, and the actual data difference value (D) and the set data difference value (E)
And correction coefficients such as reference offset value (F)
A non-volatile memory for storing the measured data difference value (D).
Amplification correction coefficient obtained by dividing by constant data difference value (E)
(D / E) multiplied by the captured digital signal (X)
Further, the multiplication result (DX / E) is added to the reference offset.
The digital value to be output is obtained by adding the
Analog signal input / output characterized by correcting signal values
Power device.