JP2996280B2 - How to adjust the zero and span of an electronic balance - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for adjusting the zero and span of an electronic balance.

[0002]

2. Description of the Related Art FIGS. 3 and 4 show a circuit configuration of a conventional electronic balance. In FIG. 3, reference numeral 1 denotes a load cell of the scale detecting means, the excitation terminal 2 of which is connected to a power supply terminal 3 of an analog circuit section A to be described later, to which power is supplied, and the output terminal 4 of which is connected to the analog circuit section A. The load detection signal a of the load cell 1 is input to the analog circuit section A, and the excitation terminal 2 is connected to the analog circuit section A.
, And the voltage signal b of the load cell 1 is input to the analog circuit section A.

The analog circuit section A is connected to the input terminal 5 to amplify the load detection signal a of the load cell 1 and output the amplified load detection signal a ′. A reference amplifier 12 that amplifies the voltage signal b of the reference signal and outputs a reference voltage signal c.
Is connected to the preamplifier 11 and the waste-elimination adjustment circuit 13 (described later), which adjusts the reference voltage signal c and outputs a waste-elimination signal d corresponding to the waste of the balance. A subtractor 14 for subtracting the waste signal elimination signal d from the load detection signal a 'and outputting a weighing signal e;
14, a gain adjustment circuit 15 (described later) that adjusts the weighing signal e and outputs the weighing signal e ′, and is connected to the gain adjustment circuit 15 and the reference amplifier 12, and is connected to the weighing signal according to the reference voltage signal c. It is composed of an analog-digital converter (hereinafter abbreviated as A / D converter) 16 for converting e 'into a digital signal f.

The weighing digital signal f output from the A / D converter 16 is output to a computer 21 via an output terminal 17, and the weighing value is displayed on a digital display (not shown) by the computer 21.

FIG. 4 shows a circuit diagram of the waste-eye elimination adjusting circuit 13. As shown in FIG. The waste-eye elimination adjusting circuit 13 is a circuit generally called an inverting amplifier circuit using an operational amplifier, and has an input-side resistor R _s.
The amplification ratio (gain) is determined by the ratio of the resistance value of the feedback side resistor _Rf
Can be determined. The feedback-side resistor _Rf is formed by connecting a plurality of fixed resistors 31 for coarse adjustment in series.
, A dip-switch 32 is connected in parallel with each other, and a variable resistor 33 for fine adjustment is further connected in series to the fixed resistor 31.

The circuit of the gain adjustment circuit 15 has the same configuration, and a description thereof will be omitted. However, the variable resistor 33 for fine adjustment is unnecessary. The operation of the above configuration will be described.

The load detection signal a detected by the load cell 1 is amplified by the preamplifier 14, and the subtracter 14 subtracts the waste removal signal d adjusted by the waste removal adjustment circuit 13 from the load detection signal a '. A weighing signal e is obtained, the output of which is adjusted by the gain adjustment circuit 15, and the A / D
The signal is converted into a digital signal f by the converter 16 and input to the computer 21, and the weighed value is displayed on the digital display.

Next, a method of adjusting the gains of the gain adjustment circuit 15 and the wastefulness elimination adjustment circuit 13 to the target zero point and span will be described. Power is supplied to the load cell 1 with no weight placed thereon.

First, the waste-eye elimination adjusting circuit 13 is adjusted. That is, the output signal (weighing signal) e of the subtractor 14
While turning on the dip-switch 32 of the waste-elimination adjusting circuit 13 so that the level of the output signal e coincides with the predetermined value α.
Change 33.

The predetermined value α is a target zero point value, and a bias set so that the input signal of the A / D converter 16 does not become negative when the load detection signal a of the load cell 1 swings to the minus side. (A / D converter may not accurately perform A / D conversion when the input signal is negative). The computer 21 recognizes that the digital signal f (= α ′) corresponding to the predetermined value α is a zero point.

A weighing weight is placed on the balance. Then, the gain adjustment circuit 15 is adjusted. That is, while checking the level of the output signal e 'of the gain adjustment circuit 15 so that the output signal e' of the gain adjustment circuit 15 when the weight of the weighing is placed is equal to or less than the target value (zero point + span). Then, the dip-switch 32 of the gain adjusting circuit 15 is turned on for adjustment.

At this time, since the output signal e 'changes due to the adjustment of the gain adjustment circuit 15, the weight of the weighing unit is lowered after the gain adjustment, and the output signal e' is reduced so that the level of the output signal e 'matches the predetermined value α'. The eye erase adjustment circuit 13 is readjusted.

Assuming that the adjusted digital signal f is β, the computer 21 recognizes (β−α ′) as a span.

[0014]

However, in such a conventional method of adjusting the zero point and the span by adjusting the gains of the gain adjustment circuit 15 and the waste-marker elimination adjustment circuit 13, the operator checks the signal level while checking the signal level. It is necessary to make adjustments, and it is necessary to adjust the dip-switch 32 and the variable resistor 33, and it is necessary to readjust the waste-elimination adjusting circuit 13, so that the adjustment takes time and effort, and the work efficiency is poor. ,
There was a problem that costs were high.

An object of the present invention is to solve such a problem, and an object of the present invention is to provide a method for adjusting a zero and a span of an electronic scale which improves work efficiency.

[0016]

According to the present invention, there is provided a method for adjusting a zero and a span of an electronic balance according to the present invention.
A load cell is provided as a means for detecting the scale. A waste signal which is adjusted by the reference voltage of the analog-digital converter in the waste signal adjustment circuit is subtracted from the load detection signal of the load cell, and the gain of the subtracted signal is adjusted. A method for adjusting a zero point and a span in an electronic balance having an analog circuit section for adjusting in a circuit, converting the digital signal in the analog-to-digital converter, and outputting the digital signal to a computer, comprising the analog circuit section determined for the element, the analog - a full-scale digital converter S, the gain adjustment circuit-selectable gain G _G, the waste eye erase adjusting circuit selectable gain G _M, zeros analog - digital The minimum output reference value of the converter is K, the maximum output of the analog-to-digital The reference value M, is entered into the computer, W weighing of the electronic scales and the scale interval to Z, when no weight placed, each gain G _G of the gain adjustment circuit, an analog - digital conversion the output value L of the vessel was _{measured, L-G M · G G} · S ≧ K ... satisfy (1) to select the gain G _M of the largest waste th erasure adjustment circuit, the zero point in the selected gain G _M The value ω is calculated by ω = L−G _M · G _G · S (2), and for each gain G _G of these gain adjustment circuits, the gain G _M and the zero point value of the selected waste eliminating adjustment circuit are selected. storing the omega, then put the weight of the weighing W, each gain G _G of the gain adjustment circuit sets the gain G _M of the selected waste th erasure adjustment circuit, an analog - digital converter output value H is measured, and a span value F is calculated by F = H−ω (3). For each gain G _G of down regulating circuit, stores the span value F, the gain of the maximum of the gain adjustment circuit of the span value F satisfying F ≦ M ... (4) G
Select _G, in the span factor Q by the span value F in the selected gain _{G G, Q = (W /} Z) / F ... determined by calculating at (5), the gain G _G said selected the zero point value ω to the zero point scale, is characterized in that the gain G _M of the selected waste th erasure adjusting circuit and final adjustment gain G _M.

[0017]

According to the action-mentioned method, weighed W of electronic scales, type the scale interval Z, when no weight placed, each gain G _G of the gain adjustment circuit, an analog - output value L of the digital converter measured, selects the gain G _M of the largest waste th erasure adjustment circuit that satisfies the above equation (1), the zero point value ω in the selected gain G _M calculated by the equation (2), each of these gain adjustment for each circuit of the gain G _G, stores the gain G _M and zeros value ω of the selected waste th erasure adjustment circuit, then put the weight of the weighing, the gain G of the gain adjustment circuit
Each _G, by setting the gain G _M of the selected waste th erasure adjustment circuit, an analog - output value H of the digital converter to measure the span value F is calculated by the equation (3), each of these gains storing the span value F for each gain G _G adjustment circuit, then selecting the gain G _G of the gain adjustment circuit of the maximum span value F that satisfies the equation (4), the span of the selected gain G _G determined by calculating the span coefficient Q in the above (5) by the value F, the selected gain G _G
The zero point value ω to the zero point scale in, the gain G _M of the selected waste th erasure adjusting circuit and final adjustment gain G _M.

The above equation (1) is set so that the load cell and the analog circuit section can be allowed to change the zero point within a certain value.
In other words, the bias value is given to (the minimum output reference value K of the zero point) so that the input signal of the A / D converter does not become negative due to the change of the zero point. gain G _M is selected and determined in the above (2), the minimum output reference value K or more bias values (zero point value omega) is guaranteed.

The above equation (3) is for obtaining an A / D conversion value (span value F) of the span, and the above equation (4) is for the case where the span value F is the maximum output standard of the analog-digital converter. up to be within the value M is intended to condition satisfies this equation, the gain G _G of the gain adjustment circuit maximum span value F is obtained is selected, in the result, (4) under the Is obtained. Further, the zero point value ω becomes a zero point scale.

The above equation (5) is a general equation for calculating the span coefficient.

[0021]

An embodiment of the present invention will be described below with reference to the drawings. The same components as those of the conventional example shown in FIG. 3 are denoted by the same reference numerals, and description thereof is omitted.

FIG. 1 is a circuit diagram of an electronic balance using the zero and span adjustment method of the present invention. As shown in the figure, instead of the conventional waste eliminating control circuit 13, a waste eliminating select signal g is input from a computer 41 to be described later via a first selection input terminal 42 to the analog circuit section A '.
Adjust the gain with an analog switch (not shown)
A waste removal elimination adjustment circuit 43 that outputs a waste removal elimination signal d corresponding to the waste of the scale is provided. Further, instead of the conventional gain adjustment circuit 15, a gain is supplied from the computer 41 via a second selection input terminal 44. A gain adjustment circuit 45 that receives the selection signal h, adjusts the gain by an analog switch (not shown), adjusts the weighing signal e, and outputs the weighing signal e ′.
Is provided.

A method for adjusting the zero point and the span of the electronic scale will be described with reference to the flowchart of FIG. In addition,
Regardless of the weighing and scale (minimum scale) of the electronic balance, the values of the following circuits which are determined in advance by the elements constituting the analog circuit A 'and the power supply are input to the computer 41.

1. 1. the reference voltage X (v) of the A / D converter 16; 2. A / D converter 16 full scale (count), Gain G selectable by the waste-eye elimination adjustment circuit 43
_M(Times), 4. Gain G selectable by gain adjustment circuit 45_G(Times), 5. 5. Zero minimum output reference value K (count), Maximum output reference value M of the weighing span M (count) [Step-1]
The purpose of the scale 1. Weighing W (kg) of electronic balance, Enter the scale (minimum scale) Z (kg) of the electronic scale.
Power. * The computer 41 calculates the gain G of the gain adjustment circuit 45._GTo
Switch to execute the following Step-2 to Step-6
You. [Step-2] First, the first gain of the gain adjustment circuit 45 is
G_GSelect For example, the gain G _GAs 1.0
Assuming that 0, 1.40, 1.96, and 2.74 are selectable,
Inn G_G(1) = 1.00 is selected. [Step-3] selected gain G_G(1) Gain selection
The selection signal h is output to the gain adjustment circuit 45. This gain selection
Gain is adjusted in gain adjustment circuit 45 by selection signal h
Is done. [Step-4] A / D with no weight placed on the scale
By the output value L of the converter 16, L−X · G_M・ G_GS / X ≧ K (1) is calculated.

For example, L = 42000, X = 2v, S = 10
0000, K = 20000, K = 60000, _GG (1) =
Since it is 1.00, a gain G _M ≦ 0.22 is obtained. [Step -5] selecting a gain G _M of the largest waste th erase adjusting circuit 43 which satisfies the above equation (1).

For example, as gain G _M , 0.10, 0.1
Assuming that 5, 0.23, and 0.34 can be selected, a gain G _M (1) = 0.15 is selected. [Step -6] zero point value in the gain G _M selected ω
A is calculated at _{ω = L-X · G M} · G G · S / X ... (3). When the gain G _M (1) = 0.15, ω
(1) = 27000 is obtained. * The above steps -2 to -6 are performed with the gain G _G (2) = 1.40, _GG (3) = 1.9
6, Set G _G (4) = 2.74 and execute similarly. [Step -7] For example, Motomari gain G _M and zeros value ω of waste th erase adjusting circuit 43 shown in Table 1, and stores the gain G _M and zeros value ω of waste th erase adjusting circuit 43.

[0027]

[Table 1]

[Step-8] Next, the adjuster places the weight of the weighing W on the balance. * Computer 41 executes the following steps -9 Step -13 switches the gain G _G of the gain adjustment circuit 45. [Step -9] First, the gain of the gain adjustment circuit 45 G _G
(1) Select = 1.00. [Step-10] The gain selection signal h of the selected gain _GG (1) is output to the gain adjustment circuit 45. The gain is adjusted in the gain adjustment circuit 45 by the gain selection signal h. [Step -11] gain G in _G (1), the gain G _M (1) of the waste-th erasure adjusting circuit 43 described above selected = 0.15
Select (see Table 1). [Step-12] The selected waste removal elimination selection signal g is output to the waste removal elimination adjustment circuit 43. The gain is adjusted in the waste-elimination adjusting circuit 43 by the waste-elimination selection signal g. [Step-13] From the output value H of the analog-digital converter with the weight of the weighing W placed thereon, the span value F is calculated by the following equation: F = H−ω (3) The zero point value ω at the gain G _G (1) is 27
000, and if H = 80235 is measured, F (1) = 53235 is obtained. * The above steps -9 to -13 are referred to as gain G
_{G (2) = 1.40, G} G (3) = 1.96, G G (4) = 2.74
And execute similarly. [Step-14] For example, span values F shown in Table 1 are obtained, and these span values F are stored. [Step-15] Next, F ≦ M (4) The gain G of the gain adjustment circuit of the maximum span value F that satisfies (4)
Select _G. For example, if M = 80,000, the gain G _G (2) = 1.40 is selected from Table 1. [Step -16] the span factor Q by the span value F in the selected gain G _G, seeking by calculating at Q = (W / Z) / F ... (5), and stores. At the gain G _G (2), F = 74929 (see Table 1).
Assuming that 50 (kg) and Z = 0.01 (kg), Q = 0.066730 is obtained. [Step -17] is stored as the scale J zero point value ω a zero point in the selected gain G _G. Gain _GG
Since (2) is selected, J = 26600 is stored from Table 1. [Step-18] The gain selection signal h of the selected gain _GG (2) is output to the gain adjustment circuit 45. The final gain is set in the gain adjustment circuit 45 by the gain selection signal h. In [Step -19] gain G _G (2), and outputs the gain G _M (2) = 0.23 wasted th erase selection signal g of the waste-th erasure adjusting circuit 43 described above selected to waste th erase adjusting circuit 43, the end I do. The final gain is set in the waste-elimination adjusting circuit 43 by the waste-elimination selection signal g.

The above equation (1) allows the load cell 1 and the analog circuit section A 'to have a zero point change within a certain value, that is, to prevent the input signal of the A / D converter 16 from becoming negative due to the zero point change. , A bias value (minimum output reference value K of the zero point), and the gain G _M of the maximum waste adjustment circuit that satisfies the reference value K is selected.
A bias value (zero value ω) equal to or larger than the minimum output reference value K, which is obtained by the above equation (2), is guaranteed.

The above equation (3) is for obtaining the A / D conversion value of the span (span value F), and the above equation (4) is that the span value F is the maximum output of the A / D converter 16. The gain G _{G of the} gain adjustment circuit 45 that can obtain the maximum span value that satisfies this equation must be within the reference value M.
Is selected, and as a result, the maximum span is obtained under the condition of equation (4). The zero point value ω is the zero point scale J.

As described above, the coordinator operates the electronic type
The weighing scale W and scale interval Z of the scale are input to the computer 41, and the scale is weighed.
The weight of the maximum gain adjustment circuit can be obtained simply by placing a weight of weight W.
G _GAnd the gain G of the largest waste adjustment circuit_MIs selected
Load cell 1 and analog circuit within a certain value
The zero point of the scale is automatically adjusted so that the change of the zero point of A 'can be tolerated.
A / D conversion value that is dynamically adjusted and corresponding to the span is maximum
By automatically adjusting the span so that
Improve the efficiency of adjustment work and reduce costs
Can be.

By adding a procedure for outputting an alarm to the computer 41 after Steps 7 and 19 are completed, the timing at which the weight of the weighing weight W is put on the adjuster is notified, and the end of the adjustment is notified. So that it can be improved.

[0033]

As described above, according to the present invention, the electronic
Just enter the weighing scale W and scale interval Z of the formula scale, and the maximum
Gain G of IN adjustment circuit_GAnd the largest waste adjustment circuit
Inn G _MIs selected and the load cell and
In order to allow the zero point change of the analog circuit
A / D conversion with zero automatically adjusted and corresponding to span
By automatically adjusting the maximum value of the span,
It is possible to improve the efficiency of balance adjustment and reduce costs.
Can be.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of an electronic balance using a zero and span adjustment method of the present invention.

FIG. 2 is a flowchart of the electronic balance.

FIG. 3 is a circuit configuration diagram of a conventional electronic balance.

FIG. 4 is a circuit configuration diagram of a conventional waste scale eliminating adjustment circuit of an electronic balance.

[Explanation of symbols]

 1 Load Cell 11 Preamplifier 12 Reference Amplifier 14 Subtractor 16 Analog-Digital Converter 41 Computer 43 Waste Elimination Adjustment Circuit 45 Gain Adjustment Circuit A 'Analog Circuit Part a, a' Load Detection Signal b Voltage Signal c Reference Voltage Signal d Waste Elimination signal e, e 'Weighing signal f Digital signal g Waste removal selection signal h Gain selection signal

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-53-74461 (JP, A) JP-A-57-179621 (JP, A) JP-A-62-150126 (JP, A) 53028 (JP, U) (58) Field surveyed (Int. Cl. ⁶ , DB name) G01G 23/01 G01G 23/36 G01G 23/37

Claims (1)

(57) [Claims] 1. A load cell as a means for detecting a scale, wherein a waste cell elimination signal adjusted by a reference voltage of an analog-digital converter is subtracted from a load detection signal of the load cell. A method for adjusting a zero point and a span in an electronic balance having an analog circuit unit that adjusts a subtraction signal in a gain adjustment circuit, converts the signal into a digital signal in the analog-digital converter, and outputs the digital signal to a computer. determined by elements constituting the circuit section, the analog - a full-scale digital converter S, the gain adjustment circuit is selectable gain G _G, the waste eye erase adjusting circuit selectable gain G _M, zeros The minimum output reference value of the analog-to-digital converter The maximum output reference value of the vessel M, is entered into the computer, the weighing of the electronic scales W, when the scale interval and Z, when no weight placed, each gain G _G of the gain adjustment circuit, analog - output value L of the digital converter is measured, selects the gain G _M of the largest waste th erasure adjustment circuit satisfying _{L-G M · G G ·} S ≧ K, zeros in the selected gain G _M calculates the value omega at _{ω = L-G M · G} G · S, it every gain G _G of the gain adjustment circuit, stores the gain G _M and zeros values omega of the selected waste th erasure adjustment circuit Then, the weight of the weighing W is placed thereon, and the gain G _{G of} each gain adjustment circuit is set.
Each time, the output value H of the analog-digital converter is measured by setting the gain G _M of the selected waste-elimination adjusting circuit, and the span value F is calculated by F = H−ω. for each gain G _G adjustment circuit, stores the span value F, the gain of the gain adjustment circuit of the maximum span value F satisfying F ≦ M G
Select _G, the span factor Q by the span value F in the selected gain _{G G, Q = (W /} Z) determined by calculating at / F, the zero point value ω in the selected gain G _G a zero-point scale, the selected zero and span adjustment method of an electronic balance, characterized in that the gain G _M of the waste-th erasure adjusting circuit and final adjustment gain G _M.