JPS58212207A - Zero point correcting device of voltage amplifying circuit - Google Patents

Zero point correcting device of voltage amplifying circuit

Info

Publication number
JPS58212207A
JPS58212207A JP57095302A JP9530282A JPS58212207A JP S58212207 A JPS58212207 A JP S58212207A JP 57095302 A JP57095302 A JP 57095302A JP 9530282 A JP9530282 A JP 9530282A JP S58212207 A JPS58212207 A JP S58212207A
Authority
JP
Japan
Prior art keywords
point
voltage
output
potential
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57095302A
Other languages
Japanese (ja)
Inventor
Akihisa Takano
晃久 高野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57095302A priority Critical patent/JPS58212207A/en
Publication of JPS58212207A publication Critical patent/JPS58212207A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To attain zero correction for a short time, by comparing a voltage amplifying output of a measuring point with the 2nd reference point potential, storing a comparison output in a capacitor while a zero correcting switch is depressed and feeding it back to the other input of a measuring point voltage amplifying circuit. CONSTITUTION:In an electronic scale using a load cell Rx for example, the cell Rx is connected in series with a resistor R1 between power supplies +V and -V and a center point B is connected to an inverting input terminal 1 of an operational amplifier OP1 through an R7. Further, a potential of a connecting point E between resistors R4, R5 connected to the power supplies +V, -V is given to a non-inverting input of the amplifier OP1, and a feedback resistor R6 is provided to the amplifier OP1. An output C of the amplifier OP1 and a potential at a point F are compared at an amplifier OP2, and the output charges up a capacitor C1 via a switching element S and a resistor R2. The potential of the capacitor C1 is fed back to the non-inverting input of the amplifier OP1 via a voltage follower OP3. The zero correction is performed for a short time by operating the element S in this way and the weight is measured with the output C.

Description

【発明の詳細な説明】 27−′ 本発明はロードセルを使ったばかりの増巾回路、あるい
は温度計などの増巾回路において、零点のドリフトを補
正する装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION 27-' The present invention relates to a device for correcting zero point drift in an amplification circuit using a load cell or an amplification circuit such as a thermometer.

ロードセルを使ったばかシなどの場合、ロードセルの出
力が微少なために増巾回路の増中度は100倍以上と大
きいのが普通である。このような場合に、零点のドリフ
トがあるとドリフトも増巾されてしまい、増巾回路の出
力がこのために飽和してしまって測定できなくなるとい
う問題があった。これを防ぐために従来は、ドリフトの
要因となる回路素子、たとえば抵抗やオペアンプ、動作
温度などのバラツキを小さくするためにこれらの部品の
選別や、あるいは部品単体のドリフトの少ないものを選
別するなどして、高価な部品による回路を構成すること
によって上記問題に対処していた。
In cases where a load cell is used, the output of the load cell is very small, so the degree of amplification of the amplification circuit is usually as high as 100 times or more. In such a case, if there is a drift at the zero point, the drift is also amplified, and the output of the amplification circuit is therefore saturated, making it impossible to measure. To prevent this, conventional methods have been used to select circuit elements that cause drift, such as resistors, operational amplifiers, and operating temperatures, to reduce variations in these components, or to select individual components that have minimal drift. The above problem has been addressed by constructing a circuit using expensive components.

本発明は、これらの欠点を除くために、零調整時に、増
巾回路の零補正を自動的に行い、短時間の測定時間内の
み零補正を継持して、上記の問題点を安価にとり除く方
法を提供する。
In order to eliminate these drawbacks, the present invention automatically performs zero correction in the amplifier circuit during zero adjustment, and continues the zero correction only during a short measurement time, thereby solving the above problems at low cost. Provide a method to remove it.

3 パ−−二 測定点の電圧を増巾する電圧増巾回路の出力と第2の基
準点電位を比較する電圧比較回路を設け、この電圧比較
回路の出力電圧を零補正スイッチが押されている間コン
デンサに蓄えると共に、この電圧を常に前記電圧増巾回
路の他の入力に帰還することによって、短時間の期間零
補正を行うものである。
3. A voltage comparison circuit is provided to compare the output of the voltage amplification circuit that amplifies the voltage at the second measurement point with the potential of the second reference point, and the output voltage of this voltage comparison circuit is adjusted to zero when the zero correction switch is pressed. This voltage is stored in a capacitor during the voltage amplification circuit, and this voltage is constantly fed back to the other input of the voltage amplification circuit, thereby performing zero correction for a short period of time.

第1図は、ロードセルIbcを用いた電子式はかりに本
発明を実施した一実施例である。
FIG. 1 shows an example in which the present invention is implemented in an electronic scale using a load cell Ibc.

特に本発明はこのようなはかりを実装した電子レンジの
ような、はかりとしての測定が短時間で終了し、かつ風
袋引などの操作を行うことが必然であるような簡単な用
途に適している。
In particular, the present invention is suitable for simple applications such as a microwave oven equipped with such a scale, where measurement as a scale can be completed in a short time and operations such as tare subtraction are necessary. .

まずロードセルRxは、固定抵抗R1と直列に電源+V
と一■の間に接続されその中点(B点)は抵抗R7を通
して演算増巾器oP1の反転側入力端子1に接続されて
いる。また1電源+Vと−■:1 の間に接続された抵抗R4とR5の接続点E点は抵抗R
8を通して前記演算増巾器OP1の非反転側入力2に接
続されている。またOPlの反転入力1と出力3の間に
は帰還抵抗R6が接続されている。
First, the load cell Rx is connected to the power supply +V in series with the fixed resistor R1.
The midpoint (point B) is connected to the inverting side input terminal 1 of the operational amplifier oP1 through a resistor R7. In addition, the connection point E of resistors R4 and R5 connected between 1 power supply +V and -■:1 is resistor R
8 to the non-inverting side input 2 of the operational amplifier OP1. Further, a feedback resistor R6 is connected between the inverting input 1 and the output 3 of OPl.

以上の状態では、B点の電圧は、出力3にE点の電圧を
基準にした反転増巾されて出てくる。さて、以上のよう
に、この部分は、基準点電位(E点)に対して、測定点
(B点)電位を増巾する電圧増巾回路となっており、そ
の出力は基本的にはA点電位とB点電位の差を増巾する
In the above state, the voltage at point B is inverted and amplified using the voltage at point E as a reference and outputted to output 3. Now, as described above, this part is a voltage amplification circuit that amplifies the measurement point (point B) potential with respect to the reference point potential (point E), and its output is basically A. Amplifies the difference between the point potential and the B point potential.

第1図では反転増巾として説明したが、差動増巾回路と
して構成しても良い。
Although the inversion amplification circuit is explained in FIG. 1, it may be configured as a differential amplification circuit.

さて、このままで、もしも風袋引などをする場合、Rx
の抵抗値が無荷重のときとは異っているので、電圧増巾
回路の出力はすでに、ある重さに相当する出力を0点に
出力している。これは無荷重の場合でも各抵抗のバラン
スがくずれたような場合も同じである。ところが、0点
以降に接続されるであろう制御回路(図示せず、マイコ
ンなどを使っ11ま た重量計算、表示などをする部分)は、第2の基準点電
位(F点)を重量零として計算するようにしである場合
に、上記のように0点に電圧が現れ5 /・− ると重量が零となってしまう、この欠点をおぎなうため
に、制御回路の方でこの時点の電圧を重量零と換算する
事も可能であるが、そのようにするためには、(必要な
測定重量)+(風袋引可能な重量)+(零点ドリフトに
よる変動)の3つの要因を加えた変動範囲をダイナミッ
クレンジとする測定系が必要になってしまう。一般に、
ダイナミックレンジを大きくすると精定精度が低下する
ので、安価な方法では使いものにならない回路となって
しまう。
Now, if you want to perform tare subtraction etc. as is, Rx
Since the resistance value of is different from that when there is no load, the voltage amplification circuit has already outputted an output corresponding to a certain weight to the zero point. This is the same even when there is no load and when the balance of each resistance is lost. However, the control circuit (not shown, the part that uses a microcomputer etc. to calculate weight, display, etc.) that will be connected after the zero point assumes that the second reference point potential (point F) is zero weight. In order to overcome this drawback, when the voltage appears at the 0 point as shown above and the weight becomes zero, the control circuit calculates the voltage at this point. It is possible to convert the weight to zero, but in order to do so, the range of variation must be calculated by adding the following three factors: (required measured weight) + (tare weight) + (variation due to zero point drift) A measurement system with a dynamic range of is required. in general,
Increasing the dynamic range reduces precision, making the circuit unusable with inexpensive methods.

そこで本発明は、ダイナミックレンジを、必要な測定重
量の範囲のみに限定して精度を向上させる手段を提供す
るもので、前述の回路に以下に述べる回路を付加するだ
けで目的を達することができる。
Therefore, the present invention provides a means to improve accuracy by limiting the dynamic range to only the range of necessary measurement weights, and the purpose can be achieved by simply adding the circuit described below to the above-mentioned circuit. .

まず、風袋引、あるいは零点補正時に出力C点の電圧を
第2の基準点電位F点に等しくすれば、良い事は明白で
あり、このためには、′電圧増巾回路の基準側入力端の
電圧を変化させれば良い事は良く知られている。本発明
は、この原理を用いて6、−二、。
First, it is obvious that it is better to make the voltage at the output point C equal to the second reference point potential F point during tare subtraction or zero point correction. It is well known that this can be done by changing the voltage of The present invention utilizes this principle6.-2.

いるが、その特徴は自動的に零補正を行うところにある
However, its feature is that it automatically performs zero correction.

まず、0点出力とF点電位を比較する演算増巾器OP2
を用いた電圧比較回路、その出力G点をスイッチング素
子Sを介して抵抗R2とコンデンサC1の直列回路が電
源−■の間に接続されている。また抵抗R2とコンデン
サC1との接続点り点の電位は、インピーダンス変換の
ために設けられたボルテージフォロワー〇P3を介して
、抵抗R3を通して前記電圧増巾回路の基準側入力点A
点に帰還されている。
First, the operational amplifier OP2 compares the 0 point output and the F point potential.
A voltage comparator circuit using a voltage comparator, whose output point G is connected via a switching element S to a series circuit of a resistor R2 and a capacitor C1 between the power supply -2. Further, the potential at the connection point between the resistor R2 and the capacitor C1 is transferred to the reference side input point A of the voltage amplification circuit through the resistor R3 via a voltage follower P3 provided for impedance conversion.
It has been returned to the point.

さて、スイッチング素子Sは、風袋引などのスイッチが
押されたとき閉じられるスイッチであもこの時、C点電
位が第2の基準点電位F点より高ければ電圧比較回路の
出力は低くなる。従って、スイッチング素子Sが閉じら
れているので抵抗R2を通ってコンデンサC1の電圧を
低くなる。
Now, the switching element S is a switch that is closed when a switch such as a tare subtraction switch is pressed.At this time, if the potential at point C is higher than the second reference point potential at point F, the output of the voltage comparison circuit becomes low. Therefore, since the switching element S is closed, the voltage across the capacitor C1 is lowered through the resistor R2.

従ってボルテージフォロワー〇P3を通って前記電圧増
巾器の基準側入力A点の電位も低くなる。
Therefore, the potential at the reference side input point A of the voltage amplifier also becomes low through the voltage follower P3.

従って電圧増巾器の出力も低くなって、最後には7 ・
〜−・ F点と一致する。
Therefore, the output of the voltage amplifier becomes low, and finally 7.
〜−・ Matches point F.

この時、スイッチング素子sl開放すれば、コンデンサ
Cにはその時点(すなわち電圧増巾回路の出力がF点と
等しくなった時)の電圧が保持されており、ボルテージ
フォロワーを介してA点に印加されつづけているので、
この時点の出力が重量零となる。これ以降、はかりに荷
重をかけると、それに応じた出力が0点にあられれるた
めに重量を測定することができる。
At this time, if switching element sl is opened, the voltage at that point in time (that is, when the output of the voltage amplification circuit becomes equal to point F) is held in capacitor C, and the voltage is applied to point A via the voltage follower. Because it continues to be
The output at this point becomes zero weight. From now on, if you apply a load to the scale, the corresponding output will be at the 0 point, so you can measure weight.

なお、コンデンサC1に蓄えられた電荷はしたいに放電
してゆくために零点が移動してゆくが、許容誤差範囲の
間に測定が完了するようにしておけば問題はない。
Note that as the charge stored in the capacitor C1 is discharged as desired, the zero point moves, but there is no problem as long as the measurement is completed within the allowable error range.

以上のように本発明は、風袋引などの零補正の間のみコ
ンデンサに補正に必要な電圧全蓄え、補正終了後もコン
デンサに蓄えられた電圧を電圧増巾回路に帰還すること
によって零補正を行う簡便11 ・・: な方法である。
As described above, the present invention stores all the voltage necessary for correction in the capacitor only during zero correction such as tare subtraction, and even after the correction is completed, zero correction is carried out by feeding back the voltage stored in the capacitor to the voltage amplification circuit. Easy to do 11...: This is a simple method.

第2図は、アナログディジタルコンバーターを内蔵した
1チップマイクロコンピュータ−を用いた本発明の他の
実施例である。
FIG. 2 shows another embodiment of the present invention using a one-chip microcomputer with a built-in analog-to-digital converter.

1oはマイクロコンピュータ−である。その内部には、
11で示されたアナログディジタルコンバーターを始め
、メモリーや制御部、さらには出力バッファ12などよ
り成る多くの回路が組み込まれており、プログラムされ
た手順に従って動作する。この機能を用いて、第1図で
示した回路のいくつかの機能をマイクロコンピュータ−
の内部で処理することができる。
1o is a microcomputer. Inside it,
It incorporates many circuits, including an analog-to-digital converter shown at 11, memory, a control section, and an output buffer 12, and operates according to programmed procedures. Using this function, some functions of the circuit shown in Figure 1 can be implemented in a microcomputer.
It can be processed internally.

第2図において、Rx 、 R1、R4、R5、R71
Re 、 R6,Rs 、 OPl 、OF2 、 R
2、CIは第1図の場合と同じである。さて、電圧増巾
器の出力はマイクロコンピュータ−のアナログ・デジタ
ル変換回路の入力13に接続され、アナログ・デジタル
変換回路によって電圧を読み込まれる。
In Figure 2, Rx, R1, R4, R5, R71
Re, R6, Rs, OPl, OF2, R
2. CI is the same as in FIG. Now, the output of the voltage amplifier is connected to the input 13 of the analog-to-digital conversion circuit of the microcomputer, and the voltage is read by the analog-to-digital conversion circuit.

tたTrl、 Tr2はマイクロコンピュータ−からの
制御によって、オ也又はオフとなって、抵抗R29ペー
ジ またマイクロコンピュータ−10の内部では、そのプロ
グラムによって、0点の電圧と第2の基準点電圧F′と
を比較し、その大小によって前記のトランジスタTr1
.Tr2をオン又はオフにする。従ってこれらプログラ
ムで構成された部分は第1図における電圧比較回路OP
2に相当する。
Trl and Tr2 are turned on or off under the control from the microcomputer, and inside the microcomputer 10, the voltage at the 0 point and the voltage at the second reference point F are changed according to the program. ', and depending on the size, the transistor Tr1
.. Turn Tr2 on or off. Therefore, the part composed of these programs is the voltage comparator circuit OP in Figure 1.
Corresponds to 2.

図でこれの働きをする部分を13と記しておく。In the figure, the part that functions as this is marked 13.

このようにマイクロコンピュータ−を用いることによっ
て、その内部にいくつかの機能をおさめることができる
が、動作は第1図で説明した場合と全く同一である。
By using a microcomputer in this manner, several functions can be housed inside the microcomputer, but the operation is exactly the same as that described in FIG. 1.

以上説明したように本発明によれば次のような効果が期
待できる。
As explained above, according to the present invention, the following effects can be expected.

(1)零点補正を行う時に閉となるスイッチング素子を
用い、この閉となっている期間の電圧が零になるように
コンデンサに電圧を蓄えているので、任意の零点補正を
行うことができる。
(1) Since a switching element that is closed when performing zero point correction is used and voltage is stored in the capacitor so that the voltage during this closed period becomes zero, arbitrary zero point correction can be performed.

(2)簡単に自動零補正が行える。(2) Automatic zero correction can be easily performed.

10、、、・ は本発明の他の実施例を示す回路図である。10,... FIG. 2 is a circuit diagram showing another embodiment of the present invention.

oPl・・・・・・電圧増巾回路を構成する演算増巾器
、OF2・・・・・・電圧比較回路を構成する演算増巾
器、S・・・・・・スイッチング素子。
oPl...Operation amplifier forming a voltage amplification circuit, OF2...Operation amplifier forming a voltage comparison circuit, S...Switching element.

Claims (1)

【特許請求の範囲】 基準点電位(E点)に対する測定点電位(B点)を増幅
するだめの、反転、非反転入力を有する増幅回路の反転
、非反転のいずれか一方に前記測定点電位を接続すると
ともに他の入力に前記基準点電位を接続した電圧増幅回
路ともう1つの反転。 非反転入力を有するもう1つの増幅回路の一方の入力に
他の基準点電位(F点)を接続するとともに、他の入力
に前記電圧増幅回路の出力(0点)を接続した電圧比較
回路と、この電圧比較回路の出力に、スイッチング素子
Sと、抵抗(R2)およびコンデンサC1の直列回路を
接続し、このコンデンサC1と抵抗R2の接続点(D点
)の電圧をボルテージフォロワを介して、前記電圧増幅
回路の前記基準点電位の接続された入力に帰還せしめた
電圧増幅回路の零点補正装置。
[Scope of Claims] The measuring point potential is connected to either the inverting or non-inverting of an amplifier circuit having an inverting or non-inverting input for amplifying the measuring point potential (point B) with respect to the reference point potential (point E). and another inversion circuit with the reference point potential connected to the other input. A voltage comparator circuit in which another reference point potential (point F) is connected to one input of another amplifier circuit having a non-inverting input, and the output (point 0) of the voltage amplifier circuit is connected to the other input. , A series circuit of a switching element S, a resistor (R2), and a capacitor C1 is connected to the output of this voltage comparison circuit, and the voltage at the connection point (point D) of this capacitor C1 and resistor R2 is expressed via a voltage follower. A zero point correction device for a voltage amplification circuit that feeds back the reference point potential of the voltage amplification circuit to a connected input.
JP57095302A 1982-06-02 1982-06-02 Zero point correcting device of voltage amplifying circuit Pending JPS58212207A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57095302A JPS58212207A (en) 1982-06-02 1982-06-02 Zero point correcting device of voltage amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57095302A JPS58212207A (en) 1982-06-02 1982-06-02 Zero point correcting device of voltage amplifying circuit

Publications (1)

Publication Number Publication Date
JPS58212207A true JPS58212207A (en) 1983-12-09

Family

ID=14133973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57095302A Pending JPS58212207A (en) 1982-06-02 1982-06-02 Zero point correcting device of voltage amplifying circuit

Country Status (1)

Country Link
JP (1) JPS58212207A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6383813U (en) * 1986-11-20 1988-06-01
JPH0365315U (en) * 1989-10-31 1991-06-25
JPH04217104A (en) * 1990-12-18 1992-08-07 Sanyo Electric Co Ltd Signal amplifier circuit
JPH07245532A (en) * 1993-12-23 1995-09-19 Sgs Thomson Microelectron Sa Amplifier with offset correction function

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6383813U (en) * 1986-11-20 1988-06-01
JPH0365315U (en) * 1989-10-31 1991-06-25
JPH04217104A (en) * 1990-12-18 1992-08-07 Sanyo Electric Co Ltd Signal amplifier circuit
JPH07245532A (en) * 1993-12-23 1995-09-19 Sgs Thomson Microelectron Sa Amplifier with offset correction function

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