JP2879755B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device including a step of forming a through hole in a multilayer wiring.

[0002]

2. Description of the Related Art FIG. 3 is a plan view of a conventional semiconductor chip on which multilayer wiring is formed.

Referring to FIG. 3, in this type of semiconductor device, a through hole 6 is formed above an intersection of a first aluminum film (first conductive film) 3 and a second aluminum film (second conductive film) 8. The width of the first aluminum film 3 immediately below the through hole 6 is designed to be slightly larger than the diameter of the through hole 6.

FIGS. 4 (a) to 4 (c) are longitudinal sectional views in the order of steps taken along the line BB 'in FIG. 3, and the process of forming the through hole 6 will be described with reference to these figures.

First, as shown in FIG. 4A, a first aluminum film 3 is patterned on the surface of a first insulating interlayer film 2 on a semiconductor substrate 1, and a second insulating interlayer film 4 is grown on the entire upper surface thereof. Then, a resist 5 for forming a through hole is patterned on the upper surface.

Next, as shown in FIG. 4B, a through hole 6 is formed by etching the second insulating interlayer film 4 immediately below the resist 5. At this time, the width of the first aluminum film 3 immediately below the through hole 6 is larger than the diameter of the through hole 6.

Finally, as shown in FIG. 4C, the resist 5 is removed, and a second aluminum film 8 is patterned on the entire wall of the through hole 6 to form a multilayer wiring.

[0008]

By the way, as the size of the semiconductor device is reduced, the wiring pitch and the aluminum width are also reduced. When forming multilayer wiring using conventional technology,
For example, in FIG. 3, the pitch L1 of the first aluminum film 3 is 2
[Μm] and the width L2 is 1 [μm], the first aluminum film 3
And the minimum distance L3 is 0.6 [μm], and the first aluminum film 3
The distance L4 between the first aluminum film 3 and the through hole 6 in consideration of the variation in alignment of the through hole 6 with the first aluminum film 3 is 0.5 [μ].
m], the diameter L5 of the through hole 6 is 0.8 [μ]
m].

As described above, in the case of the through hole 6 having a diameter of 0.8 [μm], the coverage of the through hole portion of the second aluminum film 8 is small, and there is a disadvantage that reliability is reduced. On the other hand, when the diameter of the through-hole 6 is reduced, there is a disadvantage that the resistance of the through-hole 6 increases and the operating efficiency decreases.

When only the diameter of the through-hole 6 is increased, the distance between the first aluminum film 3 and the through-hole 6 becomes narrow, and the first aluminum film 3 immediately below the through-hole 6 may be lost due to manufacturing variations. is there. In this case, when the through hole 6 is etched, as shown in FIG. 5, the second insulating interlayer film 4 in contact with the side wall of the first aluminum film 3 and the first insulating interlayer film 2 thereunder are etched. When the second aluminum film 8 was patterned, there was a problem that the second aluminum film 8 was disconnected at the bottom of the through hole.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems and the like. It is an object of the present invention to provide a semiconductor device having a structure in which disconnection of a second aluminum film 8 does not occur and aluminum coverage of a through hole portion is increased. It is to provide a method of manufacturing the.

[0012]

According to the present invention, a semiconductor device is provided.
A predetermined width is formed on the surface of the first insulating interlayer film formed on the substrate.
After forming the first conductive film having, the first conductive film and
And a second insulating layer covering the surface of the first insulating interlayer film.
A first step of forming an interlayer film, and the second insulating interlayer film
The resist applied on top of the first conductive film has a predetermined width.
With a diameter larger than the specified width
An opening having a retained diameter is selectively provided, and a second opening is provided through the opening.
Etching the insulating interlayer film from the surface side thereof,
Exposing the surface and both side walls of the conductive film,
Having a void along the wall to reach the first insulating interlayer film
A second step of opening a through hole,
After growing a third insulating interlayer film so as to cover the
Etching the third insulating interlayer film from its surface side
In the through hole, the surface of the first conductor film is
It is exposed over the entire predetermined width, and the gap is filled.
The embedded third insulating interlayer film is left as a buried portion.
A third step, wherein the first exposed in the through hole
The entire surface of the conductive film, and the second insulating interlayer film
Fourth step of forming a second conductive film disposed on the surface of
The method of manufacturing a semiconductor device characterized by having a degree can be obtained.

Further, according to the present invention, there is provided a method of manufacturing a semiconductor device, wherein the etching performed in the third step is anisotropic etching.

[0014]

Next, an embodiment of the present invention will be described with reference to the drawings. Since the present invention is an improvement of the conventional method of manufacturing a semiconductor device, the same components as those of the conventional semiconductor device will be described with the same reference numerals.

FIG. 1 is a plan view of a semiconductor chip according to an embodiment of the present invention. The point that a through-hole 6 is formed at an upper portion of an intersection between a first aluminum film 3 and a second aluminum film 8 is different from the prior art. Is the same as In this embodiment, the width of the first aluminum film 3 immediately below the through hole 6 is smaller than the diameter of the through hole 6.

FIGS. 2A to 2E are longitudinal sectional views in the order of steps along the line AA 'in FIG. 1. The formation process of the through hole 6 will be described with reference to these figures.

First, the first step will be described. As shown in FIG. 2A, a first aluminum film 3 having a predetermined pattern is formed on a surface of a first insulating interlayer film 2 on a semiconductor substrate 1 and an upper portion thereof is formed. A second insulating interlayer film 4 is grown on the entire surface, and a resist 5 for forming a through hole is applied on the upper surface.

Next, as a second step, the second insulating interlayer film 4 immediately below the resist 5 is etched to form a through hole 6. At this time, when the width of the first aluminum film 3 immediately below the through-hole 6 is smaller than the diameter of the through-hole 6, FIG.
As shown in (b), the second insulating interlayer film 4 on the side wall side of the first aluminum film 3 and the first insulating interlayer film 2 thereunder are also etched to form voids.

In a subsequent third step, as shown in FIG. 2C, the resist 5 is removed, and a third insulating interlayer film 7 is grown on the entire wall of the through hole 6. Then, by performing anisotropic etchback, the third insulating interlayer film 7 is buried in the gap on the side wall of the first aluminum film 3 as shown in FIG.

Finally, as a fourth step, the second aluminum film 8 is patterned to form a multilayer wiring. At this time,
The diameter of the through hole 6 is equal to the width of the first aluminum film 3 immediately below the through hole 6, as shown in FIG.

That is, in the prior art, the pitch of the first aluminum wiring is 2 [μm], and the width of the first aluminum film 3 is 1 [μm].
At this time, the diameter of the through-hole 6 was 0.8 [μm], whereas the diameter of the through-hole 6 formed through the first to fourth steps of the present embodiment was the same as the width of the first aluminum film 3. The same 1 [μ
m], and the through hole 6 is larger than that of the conventional semiconductor device.
The diameter becomes longer by 0.2 [μm]. As a result, the aspect ratio of the through hole 6 is improved, so that the aluminum coverage of the through hole portion is increased and the through hole resistance is reduced.

The first and second insulating interlayer films 2 and 4 described above are used.
For example, a plasma oxide film, a plasma nitride film, or an interlayer film sandwiching a coating film of silica or the like is used, and the third insulating interlayer film 7 is, for example, O ₃ T which can be embedded in a narrow space.
An EDS film or the like is used.

The first aluminum film 3 and the second aluminum film 8 are made of, for example, Al—Si, Al—Si—Cu, TiN,
i, a laminated wiring of Al-Si-Cu or the like is used. The through holes may be filled with tungsten.

[0024]

As described above, according to the present invention, a through-hole larger than the width of the first conductive film immediately below the through-hole is opened, and then the side wall of the first conductive film etched at the time of opening the through-hole is brought into contact. After filling the space of the second insulating interlayer film and the space of the first insulating interlayer film therebelow with the third insulating interlayer film, the second conductive film was patterned on the surface thereof. Will be the same as

Thus, the diameter of the through-hole can be made larger than before without changing the pitch of the wiring and the width of the first conductive film, and the aluminum coverage in the through-hole can be increased.

[Brief description of the drawings]

FIG. 1 is a plan view of a semiconductor chip according to one embodiment of the present invention.

2 (a) to 2 (e) are longitudinal sectional views in the order of steps in an AA 'part of FIG. 1;

FIG. 3 is a plan view of a conventional semiconductor chip.

4 (a) to 4 (c) are longitudinal sectional views in the order of steps in a section BB 'of FIG. 3;

FIG. 5 is a longitudinal sectional view of a conventional semiconductor chip.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor substrate 2 first insulating interlayer film 3 first aluminum film (first conductor film) 4 second insulating interlayer film 5 resist 6 through hole 7 third insulating interlayer film 8 second aluminum film (second conductor film)

Claims (2)

(57) [Claims] (1)First insulating interlayer film formed on semiconductor substrate
After forming a first conductive film having a predetermined width on the surface of the
Covering the surfaces of the first conductor film and the first insulating interlayer film;
A first step of forming a second insulating interlayer film as described above, The resist applied on the second insulating interlayer film includes
A diameter larger than a predetermined width of one conductive film, and
Selectively provide openings with diameters that are spaced outward from both ends,
The second insulating interlayer film is etched from the surface side through the opening.
To expose the surface and both side walls of the first conductive film.
And the first insulating interlayer film along the both side walls.
To open a through hole with a void reaching the second
Process and Growing a third insulating interlayer to cover the through hole
After that, the third insulating interlayer film is etched from its surface side.
The first conductive film in the through hole
Exposed over the entire predetermined width, and
Burying the third insulating interlayer film burying the void portion
The third step to leave as a department, Surface of the first conductive film exposed in the through hole
Covering the whole and disposed on the surface of the second insulating interlayer film
Fourth step of forming a second conductive film to be formed Having
And a method of manufacturing a semiconductor device. 2. The method according to claim 1, wherein the etching performed in the third step is anisotropic etching.