JP2871269B2 - Low power subscriber processing circuit - Google Patents

Low power subscriber processing circuit

Info

Publication number
JP2871269B2
JP2871269B2 JP5167192A JP5167192A JP2871269B2 JP 2871269 B2 JP2871269 B2 JP 2871269B2 JP 5167192 A JP5167192 A JP 5167192A JP 5167192 A JP5167192 A JP 5167192A JP 2871269 B2 JP2871269 B2 JP 2871269B2
Authority
JP
Japan
Prior art keywords
subscriber
circuit
pulse
output
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP5167192A
Other languages
Japanese (ja)
Other versions
JPH05260535A (en
Inventor
直貴 三枝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP5167192A priority Critical patent/JP2871269B2/en
Publication of JPH05260535A publication Critical patent/JPH05260535A/en
Application granted granted Critical
Publication of JP2871269B2 publication Critical patent/JP2871269B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、加入者終端装置に関
し、特に、低消費電力加入者処理装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a subscriber termination device, and more particularly, to a low power consumption subscriber processing device.

【0002】[0002]

【従来の技術】従来、この種の回路は、加入者対応部の
実装、未実装にかかわらず同様の処理を行っていた。
2. Description of the Related Art Heretofore, this type of circuit has performed the same processing irrespective of whether a subscriber corresponding unit is mounted or not.

【0003】[0003]

【発明が解決しようとする課題】従来、この種の回路
は、加入者対応部の実装、未実装にかかわらず同様の処
理を行っていたために、おこなわなくてよい処理に電力
が使われていた。
Conventionally, this type of circuit has performed the same processing irrespective of whether the subscriber corresponding unit is mounted or not, so that electric power is used for processing that does not need to be performed. .

【0004】本発明は従来の上記実情に鑑みてなされた
ものであり、従って本発明の目的は、従来の技術に内在
する上記課題を解決することを可能とした低消費電力の
新規な加入者処理装置を提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a novel low-power-consumption subscriber capable of solving the problems inherent in the prior art. An object of the present invention is to provide a processing device.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
に、本発明に係る加入者処理回路は、加入者対応部の実
装出力を入力とする実装検出回路と、この実装検出回路
からの出力とパルス発生回路の第1の出力を入力とする
加入者選択回路と、この加入者選択回路からの出力とパ
ルス発生回路の第2の出力を入力とするインヒビット回
路と、このインヒビット回路からの出力と加入者対応部
から受信データを入力とし送信データの出力を行う処理
回路とを備えて構成される。
In order to achieve the above object, a subscriber processing circuit according to the present invention comprises a mounting detection circuit which receives a mounting output of a subscriber corresponding unit as an input, and an output from the mounting detection circuit. And a first output of the pulse generation circuit, a subscriber selection circuit, an output of the subscriber selection circuit and a second output of the pulse generation circuit, and an output from the inhibition circuit. And a processing circuit that receives the received data from the subscriber corresponding unit and outputs the transmitted data.

【0006】[0006]

【実施例】次に本発明をその好ましい一実施例について
図面を参照しながら具体的に説明する。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a preferred embodiment of the present invention.

【0007】図1は本発明の一実施例を示すブロック構
成図であり、図2は本発明の動作タイミングチャートで
ある。
FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is an operation timing chart of the present invention.

【0008】本実施例は、加入者対応部1から10(図
2参照)までの10加入者の実装が可能で、各加入者対
応部からのデータを時分割に処理する加入者終端回路で
ある。特に、加入者対応部2が未実装の場合について、
説明する。
The present embodiment is a subscriber terminating circuit which can mount 10 subscribers from subscriber corresponding units 1 to 10 (see FIG. 2) and processes data from each subscriber corresponding unit in a time-division manner. is there. In particular, when the subscriber response unit 2 is not mounted,
explain.

【0009】図1を参照するに、処理回路24は、処理
に必要な第2のパルス信号群16と加入者対応部からの
受信データ17を入力として終端処理を行った後に、結
果を送信データ18として送出する。
Referring to FIG. 1, a processing circuit 24 performs a termination process by inputting a second pulse signal group 16 necessary for processing and reception data 17 from a subscriber corresponding unit, and thereafter, transmits a result to transmission data. Send out as 18.

【0010】 実装検出回路20は、加入者対応部1か
ら10までの第1の実装信号群11から加入者対応部に
つき実装の有無を検出し、第2の実装信号群12として
未実装の加入者対応部についてはレベル“H”を出力す
る。ここで、加入者対応部2が未実装なので、実装検出
回路20はレベル“H”を出力する。
The mounting detection circuit 20 detects the presence / absence of mounting of the subscriber corresponding unit from the first mounting signal group 11 of the subscriber corresponding units 1 to 10, and as a second mounted signal group 12, the unmounted subscription. The level corresponding to the user response section is output as "H". Here, since the subscriber correspondence unit 2 is not mounted, the mounting detection is performed.
The circuit 20 outputs the level “H”.

【0011】 加入者選択部21は、パルス発生回路2
2からの選択パルス14をトリガとして加入者対応部を
選択し、入力である第2の実装信号群12がレベル
“H”である加入者対応部に一致した場合に、禁止信号
15としてレベル“H”を送出する。ここで、未実装の
加入者対応部2が選択された時には、加入者選択回路2
1はレベル“H”の禁止信号15を出力する。
[0011] The subscriber selection unit 21 includes a pulse generation circuit 2
The subscriber corresponding unit is selected by using the selection pulse 14 from 2 as a trigger, and when the input second mounting signal group 12 matches the subscriber corresponding unit at the level “H”, the level “ H ". Here, when the unsupported subscriber correspondence unit 2 is selected, the subscriber selection circuit 2
1 outputs a prohibition signal 15 of level "H" .

【0012】 インヒビット回路23は、禁止信号15
が“L”のときに第1のパルス信号群13を第2のパル
ス信号群16として出力するが、禁止信号15がレベル
“H”のときには、第2のパルス信号群16の出力を禁
止することにより処理回路24の動作の停止を行う。
The inhibit circuit 23 outputs the inhibit signal 15
Is "L", the first pulse signal group 13 is output as the second pulse signal group 16 , but when the prohibition signal 15 is at the level "H", the output of the second pulse signal group 16 is prohibited. Thus, the operation of the processing circuit 24 is stopped.

【0013】[0013]

【発明の効果】以上説明したように、本発明によれば、
加入者対応部が未実装の場合には処理を行わないことに
より、低消費電力という効果が得られる。
As described above, according to the present invention,
When the subscriber support unit is not mounted, the processing is not performed, so that an effect of low power consumption can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を示すブロック構成図であ
る。
FIG. 1 is a block diagram showing an embodiment of the present invention.

【図2】本発明の一実施例の動作タイミングチャートで
ある。
FIG. 2 is an operation timing chart of one embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11…第1の実装信号群 12…第2の実装信号群 13…第1のパルス信号群 14…選択パルス 15…禁止信号 16…第2のパルス信号群 17…受信データ 18…送信データ 20…実装検出回路 21…加入者選択回路 22…パルス発生回路 23…インヒビット回路 24…処理回路 11 first mounting signal group 12 second mounting signal group 13 first pulse signal group 14 selection pulse 15 inhibit signal 16 second pulse signal group 17 reception data 18 transmission data 20 Mounting detection circuit 21 ... Subscriber selection circuit 22 ... Pulse generation circuit 23 ... Inhibit circuit 24 ... Processing circuit

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 多数の加入者の終端を時分割で行う加入
者処理回路において、実装、未実装可能な複数の加入者
対応部の実装または未実装出力を入力し実装の有無を検
する実装検出回路と、前記各加入者対応部の単位処理
時間に対応した時間間隔を有する選択パルスと前記単位
処理時間に対応した前記時間間隔で繰り返し発生する第
1のパルス信号を発生するパルス発生回路と、前記実装
検出回路からの出力と前記パルス発生回路からの選択パ
ルスとを入力とし該選択パルスにより加入者対応部を選
択し未実装の加入者対応部を選択した際には“H”レベ
ルの禁止信号を出力する加入者選択回路と、該加入者選
択回路からの出力と前記パルス発生回路の前記第1のパ
ルス信号を入力とし前記加入者選択回路の出力が“H”
レベルの禁止信号以外のときには前記第1のパルス信号
を第2のパルス信号として後記処理回路に出力し前記
“H”レベルの禁止信号のときには後記処理回路への前
記第2のパルス信号の出力を禁止して該処理回路の動作
を停止させるインヒビット回路と、該インヒビット回路
からの出力と前記加入者対応部からの受信データを入力
とし送信データを出力する処理回路とを備えることを特
徴とした低消費電力加入者処理回路。
In a subscriber processing circuit for terminating a large number of subscribers in a time-division manner, the presence or absence of implementation is detected by inputting the mounted or unmounted outputs of a plurality of subscriber corresponding units that can be mounted or not mounted.
A mounting detection circuit output, the unit process in each subscriber corresponding portion
Selection pulse having a time interval corresponding to time and the unit
The second repetition occurring at the time interval corresponding to the processing time
A pulse generation circuit for generating one pulse signal, an output from the mounting detection circuit, and a selection signal from the pulse generation circuit.
And select the corresponding part by the selection pulse.
"H" level when an unmounted subscriber support section is selected
A subscriber selection circuit for outputting a prohibition signal of the packet, an output from the subscriber selection circuit, and the first pulse of the pulse generation circuit.
The output of the subscriber selecting circuit inputs the pulse signal is "H"
The first pulse signal when the signal is not a level inhibition signal.
As a second pulse signal to a processing circuit described later,
In the case of the "H" level prohibition signal,
The output of the second pulse signal is inhibited to operate the processing circuit.
And inhibit circuit Ru stopping the low power subscriber processing circuit characterized by comprising a processing circuit for an input and outputs the transmission data to the reception data from the output and the subscriber corresponding portion from the inhibit circuit.
JP5167192A 1992-03-10 1992-03-10 Low power subscriber processing circuit Expired - Lifetime JP2871269B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5167192A JP2871269B2 (en) 1992-03-10 1992-03-10 Low power subscriber processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5167192A JP2871269B2 (en) 1992-03-10 1992-03-10 Low power subscriber processing circuit

Publications (2)

Publication Number Publication Date
JPH05260535A JPH05260535A (en) 1993-10-08
JP2871269B2 true JP2871269B2 (en) 1999-03-17

Family

ID=12893348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5167192A Expired - Lifetime JP2871269B2 (en) 1992-03-10 1992-03-10 Low power subscriber processing circuit

Country Status (1)

Country Link
JP (1) JP2871269B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100292357B1 (en) 1998-11-26 2001-07-12 윤종용 ADSL tranceiver unit and control method therefor

Also Published As

Publication number Publication date
JPH05260535A (en) 1993-10-08

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