JPH05260535A - Low power consumption subscriber processing circuit - Google Patents

Low power consumption subscriber processing circuit

Info

Publication number
JPH05260535A
JPH05260535A JP5167192A JP5167192A JPH05260535A JP H05260535 A JPH05260535 A JP H05260535A JP 5167192 A JP5167192 A JP 5167192A JP 5167192 A JP5167192 A JP 5167192A JP H05260535 A JPH05260535 A JP H05260535A
Authority
JP
Japan
Prior art keywords
circuit
subscriber
output
power consumption
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5167192A
Other languages
Japanese (ja)
Other versions
JP2871269B2 (en
Inventor
Naotaka Saegusa
直貴 三枝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5167192A priority Critical patent/JP2871269B2/en
Publication of JPH05260535A publication Critical patent/JPH05260535A/en
Application granted granted Critical
Publication of JP2871269B2 publication Critical patent/JP2871269B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Interface Circuits In Exchanges (AREA)

Abstract

PURPOSE:To constitute the circuit so that a transmission processing is not executed at the time when a subscriber corresponding part is not mounted yet by controlling whether a transmitting data is outputted through a processing circuit or not by an output of an inhibiting circuit corresponding to an output from a package detecting circuit. CONSTITUTION:A package detecting circuit 20 sends out an L level H as for an unpackaged subscriber corresponding part, and a subscriber selecting circuit 21 outputs an L level inhibiting signal 15. As a result, an operation of a processing circuit 24 is stopped through an inhibiting circuit 23, and transmitting data 18 is not sent out. According to such a configuration as a transmission processing is not executed at the time when this subscriber corresponding part is not packaged yet, there is not futile power consumption and the power consumption is reduced.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、加入者終端装置に関
し、特に、低消費電力加入者処理装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a subscriber termination device, and more particularly to a low power consumption subscriber processing device.

【0002】[0002]

【従来の技術】従来、この種の回路は、加入者対応部の
実装、未実装にかかわらず同様の処理を行っていた。
2. Description of the Related Art Conventionally, this type of circuit has performed similar processing regardless of whether or not a subscriber corresponding portion is mounted.

【0003】[0003]

【発明が解決しようとする課題】従来、この種の回路
は、加入者対応部の実装、未実装にかかわらず同様の処
理を行っていたために、おこなわなくてよい処理に電力
が使われていた。
Conventionally, this kind of circuit performs the same processing regardless of whether the subscriber interface is mounted or not mounted, so that power is used for the processing that need not be performed. .

【0004】本発明は従来の上記実情に鑑みてなされた
ものであり、従って本発明の目的は、従来の技術に内在
する上記課題を解決することを可能とした低消費電力の
新規な加入者処理装置を提供することにある。
The present invention has been made in view of the above-mentioned conventional circumstances, and therefore, an object of the present invention is to provide a novel subscriber of low power consumption which can solve the above-mentioned problems inherent in the conventional technology. It is to provide a processing device.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
に、本発明に係る加入者処理回路は、加入者対応部の実
装出力を入力とする実装検出回路と、この実装検出回路
からの出力とパルス発生回路の第1の出力を入力とする
加入者選択回路と、この加入者選択回路からの出力とパ
ルス発生回路の第2の出力を入力とするインヒビット回
路と、このインヒビット回路からの出力と加入者対応部
から受信データを入力とし送信データの出力を行う処理
回路とを備えて構成される。
In order to achieve the above-mentioned object, a subscriber processing circuit according to the present invention includes a mounting detection circuit which receives a mounting output of a subscriber corresponding section, and an output from this mounting detection circuit. And a subscriber selection circuit having the first output of the pulse generation circuit as an input, an inhibit circuit having an output from the subscriber selection circuit and the second output of the pulse generation circuit as an input, and an output from the inhibit circuit And a processing circuit that receives the received data from the subscriber corresponding unit and outputs the transmitted data.

【0006】[0006]

【実施例】次に本発明をその好ましい一実施例について
図面を参照しながら具体的に説明する。
BEST MODE FOR CARRYING OUT THE INVENTION The present invention will now be described in detail with reference to the accompanying drawings with reference to the accompanying drawings.

【0007】図1は本発明の一実施例を示すブロック構
成図であり、図2は本発明の動作タイミングチャートで
ある。
FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is an operation timing chart of the present invention.

【0008】本実施例は、加入者対応部1から10(図
2参照)までの10加入者の実装が可能で、各加入者対
応部からのデータを時分割に処理する加入者終端回路で
ある。特に、加入者対応部2が未実装の場合について、
説明する。
In this embodiment, it is possible to implement 10 subscribers from the subscriber corresponding sections 1 to 10 (see FIG. 2), and a subscriber terminating circuit for processing the data from each subscriber corresponding section in a time division manner. is there. Especially when the subscriber support unit 2 is not installed,
explain.

【0009】図1を参照するに、処理回路24は、処理
に必要な第2のパルス信号群16と加入者対応部からの
受信データ17を入力として終端処理を行った後に、結
果を送信データ18として送出する。
Referring to FIG. 1, the processing circuit 24 receives the second pulse signal group 16 necessary for processing and the reception data 17 from the subscriber corresponding section as an input and performs termination processing, and then the result is transmitted data. Send as 18.

【0010】実装検出回路20は、加入者対応部1から
10までの第1の実装信号群11から加入者対応部につ
き検出し、第2の実装信号群12として未実装の加入者
対応部についてはレベル“H”を出力する。ここで、加
入者対応部2が未実装なので、レベル“H”を出力す
る。
The mounting detection circuit 20 detects the subscriber-corresponding section from the first mounting signal group 11 of the subscriber-corresponding sections 1 to 10, and detects the unmounted subscriber-corresponding section as the second mounting signal group 12. Outputs level "H". Here, since the subscriber corresponding unit 2 is not mounted, the level "H" is output.

【0011】加入者選択部21は、パルス発生回路22
からの選択パルス14をトリガとして加入者対応部を選
択し、入力である第2の実装信号群12がレベル“H”
である加入者対応部に一致した場合に、禁止信号15と
してレベル“H”を送出する。ここで、加入者対応部2
が選択された時には、禁止信号15がレベル“H”を出
力する。
The subscriber selecting section 21 includes a pulse generating circuit 22.
The subscriber-corresponding part is selected by using the selection pulse 14 from the trigger as the trigger, and the second mounting signal group 12 as an input is at the level "H"
When it coincides with the subscriber corresponding part, the level "H" is transmitted as the prohibition signal 15. Here, the subscriber support unit 2
When is selected, the prohibition signal 15 outputs the level "H".

【0012】インヒビット回路23は、禁止信号15が
“L”のときに第1のパルス信号群13を第2のパルス
信号群として出力するが、禁止信号15がレベル“H”
のときには、第2のパルス信号群12の出力を禁止する
ことにより処理回路24の動作の停止を行う。
The inhibit circuit 23 outputs the first pulse signal group 13 as the second pulse signal group when the inhibit signal 15 is "L", but the inhibit signal 15 is at the level "H".
At the time of, the operation of the processing circuit 24 is stopped by prohibiting the output of the second pulse signal group 12.

【0013】[0013]

【発明の効果】以上説明したように、本発明によれば、
加入者対応部が未実装の場合には処理を行わないことに
より、低消費電力という効果が得られる。
As described above, according to the present invention,
The effect of low power consumption can be obtained by not performing the processing when the subscriber corresponding unit is not mounted.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示すブロック構成図であ
る。
FIG. 1 is a block diagram showing an embodiment of the present invention.

【図2】本発明の一実施例の動作タイミングチャートで
ある。
FIG. 2 is an operation timing chart of an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11…第1の実装信号群 12…第2の実装信号群 13…第1のパルス信号群 14…選択パルス 15…禁止信号 16…第2のパルス信号群 17…受信データ 18…送信データ 20…実装検出回路 21…加入者選択回路 22…パルス発生回路 23…インヒビット回路 24…処理回路 11 ... 1st mounting signal group 12 ... 2nd mounting signal group 13 ... 1st pulse signal group 14 ... Selection pulse 15 ... Inhibition signal 16 ... 2nd pulse signal group 17 ... Received data 18 ... Transmission data 20 ... Mounting detection circuit 21 ... Subscriber selection circuit 22 ... Pulse generation circuit 23 ... Inhibit circuit 24 ... Processing circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 多数の加入者の終端を行う加入者処理回
路において、加入者対応部の実装出力を入力とする実装
検出回路と、該実装検出回路からの出力とパルス発生回
路からの第1の出力を入力とする加入者選択回路と、該
加入者選択回路からの出力とパルス発生回路の第2の出
力を入力とするインヒビット回路と、該インヒビット回
路からの出力と加入者対応部からの受信データを入力と
し送信データを出力する処理回路とを備えることを特徴
とした低消費電力加入者処理回路。
1. In a subscriber processing circuit for terminating a large number of subscribers, a mounting detection circuit having a mounting output of a subscriber corresponding unit as an input, and an output from the mounting detection circuit and a first pulse generation circuit. Of the subscriber selection circuit, the output from the subscriber selection circuit and the second output of the pulse generation circuit as inputs, and the output from the inhibit circuit and the subscriber correspondence unit. A low-power-consumption subscriber processing circuit, comprising: a processing circuit for receiving received data and outputting transmitted data.
JP5167192A 1992-03-10 1992-03-10 Low power subscriber processing circuit Expired - Lifetime JP2871269B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5167192A JP2871269B2 (en) 1992-03-10 1992-03-10 Low power subscriber processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5167192A JP2871269B2 (en) 1992-03-10 1992-03-10 Low power subscriber processing circuit

Publications (2)

Publication Number Publication Date
JPH05260535A true JPH05260535A (en) 1993-10-08
JP2871269B2 JP2871269B2 (en) 1999-03-17

Family

ID=12893348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5167192A Expired - Lifetime JP2871269B2 (en) 1992-03-10 1992-03-10 Low power subscriber processing circuit

Country Status (1)

Country Link
JP (1) JP2871269B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6690718B1 (en) 1998-11-26 2004-02-10 Samsung Electronics Co. Ltd. Asymmetric digital subscriber line transceiver unit-card and method of controlling the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6690718B1 (en) 1998-11-26 2004-02-10 Samsung Electronics Co. Ltd. Asymmetric digital subscriber line transceiver unit-card and method of controlling the same

Also Published As

Publication number Publication date
JP2871269B2 (en) 1999-03-17

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