JP2867457B2 - Method of manufacturing thin film transistor matrix - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to a thin film transistor matrix used for driving a liquid crystal display device, electroluminescence, or the like.

For the purpose of reducing the photocurrent without reducing the on-current, the operating semiconductor layer of the thin film transistor arranged in a matrix corresponding to the pixel is connected to the gate electrode via the gate insulating film provided on the insulating substrate. A method of manufacturing a thin film transistor comprising a first semiconductor layer facing the first semiconductor layer and a second semiconductor layer laminated thereon, wherein the temperature of the insulating substrate is at least 200 ° C. After forming an amorphous silicon layer having a thickness of 10 to 100 ° as a layer, the temperature of the insulating substrate is set to 150 ° C. or less, and the total thickness of the first and second semiconductor layers is 250
(4) The amorphous silicon layer serving as the second semiconductor layer is formed so as to have lower photosensitivity than the first semiconductor layer in the range described below.

[Industrial applications]

The present invention relates to a thin film transistor (TFT) matrix used for driving a liquid crystal display device, electroluminescence, or the like.

The thin film transistor matrix has a small photocurrent caused by light incident on the operating semiconductor layer,
It is important that the on-current is sufficiently large.

[Conventional technology]

FIG. 5 shows the configuration of a conventional TFT matrix using amorphous silicon (a-Si) for the operating semiconductor layer.

A Ti film as the gate electrode 2, a SiN film as the gate insulating film 3, an a-Si film having a thickness of about 250 ° formed at a temperature of 280 ° C. as the operating semiconductor layer 4 thereon, and an upper protective film 5 It uses an SiO ₂ film as a. Further, a Ti film is formed as the source electrode 7 and the drain electrode 8, and an n ⁺ a-Si film 6 is formed between the Ti film and the a-Si film as an ohmic contact layer.

In such a-Si TFTs, a-Si having high mobility is desired for improving the characteristics thereof, and a-Si having good film quality with few dangling bonds and low impurity content is used.

[Problems to be solved by the invention]

In a TFT using a-Si with a conventional structure and good film quality, a-S
Photocurrent generated by irradiating the i-film 4 with light increases the current value in the OFF state by two to three orders of magnitude and causes deterioration of TFT element characteristics.

To solve this problem, a structure in which a light-shielding film is formed to prevent light from being incident on the operating semiconductor layer has been conventionally considered. However, this structure complicates the process and lowers the manufacturing yield.

Further, as another structure, since the photocurrent increases or decreases in relation to the total volume of the active semiconductor layer, a structure in which the active semiconductor layer is thinned to suppress the photocurrent can be considered. However, this structure has a problem that the on-current is reduced at the same time as the photocurrent is reduced.

The present invention provides a method of manufacturing a thin film transistor that reduces a photocurrent without reducing an on-current.

[Means for solving the problem]

In order to solve the above-mentioned problem, the present invention provides an operation semiconductor layer of a thin film transistor arranged in a matrix corresponding to a pixel by forming a first semiconductor layer facing a gate electrode via a gate insulating film provided on an insulating substrate. And a second semiconductor layer laminated thereon, wherein the temperature of the insulative substrate is 200 ° C. or higher, and the temperature of the first semiconductor layer is 10 ° to 100 ° C.
After the formation of the amorphous silicon layer having a thickness of not more than 150 ° C. and the total thickness of the insulating substrate and the first semiconductor layer is not more than 250 ° C. An amorphous silicon layer serving as a semiconductor layer is formed so as to have lower photosensitivity than the first semiconductor layer.

(Operation)

The thickness truly required for the channel region is extremely thin, 10 to 100 mm. However, if the thickness of the operating semiconductor layer 4 is set to such a thickness, the surface of the operating semiconductor layer 4 will be damaged in a process after the formation of the operating semiconductor layer 4, so that it is inevitable that characteristics such as a decrease in on-current are deteriorated. .

Therefore, if the above configuration of the present invention is adopted, the first semiconductor layer 41
Then, the second semiconductor layer 42 having a lower light sensitivity than the first semiconductor layer 41 is laminated, so that the surface of the first semiconductor layer 41 is protected by the second semiconductor layer 42. Therefore, the first semiconductor layer
Even if 41 is only the thickness required for the channel region, it is possible to prevent the surface of the channel region from being damaged, and to prevent a decrease in the on-current.

Further, if the operating semiconductor layer 4 has a thickness greater than the thickness required for the channel region, a photocurrent is generated when light is incident on the portion having a thickness greater than the required thickness. Since the second semiconductor layer 42, which has an unnecessary thickness as a channel region, has low photosensitivity, the generated hole electrons recombine and disappear in a short time. Therefore, the photocurrent can be kept small.

As described above, according to the present invention, it is possible to sufficiently reduce the photocurrent without reducing the on-current. In addition, there is no need to add any complicated manufacturing steps, and therefore, no reduction in manufacturing yield is caused.

〔Example〕

 An embodiment of the present invention will be described below with reference to the drawings.

In this embodiment, as shown in the sectional view of the main part of FIG. 1, a gate electrode 2 made of a Ti film is formed on an insulating substrate 1 such as a glass substrate, and a gate insulating film 3 such as a SiN film is formed. This is covered, and a first semiconductor layer 41 having a thickness of about 100
An a-Si layer having low photosensitivity is formed to a thickness of about 150 ° as the a-Si layer of Å and the second semiconductor layer 42.

Further, an upper protective film 5 is formed in a portion of the second semiconductor layer 42 immediately above the channel, and the upper protective film 5 is formed.
Were formed on both sides of an n ⁺ a-Si layer as a contact layer 6, and a source electrode 7 and a drain electrode 8 made of a metal film such as a Ti film were formed thereon.

The a-Si layer as the first semiconductor layer 41 is formed under conditions in which the temperature of the insulating substrate 1 is about 200 ° C. or higher, so that the film has good film quality. On the other hand, the a-Si layer as the second semiconductor layer 42 is formed at a low temperature of, for example, 120 ° C., so that the film has low photosensitivity, thereby preventing a photocurrent from flowing. The a-Si layer serving as the second semiconductor layer 42 has a thickness of about 150 °, so that the first semiconductor layer 41 can be sufficiently protected, and a decrease in ON current can be prevented.

FIG. 2 shows the dependence of the photocurrent flowing in the a-Si layer on the film forming temperature and the first a having a good film quality.
-Relationship between Si layer thickness and source-drain current
Shown in the figure.

As seen in Figure 2, when the gate voltage Vg is -2 V, the source-drain voltage V _SD between is 5V, if less approximately 0.99 ° C. deposition temperature of the a-Si layer, there thickness 250Å Also, the ^photocurrent can be suppressed to approximately 10 ⁻¹¹ (A) or less.

On the other hand, the first film having a good film quality at a film forming temperature of 280 ° C.
As shown in FIG. 3, the a-Si layer 41 of FIG.
V, when the source-drain voltage 5V is applied, the film thickness becomes 100
It is 10 ^-11 (A) in Ａ.

Therefore, the thickness of the first a-Si layer 41 is set to 100 ° or less,
If the second a-Si layer 42 is formed at a temperature of 150 ° C. or less and the total thickness including the thickness is 250 ° or less, the off-state current is reduced to a practical upper limit of 2 × 10 ⁻¹¹ ( A) It can be suppressed to the following.

FIG. 4 shows an a-Si according to the present invention having such a structure.
TFT drain current (Id)-gate voltage (Vg) characteristics
This is shown in comparison with an a-Si TFT having a conventional structure.

The a-Si TFT having the configuration of the present invention shown in FIG.
A-Si layer 41 of about 60 °, first and second a-Si layers 41, 4
The total thickness of 2 is about 250 mm, and the characteristics thereof are shown by solid lines.
The characteristics of the a-Si TFT with the conventional structure depend on the thickness of the operating semiconductor layer.
The one set to 250 ° is indicated by a broken line, and the one set to 60 ° is indicated by a dashed line.

As shown in the figure, in the configuration of the present invention, even if the first a-Si layer 41 is made as thin as about 60 °, the on-current is the sum of the on-current and the second a-Si layer 42 formed thereon. By setting the thickness to about 250 mm, it becomes 10 ^-6 (A) or more when a gate voltage of 10 V during operation is applied, which is a practically sufficient value.
In addition, the off-state current is small.

On the other hand, in the conventional structure, when the operating semiconductor layer is 250 °, the on-current is sufficiently large as shown by the broken line, but the off-current is also large, and when the operating semiconductor layer is 60 °, the off-current is sufficiently as shown by the dashed line. Although small, the on-state current is small, and both have practical problems.

As described above, in the present embodiment, the photocurrent is reduced by two digits or more compared to the conventional TFT, the on-current is equivalent, and a sufficient on / off ratio can be obtained.

In the above-described embodiment, an example has been described in which the operating semiconductor layer has a two-layer structure, but the operating semiconductor layer may be a multilayer film having three or more layers.

The film having low photosensitivity is made of a trace amount of impurities such as oxygen (O ₂ ), phosphorus (P), boron (B), arsenic (As), nitrogen (N ₂ ), carbon (C), sodium (Na), and aluminum. (Al) can also be formed.

〔The invention's effect〕

As described above, according to the present invention, the photocurrent can be reduced by two digits or more without reducing the on-current. Further, in the present invention, it is not necessary to increase the number of manufacturing steps, and the manufacturing yield is not reduced.

[Brief description of the drawings]

FIG. 1 shows the structure of a TFT matrix according to one embodiment of the present invention, FIG. 2 shows the film formation temperature and photocurrent of the a-Si layer, FIG. FIG. 4 is a diagram showing a drain current-gate voltage characteristic of an a-Si TFT according to the present invention, and FIG. 5 is a diagram showing a structure of a conventional TFT matrix. In the figure, 1 is an insulating substrate, 2 is a gate electrode, 3 is a gate insulating film, 4 is an operating semiconductor layer, 41 is a first semiconductor layer,
42 denotes a second semiconductor layer, 5 denotes an upper protective film, 6 denotes a contact layer, 7 denotes a source electrode, and 8 denotes a drain electrode.

Continuation of front page (56) References JP-A-62-299083 (JP, A) JP-A-63-1074 (JP, A) JP-A-62-141776 (JP, A) JP-A-1-302768 (JP) , A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 29/786 H01L 21/336 G02F 1/136

Claims (1)

(57) [Claims] An operating semiconductor layer of a thin film transistor arranged in a matrix corresponding to a pixel includes a first semiconductor layer facing a gate electrode via a gate insulating film provided on an insulating substrate, and a first semiconductor layer on the first semiconductor layer. In the method for manufacturing a thin film transistor comprising a laminated second semiconductor layer, an amorphous silicon layer having a thickness of 10 ° to 100 ° which becomes the first semiconductor layer under the condition that the temperature of the insulating substrate is 200 ° C. or more. After the formation of the amorphous silicon layer, the second semiconductor layer is formed under the condition that the temperature of the insulating substrate is set to 150 ° C. or less and the total thickness with the first semiconductor layer is 250 ° or less. Is formed so that the photosensitivity is lower than that of the first semiconductor layer.