JP2856667B2 - Differential circuit - Google Patents
Differential circuitInfo
- Publication number
- JP2856667B2 JP2856667B2 JP1931294A JP1931294A JP2856667B2 JP 2856667 B2 JP2856667 B2 JP 2856667B2 JP 1931294 A JP1931294 A JP 1931294A JP 1931294 A JP1931294 A JP 1931294A JP 2856667 B2 JP2856667 B2 JP 2856667B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- differential
- difference
- detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Feedback Control In General (AREA)
Description
【0001】[0001]
【産業上の利用分野】この発明は、例えば太陽センサの
CCDセンサ等のディジタル型の検出回路で周期的にサ
ンプリングした検出信号よりPID制御信号を生成する
ための微分処理の前処理として差分信号を取出す差分回
路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal detection circuit such as a CCD sensor for a sun sensor, which is used to generate a PID control signal from a detection signal periodically. It relates to a differential circuit to be extracted.
【0002】[0002]
【従来の技術】一般に、PID制御信号を生成するPI
D制御回路としては、図3に示すように、CCDセンサ
等のディジタル型検出回路10で周期的にサンプリング
した検出信号S(n)を比例回路11、積分回路12及
び微分回路13に導き、比例(P)、積分(I)及び微
分(D)を施して比例信号K・Sn、積分信号Sn及び
速度補償用の微分信号{S(n)−S(n−1)}/Δ
T×X(n)を生成した後、加算器14で加算してPI
D制御信号を得ている。この場合、微分回路13として
は、検出信号S(n)から差分回路13aで、1サンプ
リング毎の時間的差分信号S(n)−S(n−1)を求
めた後、除算器13bで差分で差分信号S(n)−S
(n−1)よりサンプリング周期ΔTを除算して速度補
償回路13cで速度補償ゲインを乗ずることにより微分
信号{S(n)−S(n−1)}/ΔT×X(n)を得
ている。2. Description of the Related Art Generally, a PI for generating a PID control signal is used.
As shown in FIG. 3, the D control circuit guides a detection signal S (n) periodically sampled by a digital detection circuit 10 such as a CCD sensor to a proportional circuit 11, an integrating circuit 12, and a differentiating circuit 13, and (P), integration (I) and differentiation (D), and a proportional signal K · Sn, an integration signal Sn and a differential signal {S (n) −S (n−1)} / Δ for speed compensation.
After generating T × X (n), adder 14 adds PI
D control signal is obtained. In this case, as the differentiating circuit 13, the difference circuit 13a calculates the temporal difference signal S (n) -S (n-1) for each sampling from the detection signal S (n), and then calculates the difference by the divider 13b. And the difference signal S (n) -S
The differential signal {S (n) −S (n−1)} / ΔT × X (n) is obtained by dividing the sampling period ΔT from (n−1) and multiplying by the speed compensation gain in the speed compensation circuit 13c. I have.
【0003】図4はこのような従来の差分回路を示すも
ので、検出回路10で周期的にサンプリングした検出信
号S(n)(図4中実線で示す)をアナログ遅延線1で
一定期間ΔTだけ遅延させた遅延信号S(n−1)(図
5(a)中破線で示す)を生成する。そして、この遅延
信号S(n−1)は、検出信号S(n)と共に差分アン
プ2に導かれて、その差分が取出され、図5(b)に示
すような差分信号S(n)−S(n−1)が生成され
る。FIG. 4 shows such a conventional difference circuit. A detection signal S (n) (indicated by a solid line in FIG. 4) periodically sampled by a detection circuit 10 is supplied to an analog delay line 1 for a predetermined period ΔT. A delay signal S (n-1) (indicated by a broken line in FIG. 5A) is generated. Then, the delay signal S (n-1) is guided to the difference amplifier 2 together with the detection signal S (n), and the difference is extracted, and the difference signal S (n)-as shown in FIG. S (n-1) is generated.
【0004】ところが、上記差分回路では、構成が複雑
な差分アンプ2を使用している構成上、複雑で、大形と
なるために、特に、宇宙搭載機器等のスペ―ス的要求の
厳しい電子機器に適用するのに不向きであるという問題
を有していた。However, in the above-mentioned differential circuit, since the configuration using the differential amplifier 2 having a complicated configuration is complicated and large, the electronic circuit is required to have a particularly strict space requirement for space-borne equipment and the like. There was a problem that it was unsuitable for application to equipment.
【0005】また、上記アナログ遅延線1に換えて、図
示しないサンプル・ホ―ルド回路を備えたものもある
が、同様に差分アンプを備えなければならないために、
同様の問題を有する。[0005] In addition, although there is a type provided with a sample-and-hold circuit (not shown) instead of the analog delay line 1, a difference amplifier must be provided similarly.
Have similar problems.
【0006】[0006]
【発明が解決しようとする課題】以上述べたように、従
来の差分回路では、複雑な差分アンプを備えなければな
らないために、構成が複雑で、大形となるという問題を
有していた。この発明は上記の事情に鑑みてなされたも
ので、時間的差分の正確な取出しを実現したうえで、構
成の簡略化と共に、小形化を図り得るようにした差分回
路を提供することを目的とする。As described above, the conventional difference circuit has a problem that the structure is complicated and large in size because a complicated difference amplifier must be provided. The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a differential circuit which can realize accurate extraction of a temporal difference, and which can be simplified and simplified in configuration. I do.
【0007】[0007]
【課題を解決するための手段】この発明は、検出回路で
周期的にサンプリングした検出信号の現時点と1サンプ
リング前の差分信号を取出してなる差分回路において、
前記検出回路で得た検出信号を微分して微分波形を有す
る信号を得る微分回路と、この微分回路で得た信号のピ
ーク値を1サンプリング周期保持して、1サンプリング
周期前の信号のピーク値との差分信号を生成するサンプ
ル・ホールド回路とを備えて構成したものである。SUMMARY OF THE INVENTION The present invention relates to a differential circuit for extracting a difference signal between the present time and one sample before a detection signal periodically sampled by a detection circuit.
A differentiating circuit for obtaining a signal having a differentiated waveform by differentiating the detection signal obtained by the detecting circuit; and holding the peak value of the signal obtained by the differentiating circuit for one sampling period to perform one sampling.
And a sample-and-hold circuit for generating a difference signal from the peak value of the signal before the cycle .
【0008】[0008]
【作用】上記構成によれば、差分信号は検出信号を微分
回路で微分した微分波形を有した信号に変換して、その
信号のピ―ク値をサンプル・ホ―ルド回路で、1サンプ
リング期間保持することにより得られる。従って、構成
が複雑な差分アンプを備えなくて済むことにより、その
構成の簡略化と共に、小形化が図れる。According to the above construction, the differential signal is converted into a signal having a differentiated waveform obtained by differentiating the detection signal by the differentiating circuit, and the peak value of the signal is sampled by the sample-and-hold circuit for one sampling period. Obtained by holding. Therefore, since it is not necessary to provide a differential amplifier having a complicated configuration, the configuration can be simplified and the size can be reduced.
【0009】[0009]
【実施例】以下、この発明の実施例について、図面を参
照して詳細に説明する。図1はこの発明の一実施例に係
る差分回路を示すもので、例えば前記図3の微分回路1
3における差分回路13aに対応される。すなわち、C
CDセンサ等の検出回路10の出力端には微分回路20
が接続される。この微分回路20はコンデンサC及び抵
抗Rで形成され、その出力端には前記除算器13b(図
3参照)に接続されるサンプル・ホ―ルド(S/H)回
路21が接続される。Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a differential circuit according to an embodiment of the present invention. For example, the differential circuit 1 shown in FIG.
3 corresponds to the difference circuit 13a. That is, C
A differentiating circuit 20 is connected to the output terminal of the detecting circuit 10 such as a CD sensor.
Is connected. The differentiating circuit 20 is formed by a capacitor C and a resistor R, and an output terminal thereof is connected to a sample hold (S / H) circuit 21 connected to the divider 13b (see FIG. 3).
【0010】上記構成により、検出回路10で周期的に
サンプリングされた検出信号S(n)(図2(a)参
照)は微分回路20に導かれて微分され、図2(b)に
示すように微分波形を有したパルス状信号に変換され
る。このパルス状信号は、その波高値(l 1 ,l 2 ,
l 3 ,l 4 )が1サンプリング前の検出信号S(n−1)
との差分値となり、検出信号S(n)の変化点で微分回
路20からS/H回路21に導かれる。このS/H回路
21は、微分波形のピーク値でサンプリングし、その
後、一定時間ΔTの期間保持して、図2(c)に示すよ
うな差分信号S(n)−S(n−1)を得て除算器13
b(図3参照)に出力し、前記と同様に微分信号{S
(n)−S(n−1)}/ΔT×(n)が生成される。With the above configuration, the detection signal S (n) (see FIG. 2A) periodically sampled by the detection circuit 10 is guided to the differentiating circuit 20 and differentiated, as shown in FIG. 2B. Is converted into a pulse-like signal having a differential waveform. This pulse signal has its peak value (l 1 , l 2 ,
l 3 , l 4 ) is the detection signal S (n−1) one sample before.
, And is led from the differentiating circuit 20 to the S / H circuit 21 at a change point of the detection signal S (n). The S / H circuit 21 samples at the peak value of the differential waveform, and then holds the signal for a certain period of time ΔT to obtain a difference signal S (n) −S (n−1) as shown in FIG. And the divider 13
b (see FIG. 3), and the differential signal {S
(N) −S (n−1)} / ΔT × (n) is generated.
【0011】このように、上記差分回路は、検出回路1
0の検出信号を微分回路20で微分して微分波形を有す
るピ―ク状信号に変換して、このピ―ク状信号のピ―ク
値をS/H回路21で1サンプリング期間保持すること
で、差分信号を得るように構成したことにより、従来の
ように、構成が複雑な差分アンプ2(図4参照)を備え
なくて済むために、可及的に構成の簡略化と共に、小形
化が図れる。なお、この発明は上記実施例に限ることな
く、その他、この発明の要旨を逸脱しない範囲で種々の
変形を実施し得ることは勿論のことである。As described above, the above-mentioned difference circuit is composed of the detection circuit 1
The detection signal of 0 is differentiated by the differentiating circuit 20 to be converted into a peak signal having a differentiated waveform, and the peak value of the peak signal is held by the S / H circuit 21 for one sampling period. Since the configuration is such that the differential signal is obtained, it is not necessary to provide the differential amplifier 2 (see FIG. 4) having a complicated configuration as in the related art, so that the configuration is simplified and the size is reduced as much as possible. Can be achieved. It should be noted that the present invention is not limited to the above-described embodiment, and it goes without saying that various modifications can be made without departing from the spirit of the present invention.
【0012】[0012]
【発明の効果】以上詳述したように、この発明によれ
ば、時間的差分の正確な取出しを実現したうえで、構成
の簡略化と共に、小形化を図り得るようにした差分回路
を提供することができる。As described above in detail, according to the present invention, there is provided a difference circuit capable of realizing an accurate extraction of a time difference, simplifying the configuration and reducing the size. be able to.
【図1】この発明の一実施例に係る差分回路を示す回路
構成図。FIG. 1 is a circuit diagram showing a differential circuit according to an embodiment of the present invention.
【図2】図1の動作を説明するために示した波形図。FIG. 2 is a waveform chart shown for explaining the operation of FIG. 1;
【図3】この発明の適用されるPID制御回路を示す回
路構成図。FIG. 3 is a circuit diagram showing a PID control circuit to which the present invention is applied.
【図4】従来の差分回路を示す回路構成図。FIG. 4 is a circuit configuration diagram showing a conventional difference circuit.
【図5】図4の動作を説明するために示した波形図。FIG. 5 is a waveform chart shown for explaining the operation of FIG. 4;
10…検出回路、11…比例回路、12…積分回路、1
3…微分回路、13a…差分回路、13b…除算器、1
3c…速度補償回路、14…加算器、20…微分回路、
21…サンプル・ホ―ルド回路。10 detection circuit, 11 proportional circuit, 12 integration circuit, 1
3 Differentiator circuit, 13a Difference circuit, 13b Divider, 1
3c: speed compensation circuit, 14: adder, 20: differentiation circuit,
21 ... Sample hold circuit.
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平2−92107(JP,A) 特開 平4−43168(JP,A) 特開 平3−106111(JP,A) (58)調査した分野(Int.Cl.6,DB名) G05B 11/00 - 11/60 G06G 7/18────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-2-92107 (JP, A) JP-A-4-43168 (JP, A) JP-A-3-106111 (JP, A) (58) Field (Int.Cl. 6 , DB name) G05B 11/00-11/60 G06G 7/18
Claims (1)
出信号の現時点と1サンプリング前の差分信号を取出し
てなる差分回路において、 前記検出回路で得た検出信号を微分して微分波形を有す
る信号を得る微分回路と、 この微分回路で得た信号のピーク値を1サンプリング周
期保持して、1サンプリング周期前の信号のピーク値と
の差分信号を生成するサンプル・ホールド回路とを具備
したことを特徴とする差分回路。1. A differential circuit for extracting a difference signal between the present time and one sample before a detection signal periodically sampled by a detection circuit, wherein a signal having a differential waveform is obtained by differentiating the detection signal obtained by the detection circuit. A differentiating circuit to obtain the peak value of the signal obtained by the differentiating circuit for one sampling cycle ,
And a sample-and-hold circuit for generating the differential signal of the above .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1931294A JP2856667B2 (en) | 1994-02-16 | 1994-02-16 | Differential circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1931294A JP2856667B2 (en) | 1994-02-16 | 1994-02-16 | Differential circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH07230302A JPH07230302A (en) | 1995-08-29 |
JP2856667B2 true JP2856667B2 (en) | 1999-02-10 |
Family
ID=11995903
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1931294A Expired - Fee Related JP2856667B2 (en) | 1994-02-16 | 1994-02-16 | Differential circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2856667B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2023276707A1 (en) * | 2021-07-02 | 2023-01-05 |
-
1994
- 1994-02-16 JP JP1931294A patent/JP2856667B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH07230302A (en) | 1995-08-29 |
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