JP2832972B2 - Image data quantization circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a quantization circuit for image data applied to compression-encode image data.

[Conventional technology]

Each pixel (sample) of digitized image data
Various encoding schemes have been proposed for reducing the number of bits of an image signal using correlation of image signals. The present applicant filed Japanese Patent Application Laid-Open
As described in Japanese Patent No. 144989, a high-efficiency coding apparatus that obtains a dynamic range that is a difference between a maximum value and a minimum value of a plurality of pixels included in a two-dimensional block, and performs encoding adapted to the dynamic range. Has been proposed.
Also, as described in Japanese Patent Application Laid-Open No. 62-92620, a high-efficiency coding apparatus that performs coding suitable for a dynamic range with respect to a three-dimensional block formed from pixels in a plurality of regions belonging to a plurality of frames. Has been proposed. Further, as described in Japanese Patent Application Laid-Open No. 62-128621, a variable length encoding method in which the number of bits changes according to a dynamic range so that the maximum distortion generated when quantization is performed is constant. Proposed.

Encoding adapted to these dynamic ranges (hereinafter abbreviated as ADRC) is based on the fact that, in a small area (block) obtained by dividing one screen, a bit per pixel is utilized by utilizing the fact that an image has a strong correlation. This is a highly efficient coding method that reduces the number. That is, the difference between the minimum value or the maximum value in the block and the level of each pixel is smaller than the original level, and this difference is quantized with a smaller number of bits (eg, 4 bits) than the original number of bits (eg, 8 bits). It is possible to do.

The present invention can be applied to the quantization of the level normalized by the maximum value or the minimum value in the above-mentioned ADRC or to the compression of the n-bit code obtained by the ADRC to m bits (n> m). . However, the present invention is not limited to ADRC, and can be applied to a quantization circuit that compresses an n-bit digital image signal into m bits.

As an example, in ADRC that performs 2-bit quantization, the dynamic range DR of a block, which is the difference between the maximum value MAX and the minimum value MIX, is equally divided into four level ranges, and the minimum value
The value of the pixel after MIN has been removed is represented by a 2-bit quantization code corresponding to the level range. On the decoding side, one of the central decoding representative levels I0 to I3 of each level range is decoded from the dynamic range DR and the quantization code,
The pixel data in the block is restored by adding the minimum value MIN to the decoded value.

FIG. 6 shows an example of quantization in ADRC. FIG. 6 shows an example of a one-dimensional ADRC in which one block is composed of six pixels that are continuous in the horizontal direction. Data indicated by white dots is a true value of 4 bits, 8 bits, etc. of the pixels in the block. And has a horizontal change as indicated by the solid line 101.
In the case of encoding by the above-described 2-bit ADRC, a restoration level indicated by x is obtained on the decoding side, and a change in a signal indicated by a broken line 102 occurs in the restored image.

FIG. 7 shows another example of quantization in ADRC. Seventh
The figure shows a temporal change of a pixel at a position spatially corresponding to each of six consecutive frames in the time direction. For simplicity, it is assumed that each block including these six pixels has the same maximum value MAX and minimum value MIN. Data indicated by white dots is the true value of the pixel, and has a change in the time direction indicated by a solid line 103. In the case of encoding with the above 2-bit ADRC,
On the decoding side, a decoding level indicated by X is obtained, and a signal change indicated by a broken line 104 occurs in the restored image.

[Problems to be solved by the invention]

In conventional quantization, the original pixel level is replaced with the closest decoded representative level in order to reduce the quantization error and improve the S / N. However, even if quantitatively good, visually noticeable degradation may occur in the restored image. In the example shown in FIG. 6, the original gentle change 101 in the horizontal direction becomes a sharp change 102 after restoration, and visually noticeable noise (deterioration) occurs in the restored image. This noise is similar to that obtained by reducing snow noise generated in a television reception image at the time of a weak electric field, and is a noise that has been generated. The occurrence of such a problem is based on the fact that humans are sensitive to the differential characteristics of an image when recognizing the image.

Similar to the spatial change, in the example shown in FIG. 7, the original gentle change 103 in the time direction becomes a sharp change 1 after restoration.
04, and the same noise as described above occurs in the restored image.

As can be seen from FIG. 6 and FIG.
The data of two samples which are spatially adjacent to each other or spatially correspond to the original digital data and are temporally connected are different,
This is because one and the other are quantized into different 2-bit codes. That is, noise occurs when the data of the two samples is included above and below the boundary between two adjacent level regions.

Therefore, an object of the present invention is to provide an image data quantization circuit that can preserve the spatial change of the original image signal and visually improve the quality of the restored image even if a quantitative error increases. Is to provide.

Another object of the present invention is to quantize image data in which output data having a level corresponding to original data is obtained by performing quantization in consideration of visual characteristics only when there is a possibility that noise may occur. It is to provide a circuit.

[Means for solving the problem]

According to the present invention, in an image data quantization circuit for compressing digital data quantized by n bits into data of m bits (n> m), a code of upper m bits of the digital data of n bits is spatially adjacent. Different between two sample data or spatially corresponding two sample data that are temporally continuous, and one and the other of the two sample data take levels above and below the m-bit code change point, respectively. , A spatial change amount between the true value of the pixel of interest and the true value of the reference pixel around the pixel of interest or the true value of the pixel of interest, and a temporally preceding pixel of interest. And a temporal change amount between the true value of the reference pixel and a spatially corresponding change amount of the reference pixel with respect to the decoded value of the quantization code is detected. Or time And a quantizing circuit for determining a decoding representative value closest to a typical change amount and selecting a quantization code corresponding to the decoding representative value. An image data quantization circuit characterized in that output data of a quantization circuit is selected instead of m-bit digital data formed from data.

[Action]

In order to further compress the 4-bit quantization code DT generated by ADRC encoding, the upper 2 bits of the quantization code DT are selected. The upper two bits and the two bits from the quantization circuit 21 in consideration of visual characteristics are selected by the switch circuit 13. The switch circuit 13 is controlled by an output signal of the detection circuit 19. The detection circuit 19 detects that two spatially adjacent two-sample data or two spatially corresponding two-time continuous two-sample data are different and included in different level regions in the case of 2-bit quantization. . At the time of this detection, the output signal of the quantization circuit 21 is selectively output.

The case where the quantization circuit 21 forms output data having the same spatial change as the original data will be described. The difference (horizontal change) Δr (= x1−x0) between the true value x1 of the target pixel and the true value x0 of the peripheral pixel, for example, the previous pixel, is detected.
The decoding level X0 of the pixel x0 is generated by the local decoder. In addition, four decoding representative levels (I0 + MIN, I1 + MI
N, I2 + MIN, I3 + MIN) are generated by the local decoder. In the subtraction circuits 40 to 43, differences (predicted change amounts) Δ0, Δ1, Δ2, Δ3 between the decoding representative level and the decoding level X0 are calculated. That is, Δ0 = (I0 + MIN) −X0 Δ1 = (I1 + MIN) −X0 Δ2 = (I2 + MIN) −X0 Δ3 = (I3 + MIN) −X0 Among these four differences, the change that the original image data has The change amount closest to the amount Δr is detected. Therefore, in the subtraction circuits 34 to 37, (β0 = Δr−Δ0)
(Β1 = Δr−Δ1) (β2 = Δr−Δ2) (β3 = Δ
(r−Δ3) is subtracted, a minimum subtraction output is detected, and a quantization code corresponding to this detection is output to the code selection circuit 39.
Is selected. That is, when the difference from Δ0 is the smallest, the quantization code of (00) is selected, and thereafter, the quantization codes of (01), (10), and (11) are similarly selected.

As described above, so that the restored image signal has a change amount closest to the spatial change amount of the original image data,
Since the quantization is performed, visual deterioration of the image quality of the restored image can be prevented. In addition, when there is no possibility that visually noticeable noise is generated in the restored image, quantitative quantization is performed, so that output data that is faithful in level to the original data can be obtained.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. This description is made in the following order.

a. Overall configuration and operation of one embodiment b. Quantization circuit in consideration of visual characteristics c. Modification a. Overall configuration and operation of one embodiment In FIG. A digital video signal in which one pixel (one sample) is quantized to 8 bits is supplied. The blocking circuit 2 converts the data order of the input digital video signal from the scanning order to the block order. For example, a screen of one frame is subdivided to form a block of (4 × 4 = 16 pixels) as shown in FIG. In FIG. 2, N-1
Indicates the previous block, and N indicates the block of interest to be coded. In the block, the data of the top leftmost pixel as viewed in the drawing is transmitted first,
Next, data of three pixels arranged in a horizontal direction is transmitted,
Further, in the second line, the same data is transmitted, and finally, the data of the rightmost lowermost pixel is transmitted.

The output signal of the blocking circuit 2 is supplied to the maximum value and minimum value detection circuit 3, and the maximum value, MAX, and minimum value MIN of the pixels included in each block are detected, respectively. The maximum value MAX and the minimum value MIN are supplied to the subtraction circuit 6, and a dynamic range DR, which is a difference between the two, is calculated. Dynamic range
DR and the minimum value MIN are taken out to output terminals 10 and 11 via delay circuits 8 and 9, respectively. Although not shown, a framing circuit is connected to the output terminals 10, 11, and 16. The framing circuit converts a dynamic range DR, a minimum value MIN, and a code signal compressed to 2 bits to be described later into a frame signal. It is converted into a form, and error correction coding processing is performed as necessary. Transmission data is obtained from the framing circuit.

The output signal of the blocking circuit 2 is supplied to the subtraction circuit 5 via the delay circuit 4. The delay circuit 4 delays the output signal of the blocking circuit 2 for a time required to detect the maximum value MAX and the minimum value MIN. The subtraction circuit 5 has a minimum value MI
N is supplied, and data after the minimum value is removed from the subtraction circuit 5 is obtained. The data normalized by the minimum value removal processing is supplied to the quantization circuit 7. The dynamic range DR is supplied to the quantization circuit 7 and the quantization circuit 7 outputs, for example, 4
The bit quantization code DT is extracted.

In the quantization circuit 7, the dynamic range DR is set to (2 ⁴ = 1
6) The value of the output data of the subtraction circuit 5 is divided by the quantization step which is the equally divided value, and the obtained quotient is truncated to form an integer (quantized code DT).
The quantization circuit 7 can be realized by a ROM or a division circuit.

The 4-bit data DT from the quantization circuit 7 is supplied to a 2-bit selection circuit 12 for selecting the upper 2 bits and a sample delay circuit 17. The upper 2 bits selected by the 2-bit selection circuit 12 are supplied to one input terminal 14 of the switch circuit 13. The other input terminal 15 of the switch circuit 13 is supplied with a 2-bit output signal of a quantization circuit 21 (to be described in detail later) that takes into account visual characteristics. Input terminal of quantization circuit 21
The output signal of the blocking circuit 2 is supplied to 22, the dynamic range DR and the minimum value MIN are supplied to the quantization circuit 21 from the terminals 23 and 24, and the quantization output is generated from the output terminal 25. I do. Output terminal 16 of switch circuit 13
, A 2-bit output signal is obtained. In this embodiment, the original 8-bit image data is compressed to 4-bit data by ADRC, and further compressed to 2-bit data.

The switch circuit 13 is controlled by an output signal of the coincidence detection circuit 19. The coincidence detecting circuit 19 determines that the coincidence becomes "1" (high level) when two consecutive sample data in the horizontal direction are different and these sample data take a level near a change point of a 2-bit code. Generate a signal. Other than the above, a signal which becomes “0” (low level) is generated. The output signal of the coincidence detection circuit 19 is generated for each sample data. When the coincidence signal (“1”) is generated, the input terminal 15 of the switch circuit 13 is selected, and thus the output signal of the quantization circuit 21 considering the visual characteristics is output. The input signal 14 of the switch circuit 13 is selected by the coincidence signal of "0", that is, the signal of the non-coincidence. Therefore, the code signal of the upper 2 bits from the 2-bit selection circuit 12 is output.

A sample delay circuit 18 is connected to a sample delay circuit 17 to which the output signal of the ADRC quantization circuit 7 is supplied. Two horizontally continuous sample data from the sample delay circuits 17 and 18 are supplied to the coincidence detection circuit 19. The match detection circuit 19 is supplied with reference data from the ROM 20.

As shown in FIG. 3, a 4-bit quantization code DT (1111) corresponding to the maximum value MAX is formed by ADRC from a 4-bit quantization code DT (0000) corresponding to the minimum value MIN of the block. Upper 2 bits (MSB) of this 4-bit code
And the second MSB) are selected by the 2-bit selection circuit 12. Therefore, two-bit code signals (00) (01) (10) (11) are formed. In FIG. 3, the 4-bit code marked with * has values above and below the change point of the 2-bit code. If the code of two samples that are continuous in the horizontal direction is one of the upper and lower codes above and below the change point, as described at the beginning, deterioration occurs in which a gradual level change becomes a sharp change. Therefore, in this case, the output code of the quantization circuit 21 that performs quantization such that the level change becomes close to the original image data is selected.

The ROM 20 generates 8-bit reference data consisting of codes marked with * above and below the change point. The reference data is as follows.

(00110100) (01000011) (01111000) (10000111) (10111100) (11001011) In the coincidence detection circuit 19, the two-sample data (8 bits) from the sample delay circuits 17 and 18 and the six reference data described above are used. Be compared. This comparison can be done at once in parallel, or serially in time division.

b. Quantization Circuit Considering Visual Characteristics FIG. 4 shows an example of the quantization circuit 21 considering visual characteristics. An output signal of the blocking circuit 2 from the input terminal 22 is supplied to one input terminal of the selector 30 via delay circuits 27, 28 and 29. The delay amount DL1 of the delay circuit 27 corresponds to the time required for detecting the maximum value and the minimum value. The delay amount DL2 of the delay circuit 28 corresponds to the horizontal interval between pixels, that is, one sample period.

The output signal of the delay circuit 28 is supplied to the other input terminal of the selector 30. The output signal of the delay circuit 27 and the output signal of the selector 30 are supplied to the subtraction circuit 31, and the horizontal difference Δr of the original pixel data (true value) is calculated. Assuming that the true value of the pixel of interest is x1 and the true value of the pixel one sampling cycle before is x0, it is expressed as (Δr = x1−x0).

However, in the case of the pixel in the leftmost column of the block, since the data of the previous pixel does not exist in the block, the previous block N
It is necessary to form a difference using the data of the rightmost pixel of -1. When the leftmost pixel in the block is supplied to the subtraction circuit 31, the selector 30 selects the data of the rightmost pixel of the previous block from the delay circuit 29. The delay amount DL3 of the delay circuit 29 is set to (one block period−3 sample periods). The selector 30 is controlled by a select signal from a select signal generating circuit 32. Select signal generation circuit
The clock signal (sampling clock and block clock) from the terminal 33 is supplied to the terminal 32, and the select signal for controlling the selector 30 is formed as described above.

The difference Δr between the true values of the image data from the subtraction circuit 31 is supplied to the subtraction circuits 34, 35, 36, and 37. These subtraction circuits 34
The output signals .beta.0, .beta.1, .beta.2, and .beta.3 of .about.37 are supplied to the minimum value detection circuit 38, and the minimum output signal is detected. The detection signal of the minimum value detection circuit 38 is supplied to the code selection circuit 39,
A 2-bit code signal is generated from the code selection circuit 39. The code signal is output to the output terminal 25. In the code selection circuit 39, 2-bit code signals (00) (01) (10) (1) corresponding to the respective decoded representative levels I0, I1, I2, and I3.
One of 1) is selected.

 The selection operation of the code selection circuit 39 is as follows.

 If β0 is the minimum, (00) is selected.

 If β1 is the minimum, (01) is selected.

 If β2 is minimum, (10) is selected.

 If β3 is the minimum, (11) is selected.

Signals Δ0, Δ1, Δ2, Δ3 are supplied from the subtraction circuits 40, 41, 42, 43 to the subtraction circuits 34 to 37. These signals Δ0 to Δ3 are the respective differences between the decoding level (X0) of the pixel before the pixel of interest and the four decoding representative levels, and are prediction change amounts. Subtraction circuits 34 to 37 and minimum value detection circuit 38
Detects the signal closest to the horizontal difference Δr of the true value of the image data among the signals Δ0 to Δ3. That is, a code signal corresponding to a decoded representative level that causes a change closest to the horizontal signal change of the original image signal is selected for the target pixel.

The local decoders 48, 49, 50,
Decoding representative level formed by 51 (MIN + I0) (MIN + I1)
(MIN + I2) and (MIN + I3) are supplied. To generate these decoded representative levels, the local decoders 48-51
Is supplied with the dynamic range DR and the minimum value MIN,
Also, 2-bit code signals (00) (01) (10) (11) are supplied from terminals 44, 45, 46 and 47, respectively. Each of the local decoders 48 to 51 and 52 is constituted by a ROM to which a dynamic range DR and a quantization code DT are supplied as addresses, and adds a minimum value MIN to data read from the ROM.

The decoding level X0 of the pixel before the pixel of interest is formed by the local decoder 52, the delay circuits 53 and 54, and the selector 55. The code signal from the code selection circuit 39 is supplied to the local decoder 52, and the local decoder 52 generates a decoding level of the pixel of interest. This decoding level is supplied to one input terminal of a selector 55 via a delay circuit 53 having a delay amount DL2 of one sampling period. The output signal of the delay circuit 53 is supplied to the other input terminal of the selector 55 via the delay circuit 54 having a delay amount DL3 of (one block period−3 sampling periods). The selector 55 is the selector described above.
As in the case of 30, control is performed by a select signal from a select signal generating circuit 32.

The delay circuits 53 and 54 and the selector 55
The decoding level X0 of the pixel x0 before the pixel of interest x1 is generated in the same manner as in 8, 29 and the selector 30. This decoding level is supplied to subtraction circuits 40 to 43. Therefore, the signals Δ0 to Δ3 generated from the subtraction circuits 40 to 43 are the predicted differences between the four decoded representative levels and the decoded level X0 of the previous pixel as described below.

Δ0 = (I0 + MIN) −X0 Δ1 = (I1 + MIN) −X0 Δ2 = (I2 + MIN) −X0 Δ3 = (I3 + MIN) −X0 In the subtraction circuits 34 to 37, β0 = Δr−Δ0 β1 = Δr−Δ1 β2 = Δr−Δ2 An output signal of β3 = Δr−Δ3 is formed. By the minimum value detection circuit 38,
Since the smallest one of β0 to β3 is detected, the code selection circuit 39 selects the 2-bit code whose predicted change is closest to the true change Δr.

It is also effective to perform quantization so as to faithfully represent not only the horizontal difference in the above-described embodiment but also two-dimensional changes in the horizontal, vertical, and oblique directions.
For example, as shown in FIG. 5, the level of the pixel of interest is x, and the levels of peripheral pixels above, left, and diagonally above are a,
In the case of b and c, the change amount Δr of the true value of the target pixel and the predicted change amount Δi (i = 0, 1, 2, 3) are calculated as the difference between the average value of the levels of the peripheral pixels and the level of the target pixel. Desired. That is, Δr = (3x-abc) Δi = (3Ii-ABC) (However, A, B and C are obtained by decoding the quantization codes obtained for a, b and c, respectively. The quantization code signal that produces Δi closest to Δr is selected.

In order to determine the amount of change in space, not only the average value,
A prediction value obtained by spatial prediction may be used. That is, assuming that the predicted value is x ', x' = b + 1/2 (ca) [Delta] r = xx '= xb-1 / 2 (ca) [Delta] i = Ii-B-1 / 2 ( CA) Then, in the same manner as described above, the quantization code signal that generates Δi closest to Δr is selected.

c. Modification In the above embodiment, the spatial change after decoding is
The quantization circuit 21 performs quantization so as to be close to the original image data. However, at a spatially corresponding position, a quantum that quantizes so that a change between two temporally continuous sample data, for example, two sample data having a time difference between one frame, is close to a true value change. A conversion circuit may be used.

Also, the present invention provides a variable-length ADRC and three-dimensional block.
The present invention can be applied to a quantization circuit for other high efficiency codes such as ADRC.

〔The invention's effect〕

According to the present invention, it is possible to prevent visually conspicuous deterioration in which a gentle change of the original image data is transformed into a drastic change after decoding. Further, in the present invention, quantization is performed to preserve the change of the original image signal only when there is a risk of occurrence of the above-described degradation, and in other cases, quantization based on the level is performed. It is possible to perform quantization with good correspondence.

[Brief description of the drawings]

FIG. 1 is an overall block diagram of one embodiment of the present invention, and FIG.
FIG. 3 is a schematic diagram of an example of a block, FIG. 3 is a schematic diagram used to explain a process of compressing a 4-bit code into 2 bits, and FIG. 4 is a block diagram of an example of a quantization circuit considering visual characteristics. , FIG. 5 is a schematic diagram used for explaining another example of detection of a spatial change, and FIGS. 6 and 7 are schematic diagrams used for explaining conventional quantization. Explanation of main symbols in the drawing 1: input terminal of digital video signal, 7: quantization circuit of ADRC, 12: circuit for selecting upper 2 bits, 13: switch circuit, 16: output terminal, 19: match detection circuit, 31: subtraction circuit that generates a change in true value, 38: minimum value detection circuit, 39: code selection circuit, 40, 41, 42, 43: subtraction circuit that generates a predicted change, 48, 49, 50, 51 , 53: Local decoder.

Claims (1)

(57) [Claims] An image data quantization circuit for compressing digital data quantized by n bits into data of m bits (n> m), wherein a code of upper m bits of the digital data of n bits is spatially Are different between two sample data adjacent to or spatially corresponding to each other and temporally continuous, and one and the other of these two sample data set the level above and below the change point of the m-bit code. A detection circuit that detects a state to be taken, a spatial change amount between the true value of the target pixel and the true value of a reference pixel around the target pixel or the true value of the target pixel,
A temporal change amount between the true value of the reference pixel that temporally precedes the target pixel and that corresponds spatially is detected, and the spatial or temporal change of the reference pixel with respect to the decoded value of the quantization code is detected. A quantizing circuit configured to determine a decoding representative value whose temporal variation is closest to the detected spatial or temporal variation and to select a quantization code corresponding to the decoding representative value. When the detection circuit detects the state,
An image data quantization circuit, wherein output data of said quantization circuit is selected instead of m-bit digital data formed from bit digital data.