JP2811021B2 - Semiconductor package and manufacturing method thereof - Google Patents

Semiconductor package and manufacturing method thereof

Info

Publication number
JP2811021B2
JP2811021B2 JP2114124A JP11412490A JP2811021B2 JP 2811021 B2 JP2811021 B2 JP 2811021B2 JP 2114124 A JP2114124 A JP 2114124A JP 11412490 A JP11412490 A JP 11412490A JP 2811021 B2 JP2811021 B2 JP 2811021B2
Authority
JP
Japan
Prior art keywords
insulating base
lid
semiconductor package
concave curved
cavity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2114124A
Other languages
Japanese (ja)
Other versions
JPH0410643A (en
Inventor
元秀 荒山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2114124A priority Critical patent/JP2811021B2/en
Publication of JPH0410643A publication Critical patent/JPH0410643A/en
Application granted granted Critical
Publication of JP2811021B2 publication Critical patent/JP2811021B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体素子を収納するための半導体パッケー
ジおよびその製造方法に関する。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package for accommodating a semiconductor element and a method for manufacturing the same.

〔従来の技術〕[Conventional technology]

半導体素子を収納するためのパッケージは、短辺にそ
った横断面を第8図に示すようにアルミナなどのセラミ
ック材からなる絶縁基体21と蓋体22、および外部リード
端子23により構成されている。そして、絶縁基体21のキ
ャビティ部21a底面に、金(Au)などの固着用材料25を
塗布して、半導体素子24を固着し、該半導体素子24の各
電極をワイヤ26によって外部リード端子23に接続した
後、蓋体22をかぶせて、互いのガラス層27a,27bを加熱
溶融させ、一体化することによって気密封止するように
なっていた。
As shown in FIG. 8, the package for housing the semiconductor element is composed of an insulating base 21 made of a ceramic material such as alumina, a lid 22, and external lead terminals 23, as shown in FIG. . Then, a fixing material 25 such as gold (Au) is applied to the bottom surface of the cavity portion 21a of the insulating base 21 to fix the semiconductor element 24, and each electrode of the semiconductor element 24 is connected to the external lead terminal 23 by a wire 26. After the connection, the lid 22 was covered, and the glass layers 27a and 27b were heated and melted, and then hermetically sealed by integrating them.

〔従来技術の課題〕[Problems of the prior art]

上記半導体パッケージにおいて、外部リード端子23の
数は28本程度であったが、近年40本あるいは48本と多く
なっている。それに伴い、半導体パッケージを構成する
絶縁基体21、蓋体22の長辺方向の長さが50mm以上と長い
ものが必要となっている。
In the above semiconductor package, the number of external lead terminals 23 was about 28, but in recent years it has increased to 40 or 48. Along with this, it is necessary that the length of the insulating base 21 and the lid 22 in the long side direction constituting the semiconductor package be as long as 50 mm or more.

ところが、上記50mm以上の長辺長さを持つ絶縁基体2
1、蓋体22をセラミックスで形成すると、焼成に±70μ
m程度のソリが発生することは避けられなかった。
However, the insulating substrate 2 having a long side length of 50 mm or more
1.When the lid 22 is made of ceramic,
The occurrence of warpage of about m was inevitable.

そのため、第9図の長辺方向の断面図を示すように、
絶縁基体21、蓋体22の封止面側が凸状となるようにソリ
が発生すると、ガラス封止時に両端部分でガラス層27が
開きやすく、シール不良が発生しやすいという問題点が
あった。
Therefore, as shown in the cross-sectional view in the long side direction of FIG.
If warpage occurs so that the sealing surfaces of the insulating base 21 and the lid 22 are convex, the glass layers 27 are likely to open at both ends during glass sealing, and there is a problem that poor sealing is likely to occur.

〔課題を解決するための手段〕[Means for solving the problem]

上記に鑑みて本発明は、セラミックパッケージを構成
する絶縁基体および/または蓋体の封止面をあらかじめ
凹曲面としておくことによって、ガラス封止時に端部が
開くことを防止したものである。
In view of the above, the present invention prevents an end portion from opening at the time of glass sealing by previously forming a sealing surface of an insulating base and / or a lid constituting a ceramic package as a concave curved surface.

なお、本発明における凹曲面とは、中央部が端部にく
らべてなめらかに窪んだ形状のことであるが、長方形の
パッケージの場合は、少なくとも長辺方向に沿って中央
部が窪んだ形状となっていればよい。
In addition, the concave curved surface in the present invention is a shape in which the central portion is smoothly depressed as compared with the end portion, but in the case of a rectangular package, at least the central portion is depressed along the long side direction. It just needs to be.

〔実施例〕〔Example〕

以下、本発明実施例を図によって説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

第1図に長辺方向の断面図を示すように、本発明の半
導体パッケージを構成する絶縁基体1はキャビティ部1a
を形成した側の封止面1bが深さxの凹曲面となってい
る。一方蓋体2の封止面2aも深さyの凹曲面となってお
り、両者をガラス封止すると、端部が開くことはない。
As shown in the cross-sectional view in the long side direction in FIG. 1, the insulating base 1 constituting the semiconductor package of the present invention has a cavity 1a.
Is a concave curved surface having a depth x. On the other hand, the sealing surface 2a of the lid 2 is also a concave curved surface having a depth of y, and when both are sealed with glass, the ends do not open.

また、上記実施例では絶縁基体1と蓋体2の両方の封
止面1b,2aを凹曲面としたが、いずれか一方のみを凹曲
面とし、他方を平坦な面としてもよい。
In the above embodiment, both the sealing surfaces 1b and 2a of the insulating base 1 and the lid 2 are concave curved surfaces, but only one of them may be a concave curved surface and the other may be a flat surface.

さらに、上記凹曲面の深さx,yについては、それぞれ
0〜100μmの範囲内とすればよく、絶縁基体1と蓋体
2の両方の封止面1b,2aを凹曲面とする場合は、深さx,y
の和が0〜100μmとなるようにすれば良い。
Further, the depths x and y of the concave curved surfaces may be in the range of 0 to 100 μm, respectively. When both the sealing surfaces 1 b and 2 a of the insulating base 1 and the lid 2 are concave curved surfaces, Depth x, y
May be set to be 0 to 100 μm.

また、第1図に示す形状の絶縁基体1、蓋体2を製造
するためには、第2図に示すように、ダイ11、上パンチ
12、第1下パンチ13、第2下パンチ14からなるプレス成
形装置において、第1下パンチ13の押圧面を凸状として
おき、セラミック原料粉末15をプレス成形し、得られた
成形材を焼成することによって製造することができる。
In order to manufacture the insulating base 1 and the lid 2 having the shapes shown in FIG. 1, as shown in FIG.
12, in a press forming apparatus including the first lower punch 13 and the second lower punch 14, the pressing surface of the first lower punch 13 is made convex, the ceramic raw material powder 15 is press-formed, and the obtained formed material is fired. It can be manufactured by doing.

次に本考案の他の実施例を説明する。 Next, another embodiment of the present invention will be described.

第3図に長辺方向の断面図を示すように、本考案の半
導体パッケージを構成する絶縁基体1は、キャビティ部
1aを形成した側の封止面1bが、深さxの凹曲面となって
おり、この封止面1bのキャビティ部1a周辺に、高さ100
μm以下の微小な突起1cが複数個形成してある。一方蓋
体2の封止面2aは平坦な面となっており、両者をガラス
封止すると、端部が開くことはない。
As shown in the cross-sectional view in the long side direction in FIG. 3, the insulating base 1 constituting the semiconductor package of the present invention has a cavity portion.
The sealing surface 1b on the side where 1a is formed is a concave curved surface having a depth x, and a height of 100 around the cavity 1a of the sealing surface 1b.
A plurality of minute projections 1c of not more than μm are formed. On the other hand, the sealing surface 2a of the lid 2 is a flat surface, and when both are sealed with glass, the ends do not open.

また、前記実施例と同様に、絶縁基体1と蓋体2の両
方の封止面1b,2aを凹曲面としたり、あるいは蓋体2の
封止面2aのみを凹曲面として、絶縁基体1の封止面1bを
平坦面とすることもできる。
Further, similarly to the above-described embodiment, the sealing surfaces 1b and 2a of both the insulating base 1 and the lid 2 are formed as concave curved surfaces, or only the sealing surface 2a of the lid 2 is formed as a concave curved surface. The sealing surface 1b may be a flat surface.

この場合の凹曲面の深さxについても前記実施例と同
様に0〜100μmとすればよく、絶縁基体1と蓋体2の
両方の封止面1b,2aを凹曲面とする場合は、両方の深さ
の和が0〜100μmとなるようにすれば良い。
In this case, the depth x of the concave curved surface may be set to 0 to 100 μm similarly to the above-described embodiment, and when both the sealing surfaces 1b and 2a of the insulating base 1 and the lid 2 are concave curved surfaces, both are set. May be set so that the sum of the depths becomes 0 to 100 μm.

ここで、第3図に示す絶縁基体1の製造方法を説明す
る。
Here, a method of manufacturing the insulating base 1 shown in FIG. 3 will be described.

まず、第4図に示すように、ダイ11、上パンチ12、第
1下パンチ13、第2下パンチ14によって構成されるプレ
ス成形装置を用いてセラミック原料粉末15をプレス成形
する(第3図と上下方向逆になっている)。このとき、
第1下パンチ13の押圧面は平坦面で、中央部に微小な凹
部13aを形成している。
First, as shown in FIG. 4, a ceramic raw material powder 15 is press-formed using a press forming apparatus including a die 11, an upper punch 12, a first lower punch 13, and a second lower punch 14 (FIG. 3). And upside down). At this time,
The pressing surface of the first lower punch 13 is a flat surface, and has a minute concave portion 13a in the center.

したがって、このようにしてプレス成形された成形体
は、第5図(a)に示すように封止面1bが平坦で、かつ
中央部に突起1cを有する形状となる。そして、この未焼
成の絶縁基体1を、突起1cを下にして棚板16上に載置
し、焼成すると、焼成中に端部がたれ下がるため、第5
図(b)に示すように、絶縁基体1の封止面1bは凹曲面
となる。なお、このときの凹曲面の深さxは、突起1cの
高さと同じになるため、突起1cの高さを調節することに
よって、自由に凹形状の深さxを調整できる。
Accordingly, the molded body press-molded in this manner has a shape having a flat sealing surface 1b and a projection 1c at the center as shown in FIG. 5 (a). When the unsintered insulating base 1 is placed on the shelf 16 with the projection 1c facing down and fired, the end thereof sags during firing.
As shown in FIG. 2B, the sealing surface 1b of the insulating substrate 1 has a concave curved surface. In addition, since the depth x of the concave curved surface at this time is the same as the height of the projection 1c, the depth x of the concave shape can be freely adjusted by adjusting the height of the projection 1c.

また、上に突起1cが封止面に残るが、この突起1cの高
さ以上にガラスを塗布するため、封止時に問題が生じる
ことはない。むしろ、ガラスのスクリーン印刷時に、上
記突起1cが高さの目安となり、ガラス厚みのバラつきを
少なくできるという効果がある。
In addition, although the projection 1c remains on the sealing surface, glass is applied to a height equal to or higher than the height of the projection 1c, so that no problem occurs at the time of sealing. Rather, at the time of screen printing of glass, the projections 1c serve as a measure of the height, and there is an effect that variation in the glass thickness can be reduced.

さらに、この実施例では、第3図に示すように、絶縁
基体1のキャビティ部1aの裏面1dは凸曲面となるが、こ
れは、キャビティ部1aに半導体素子を固着する際に、固
着用材料を溶融させるために下から接触させるヒータの
熱が伝わりやすくなり、非常に好都合である。
Further, in this embodiment, as shown in FIG. 3, the back surface 1d of the cavity portion 1a of the insulating base 1 has a convex curved surface. This is very convenient because the heat of the heater which is brought into contact from below to melt the heat is easily transmitted.

また、この実施例では第5図(a)(b)に示すよう
に焼成時にキャビティ部1aが下面となるため、キャビテ
ィ部1a内にゴミなどが付着することを防止できるととも
に、キャビティ部1aの裏面1dが棚板16と接触しないた
め、キズがつきにくく、さらに、複数の成形体を重ねて
焼成できるなどの効果がある。
Further, in this embodiment, since the cavity portion 1a becomes the lower surface during firing as shown in FIGS. 5 (a) and 5 (b), it is possible to prevent dust and the like from adhering to the inside of the cavity portion 1a and to prevent the cavity portion 1a from being attached. Since the back surface 1d does not come into contact with the shelf 16, scratches are less likely to occur, and further, there are effects such as a plurality of molded bodies that can be stacked and fired.

なお、上記突起1cの形状は、第6図(a)に示すよう
に、丸型の突起1cをキャビティ部1aの周囲に4個形成し
たり、あるいは第6図(b)に示すように、長円形の突
起1cをキャビティ部1aの両側に2個形成すれば良い。
The shape of the protrusion 1c may be such that four round protrusions 1c are formed around the cavity 1a as shown in FIG. 6 (a), or as shown in FIG. 6 (b). It is sufficient to form two elliptical protrusions 1c on both sides of the cavity 1a.

さらに、本発明の他の実施例を説明する。 Further, another embodiment of the present invention will be described.

上記第3図に示す実施例では、絶縁基体1のキャビテ
ィ部1aの周囲に突起1cを形成したが、逆にキャビティ部
1aの裏面1dの端部に突起を形成することもできる。たと
えば、第7図(a)に示すように、絶縁基体1の裏面1d
の端部に突起1cを有するようにプレス成形し、この成形
体を、突起1cを下側にして棚板16上に載置し、焼成すれ
ば、中央部が窪むことによって封止面1bを凹曲面とでき
る。
In the embodiment shown in FIG. 3, the protrusion 1c is formed around the cavity 1a of the insulating base 1.
A protrusion may be formed at the end of the back surface 1d of 1a. For example, as shown in FIG.
Press-molded so as to have a projection 1c at the end of the molded body, the molded body is placed on a shelf plate 16 with the projection 1c facing down, and if fired, the sealing surface 1b is depressed at the center portion. Can be a concave curved surface.

この場合も、前記実施例と同様に、複数の成形体を重
ねて焼成することが可能であり、また、半導体パッケー
ジとして使用する際に、裏面1dに形成したマーキングが
はがれにくいという効果を奏する。
Also in this case, similarly to the above embodiment, a plurality of molded bodies can be stacked and fired, and when used as a semiconductor package, the marking formed on the back surface 1d is not easily peeled off.

さらに、第7図(b)に示すように、絶縁基体1の裏
面1dの端部が突起状となるように、裏面1d全体を凹曲面
に成形し、この面を下にして焼成すると、中央部が窪ん
で、封止面1bを凹曲面とすることもできる。
Further, as shown in FIG. 7 (b), the entire back surface 1d is formed into a concave curved surface so that the end of the back surface 1d of the insulating base 1 becomes a protruding shape, and when this surface is fired, the center The portion may be depressed and the sealing surface 1b may be a concave curved surface.

次に第3図に示す本発明の半導体パッケージを試作
し、絶縁基体1の封止面1bの凹曲面の深さxをさまざま
に変化させて、蓋体2をガラス封止し、ヘリウムリーク
テストを行ったときの不良発生率を調べた。なお、絶縁
基体1は黒色アルミナセラミックスからなり、長辺の長
さ52mmのものを用いた。
Next, a prototype of the semiconductor package of the present invention shown in FIG. 3 was manufactured, and the lid 2 was sealed with glass by changing the depth x of the concave curved surface of the sealing surface 1b of the insulating base 1, and a helium leak test was performed. The occurrence rate of defects when the test was performed was examined. The insulating substrate 1 was made of black alumina ceramic and had a long side with a length of 52 mm.

結果は第1表に示す通り、凹曲面の深さxを0〜100
μmとしたものは優れた結果を示した。
As shown in Table 1, the results are as follows.
Those with μm showed excellent results.

また、以上の実施例で示したものは長方形のパッケー
ジであり、少なくとも長辺方向について封止面が凹曲面
となっていれば良いが、長方形のパッケージの場合は、
互いに垂直な2辺方向について封止面を凹曲面としてお
く必要がある。一般に辺の長さが30mm以上である場合は
その辺方向について封止面を凹曲面とすればよい。
Also, what is shown in the above embodiment is a rectangular package, and it is sufficient that the sealing surface has a concave curved surface at least in the long side direction, but in the case of a rectangular package,
It is necessary to make the sealing surface a concave curved surface in two directions perpendicular to each other. Generally, when the length of the side is 30 mm or more, the sealing surface may be formed as a concave curved surface in the side direction.

〔発明の効果〕〔The invention's effect〕

以上のように本発明によれば、半導体パッケージを構
成する絶縁基体および/または蓋体の封止面を凹曲面と
したことによって、ガラス封止時に端部が開くことによ
るシール不良を完全に防止することができる。また、上
記絶縁基体、蓋体の製造方法として、封止面の中央部ま
たは裏面の端部に突起を有するように成形し、この成形
体を突起が下となるように載置して焼成することによっ
て、容易に、かつ複数積み重ねて焼成できることから効
率的に、上記凹曲面を形成することができる。
As described above, according to the present invention, the sealing surface of the insulating base and / or the lid constituting the semiconductor package is made to have a concave curved surface, thereby completely preventing the sealing failure due to the opening of the end portion during glass sealing. can do. In addition, as a method of manufacturing the insulating substrate and the lid, a molding is performed so as to have a projection at the center of the sealing surface or an end of the back surface, and the molded body is placed and fired with the projection facing down. This makes it possible to form the concave curved surface efficiently and efficiently because a plurality of the layers can be stacked and fired.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明実施例に係る半導体パッケージを構成す
る絶縁基体および蓋体を示す断面図である。第2図は第
1図に示す絶縁基体または蓋体を成形するためのプレス
成形装置を示す断面図である。 第3図は本発明の他の実施例に係る半導体パッケージを
構成する絶縁基体および蓋体を示す断面図である。第4
図は第3図に示す絶縁基体を成形するためのプレス成形
装置を示す断面図である。第5図(a)(b)は第3図
に示す絶縁基体の焼成工程を示す図、第6図(a)
(b)は同じく絶縁基体の平面図である。 第7図(a)(b)は本発明のさらに他の実施例に係る
半導体パッケージを構成する絶縁基体の未焼成時の形状
を示す断面図である。 第8図は一般的な半導体パッケージの短辺方向断面図で
ある。第9図は従来の半導体パッケージの長辺方向断面
図である。 1:絶縁基体、1a:キャビティ部 1b:封止面、1c:突起 1d:裏面 2:蓋体、2a:封止面
FIG. 1 is a sectional view showing an insulating base and a lid constituting a semiconductor package according to an embodiment of the present invention. FIG. 2 is a cross-sectional view showing a press forming apparatus for forming the insulating base or the lid shown in FIG. FIG. 3 is a sectional view showing an insulating base and a lid constituting a semiconductor package according to another embodiment of the present invention. 4th
The figure is a sectional view showing a press forming apparatus for forming the insulating base shown in FIG. 5 (a) and 5 (b) are views showing a firing step of the insulating substrate shown in FIG. 3, and FIG. 6 (a)
FIG. 2B is a plan view of the insulating base. 7 (a) and 7 (b) are cross-sectional views showing an unfired shape of an insulating base constituting a semiconductor package according to still another embodiment of the present invention. FIG. 8 is a sectional view in the short side direction of a general semiconductor package. FIG. 9 is a longitudinal sectional view of a conventional semiconductor package. 1: Insulating substrate, 1a: Cavity part 1b: Sealing surface, 1c: Projection 1d: Back surface 2: Lid, 2a: Sealing surface

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 23/02 H01L 23/08──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 23/02 H01L 23/08

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】半導体素子を収納するためのキャビティ部
が形成された絶縁基体と、前記キャビティ部を封止する
蓋体からなる半導体パッケージにおいて、前記絶縁基体
および/または蓋体の封止面を凹曲面としたことを特徴
とする半導体パッケージ。
1. A semiconductor package comprising an insulating base in which a cavity for accommodating a semiconductor element is formed, and a lid for sealing the cavity, wherein a sealing surface of the insulating base and / or the lid is sealed. A semiconductor package having a concave curved surface.
【請求項2】上記絶縁基体および/または蓋体の、封止
面のキャビティ周辺部または封止面の裏面端部に複数個
の微小な突起を備えたことを特徴とする請求項第1項記
載の半導体パッケージ。
2. The semiconductor device according to claim 1, wherein the insulating base and / or the lid have a plurality of minute projections at a peripheral portion of the cavity on the sealing surface or at an end of the back surface of the sealing surface. The semiconductor package as described.
【請求項3】板状体の片面側にキャビティ部を有し、該
キャビティ部の周辺部またはキャビティ部の裏面の端部
に突起を有するように、セラミック原料粉末をプレス成
形し、得られた成形体を、前記突起が下になるように棚
板上に載置して焼成することにより、絶縁基体または蓋
体の封止面を凹曲面としたことを特徴とする半導体パッ
ケージの製造方法。
3. The ceramic raw material powder is press-molded so as to have a cavity on one side of the plate-like body and to have a projection on the periphery of the cavity or on the end of the back surface of the cavity. A method of manufacturing a semiconductor package, wherein a molded body is placed on a shelf plate so that the projections face down and fired, so that a sealing surface of an insulating base or a lid is formed into a concave curved surface.
JP2114124A 1990-04-27 1990-04-27 Semiconductor package and manufacturing method thereof Expired - Fee Related JP2811021B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2114124A JP2811021B2 (en) 1990-04-27 1990-04-27 Semiconductor package and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2114124A JP2811021B2 (en) 1990-04-27 1990-04-27 Semiconductor package and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPH0410643A JPH0410643A (en) 1992-01-14
JP2811021B2 true JP2811021B2 (en) 1998-10-15

Family

ID=14629738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2114124A Expired - Fee Related JP2811021B2 (en) 1990-04-27 1990-04-27 Semiconductor package and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP2811021B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4828804B2 (en) * 2003-06-26 2011-11-30 京セラ株式会社 Ceramic diaphragm, manufacturing method thereof, and pressure sensor

Also Published As

Publication number Publication date
JPH0410643A (en) 1992-01-14

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