JP2810412B2 - Photoelectric converter - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric converter, and more particularly to a photoelectric converter of a bipolar transistor and the like.

[Prior Art] An electric charge generated by light irradiation is accumulated in one of photoelectric converters used in an image reading apparatus used in a facsimile, a copying machine or the like, and an amplified output corresponding to the accumulated electric charge is taken out. There is a photoelectric converter.

As one of such photoelectric converters, there is a photoelectric converter that irradiates light to a base region of a phototransistor, accumulates carriers (holes), and extracts an amplified current from an emitter region. In this case, the base region of the phototransistor is formed in the light receiving portion, and the emitter region is formed in the light shielding portion. Photoelectric converters that use phototransistors can amplify carriers in the light-receiving part, improve sensitivity, and reduce random noise, compared to photoelectric converters that use photodiodes and do not have the function of amplifying photocurrent. As a result, the S / N ratio can be improved.

FIG. 15 is a schematic sectional view showing a conventional photoelectric converter.

In the figure, reference numeral 1013 denotes an n-type layer, which is a collector of a phototransistor; 1003, an n ^- epitaxial layer; 1005, a p-layer which is a base region of the phototransistor; 1006, an n-layer which is an emitter region of the phototransistor; Is Al
An emitter electrode 8 is a LOCOS oxide film. L
Indicates a light receiving unit, and D indicates a light shielding unit.

When such a photoelectric converter is used as a color line sensor 1101 as shown in FIG. 16, three line sensors for red (R), green (G), and blue (B) are provided. Is composed of a light shielding unit 1011 and a light receiving unit 1012. The lengths of the light shielding unit 1011 and the light receiving unit 1012 in the line sensor array direction (direction A in the drawing) are n bits and 1 bit, respectively (that is, the light shielding unit has an integral multiple of the width of the light receiving unit). One bit corresponds to the light receiving portion of one photosensor cell, and has a square shape with one side of 10 μm, for example.

As described above, since the line sensors corresponding to RGB are different in position, when the R signal of a certain line of the document is obtained, the G signal is the position of the document on the (n + 2) th line from that line. The B signal becomes each signal of the document position on the (2n + 3) th line. Therefore, in order to obtain the RGB signals at the same original position, each of the RGB signals is sampled and held (S /
H) It is necessary to store at least the GB signal previously output via the 1014 and the A / D conversion circuit 1015 in the external memory 102.

Such a photoelectric converter is disclosed, for example, in European Patent Application Publication No. 0132076.

FIG. 17 (A) is a schematic plan view for more specifically explaining a configuration example of the photoelectric converter, and FIG. 17 (B) is a schematic plan view of FIG.
FIG. 18 is a schematic cross-sectional view when FIG. 17 (A) is cut along the line AA ′ shown in FIG.

In each figure, and the photoelectric conversion cells are arranged on an n-silicon substrate 3201, each cell is electrically isolated from adjacent cells by SiO _2, Si ₃ N ₄ or the isolation region 3202 made of polysilicon or the like, ing.

 Each cell has the following configuration.

Low impurity concentration formed by epitaxial technology
By doping a p-type impurity (for example, boron or the like) on n ⁻ region 3203, p − base region 3204 and p region 32 are doped.
05 is formed, and the n ⁺ emitter region 32 is formed in the p base region 3204.
06 is formed.

The p base region 3204 and the p region 3205 also serve as a source and a drain of a p-channel MOS transistor described later.

An oxide film 3207 is formed on the n ⁻ region 3203 where the respective regions are formed, and a gate electrode 3208 of the MOS transistor and a capacitor electrode 3209 are formed on the oxide film 3207. The capacitor electrode 3209 is formed with an oxide film 3207
A capacitor is provided opposite to the base region 3204 to control the base potential.

In addition, the emitter electrode 3210 connected to the n ⁺ emitter region 3206, the electrode 3211 connected to the p region 3205, and the substrate
Collector electrodes 3212 are formed on the back surface of 3201 with an ohmic contact layer interposed therebetween.

 Next, the operation of the photoelectric conversion cell will be described.

Light enters from the p base region 3204 side, and carriers (here, holes) corresponding to the light amount are accumulated in the p base region 3204 (accumulation operation).

The base potential is changed by the accumulated carriers, and by reading the change in the potential from the emitter electrode 3210, an electric signal corresponding to the amount of incident light can be obtained (read operation).

Next, a refresh operation for removing holes accumulated in p base region 3204 will be described.

18 (A) and 18 (B) are voltage waveform diagrams for explaining the refresh operation, respectively.

As shown in FIG. 18A, the MOS transistor is turned on only when a negative voltage higher than the threshold value is applied to the gate electrode 3208.

Also, as shown in FIG. 18 (B), to perform the refresh operation, the emitter electrode 3210 is grounded and the electrode 3211 is kept at the ground potential. Then, first, a negative voltage is applied to the gate electrode 3208 to turn on the p-channel MOS transistor. As a result, the potential of p base region 3204 becomes a constant value regardless of the level of the accumulated potential. Subsequently, by applying a refresh positive voltage pulse to the capacitor electrode 3209, the p base region 3204 becomes the n ⁺ emitter region.
The accumulated holes biased forward with respect to 3206 are removed through the grounded emitter electrode 3210. When the refresh pulse falls, the p base region 3204 returns to the initial state of the negative potential (refresh operation). As described above, after the potential of the p base region 3204 is set to a constant potential by the MOS transistor, a new storage operation is performed without depending on the previous storage potential in order to erase the residual charges by applying the refresh pulse. be able to. In addition, residual charges can be quickly eliminated, and high-speed operation can be performed.

Thereafter, the respective operations of accumulation, readout, and refresh are similarly repeated.

Here potential V _P which is generated in the base by the accumulated holes in the base by photoexcitation is given by V _P = Q / C. Q
Is the amount of charge of holes stored in the base, and C is the capacitance connected to the base. As is evident from this equation, in the case of high integration, the potentials generated by photoexcitation are reduced by reducing both the cell size and Q and C together.
V _P is kept almost constant. Therefore, the method proposed here is also advantageous for higher resolution.

[Problems to be Solved by the Invention] However, in the above-mentioned photoelectric converter, it may be necessary to further increase the blue sensitivity and to further increase the response speed of the semiconductor transistor. Was rare.

When performing image processing using the color line sensor 1101 described with reference to FIGS. 15 and 16, in order to obtain an RGB signal at the same document position, the previously output GB signal is stored in the external memory. Therefore, the capacity of the external memory must be equal to or larger than a certain value. However, reduction in the required memory capacity has been desired from demands such as cost reduction.

Further, in the base region of the phototransistor, there is a problem that the size, impurity concentration, and the like are difficult to optimize because the optimum conditions for the photoelectric conversion region and the optimum conditions for the bipolar transistor are different. Further improvement was desired.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a photoelectric converter that can increase blue sensitivity even among higher sensitivity and can respond at high speed to an input signal.

In addition, the present invention aims at optimizing the sensor unit and the switching unit, and more specifically, a photoelectric transistor capable of optimizing the optimum condition in the base region of the phototransistor and the optimum condition as the bipolar transistor. It is also an object to provide a converter.

Still another object of the present invention is to provide a photoelectric conversion device and an image processing device which can increase the degree of freedom of system design and optical design having a photoelectric converter and can simplify such design.

[Means for Solving the Problems] In the photoelectric converter of the present invention, one of two regions of the same conductivity type is an emitter region of a transistor, and another region of the same conductivity type is a collector region of the transistor. A region having a conductivity type, and the transistor further has a base region having a conductivity type opposite to the conductivity type of the two regions having the same conductivity type, and a region irradiated with light is a semiconductor region having the opposite conductivity type. The semiconductor region of the opposite conductivity type is divided into a semiconductor region serving as a base region of the transistor and a semiconductor region having a lower impurity concentration than the semiconductor region serving as the base and for storing charges generated by light. Become
An output corresponding to a charge generated by light is extracted from at least one of two regions of the same conductivity type of the transistor.

Further, the photoelectric converter of the present invention is provided in contact with the first semiconductor region of the first conductivity type, the second semiconductor region of the first conductivity type provided on the first semiconductor region, and the second semiconductor region. The third semiconductor region of the second conductivity type provided, the fourth semiconductor region of the second conductivity type provided in contact with the third semiconductor region and the second semiconductor region, and provided in contact with the fourth semiconductor region A fifth semiconductor region of the first conductivity type provided, a sixth semiconductor region of the second conductivity type provided in contact with the second semiconductor region,
The third semiconductor region is a light input region and the first, second, fourth, fifth,
The semiconductor region and the second, fourth, and sixth semiconductor regions are photoelectric converters each being an element of a transistor, and the third semiconductor region is lower in impurity concentration than the fourth semiconductor region.

[Operation] The photoelectric converter of the present invention is used to store a semiconductor region of the opposite conductivity type into a semiconductor region serving as a base region of a transistor and a charge generated by light, which has a lower impurity concentration than the semiconductor region serving as the base. And the semiconductor region that generates and accumulates charges by light incidence, and the manufacturing conditions such as the impurity concentration and thickness of the semiconductor region,
Manufacturing conditions such as impurity concentration, impurity concentration distribution, and thickness of a semiconductor region serving as a base region of a transistor can be arbitrarily optimized in each semiconductor region.

In one embodiment of such a photoelectric converter, the third semiconductor region serves as a light input region, and the first, second, fourth, and fifth semiconductor regions and the second, fourth, and sixth semiconductor regions correspond to transistor elements, respectively. Wherein the third semiconductor region is lower in impurity concentration than the fourth semiconductor region.

Examples Hereinafter, examples of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a schematic configuration diagram for explaining a first embodiment of a photoelectric converter according to the present invention. FIG. 1 (A) is a schematic plan view of a photoelectric conversion cell, and FIG. 1 (B). 1 is a schematic longitudinal sectional view taken along line AA ′ of the schematic plan view of FIG. 1 (A).

As shown in FIGS. 1 (A) and (B), this photoelectric conversion cell is doped with atoms belonging to Group V of the periodic table, such as phosphorus (Ph), antimony (Sb), and arsenic (As), as impurities. T
A silicon substrate 1 of a p-type or a p-type silicon substrate 4001 doped with an atom belonging to Group III of the periodic table such as boron (B) or aluminum (Al) as an impurity;
A buried region (n ⁺ ) 4002 formed on the substrate 4001,
An n ⁻ region 4003, an n ⁻ region having a low impurity concentration formed by an epitaxial technique or the like formed on the buried region 4002.
A light-receiving portion p ^- region 4004 doped with an impurity such as boron (B) formed on the 4003 using impurity diffusion, ion implantation, epitaxial technology, etc., and a bipolar transistor formed using the same technology as the p ^- region 4004. Transistor base and MO
P ⁺ region 4005, p ⁺ region 4005 to be the source of S transistor
N ⁺ regions 4006 serving as the emitter of the bipolar transistor formed in, p ⁺ region 4007 becomes a drain of the MOS transistor, the n ⁺ region 4008 becomes a channel stop, n ⁺ region for lowering the collector resistance of the bipolar transistor 4009, an electrode 4101 made of polysilicon or a metal which becomes a gate of a MOS transistor, an electrode wiring 4108 connected to the electrode 4101, an electrode wiring 4102, 4103 made of a polysilicon or a metal connected to an emitter of a bipolar transistor.
4104, an electrode wiring 4109 connected to the drain of the MOS transistor, a wiring electrode 411 connected to the n ⁺ region 4009
0, insulating film 4105, 41 for separating electrodes, wiring, and elements
06,4107. In FIG. 1A, the insulating films 4105, 4106, and 4107 and the electrode wiring 4104 are omitted for simplification. The buried region 4002 is the first
A semiconductor region, n ⁻ region 4003 is a second semiconductor region, p ⁻ region 4004
Is a third semiconductor region, ap ⁺ region 4005 is a fourth semiconductor region, an n ⁺ region 4006 is a fifth semiconductor region, a p ⁺ region 4007 is a sixth semiconductor region, and an n ⁺ region 4008 is a seventh semiconductor region. The buried region 4002 serving as the first semiconductor region may be provided on the n-type substrate having the same conductivity type or on the p-type substrate having a different conductivity type.

 Hereinafter, the operation of the photoelectric converter will be described.

FIG. 2 (A) is similar to FIG. 1 (B) shown in FIG.
FIG. 2 (B) is a schematic enlarged view showing a cut surface when cut at a portion B ′, and FIG. 2 (B) is a depth direction (second direction) of FIG. 2 (A).
FIG. 3 is a potential diagram in the left-right direction of FIG.

In FIG. 2 (A), W is the depletion layer, xp, xn are each p ^-
The width of the depletion layer in the region, the n ⁻ region, and the depth of the p ⁻ region are indicated as xj.

In FIG. 2 (B), W indicates the depletion layer width, and xd indicates the neutral region of the p ⁻ region.

When light is absorbed in the depletion layer (within the width W of the depletion layer), the generated electrons and holes move promptly due to drift and recombination does not occur, so that the sensitivity to light is high. When light absorption occurs within the width xd), the generated electrons move by diffusion, and thus recombine with holes to lower the sensitivity to light. Therefore, in the light receiving section, it is better that the neutral region on the surface is small. However, when the surface is depleted, carriers are generated at the interface between the semiconductor and the insulating layer irrespective of the incidence of light, resulting in noise. Therefore, the surface is preferably in a neutral region.

FIG. 3 is a characteristic diagram for explaining the absorption coefficient of Si and Ge with respect to the wavelength of light.

As shown in the figure, the shorter the wavelength, the larger the absorption coefficient is for both Si and Ge. Now, considering Si as a material, blue (λ = 0.45 μm), green (λ = 0.53 μm),
For red (λ = 0.65 μm), the absorption coefficients are blue to 2 × 10 ⁴ cm ⁻¹ , green to 7.5 × 10 ³ cm ⁻¹ , and red to 3 × 10 ^{3, respectively.}
cm ⁻¹ , and considering the half width of the color as about 0.05 μm, the light absorption in Si is blue to 1 μm, green to 2 μm, and red to 5 μm.
Performed well at m depths. Therefore, blue is most affected by the thickness xd of the neutral region on the semiconductor surface, and sensitivity is reduced depending on this thickness.

 The width of the depletion layer is represented by the following relational expression.

W: depletion layer width, xp: p ^- region depletion layer width, NA: p ^- region impurity density, ND: n ^- region impurity density, εs: dielectric constant, ni: genuine carrier density, VR: reverse bias voltage.

FIG. 4 is a characteristic diagram illustrating the relationship between the p ⁻ impurity density NA and the total depletion layer width W when the reverse bias voltage VR = 5 V.

In the figure, the horizontal axis represents the p ^- impurity density NA, the vertical axis represents the total depletion layer width W, and the parameter represents the n ^- region impurity density ND. For example, in order to efficiently detect all of blue, green, and red, a total depletion layer width of about 5 μm is required. At this time, ND must be 2 × 10 ¹⁴ cm ⁻³ or less. You can read from the figure.

 The spectral sensitivity of the photoelectric converter is approximately expressed by the following equation.

λ: light wavelength, α: light absorption coefficient (cm ⁻¹ ), xd: dead area (neutral area), W: high sensitivity area (depletion layer width), T: ratio of the amount of light incident on the semiconductor ( Transmittance).

As can be seen from the above equation (4), depending on the thickness of the sensitivity xd,
Xd should be thin to affect sensitivity. Further, the sensitivity has a wavelength dependence, and the sensitivity of blue is lower than that of red.
It is also possible to optimize W by reducing W in order to relatively correct the spectral sensitivity.

This can be achieved by controlling the density of the n ^- region as can be read from FIG. In order to increase the sensitivity of blue, it is better to reduce the neutral region xd.

FIG. 5 is a characteristic diagram illustrating the relationship between the p ⁻ impurity density NA and the thickness xp of the p-layer depletion layer.

In the figure, the horizontal axis represents the p ⁻ impurity density NA, the vertical axis represents the thickness xp of the p-layer depletion layer, and the parameter represents the n ⁻ region impurity density ND.

In the figure, for example, when ND = 10 ¹⁴ cm ⁻³ ,
Assuming = 10 ¹⁵ cm ^-3 , xp = 0.6 μm.

If xj in the p region is set to 0.7 μm, the dead region can be set to 0.1 μm, and optimization for increasing blue sensitivity can be performed.
It is also possible to increase the impurity density only on the surface of 0.1 μm, reduce the impurity density on the deep region, and deplete the region deeper than 0.1 μm on the surface.

In the present invention, the light-receiving surface maintains a neutral region by forming the p ^- region of the light-receiving portion that accumulates the charge generated by light incidence and the p ⁺ region serving as the base region of the bipolar transistor. Further, the portion deeper than the vicinity of the surface is depleted, and the thickness of the entire depletion layer can determine the concentration of the n ⁻ region according to the use of the spectral sensitivity.

FIG. 6 is a schematic circuit diagram for explaining one embodiment of a drive circuit for a photoelectric converter according to the present invention.

In this embodiment, a line sensor in which sensors (S1, S3,...) Are arranged in a line will be described.

Each sensor S comprises a bipolar transistor and a reset transistor Qres connected to its base. Carriers excited by incident light are accumulated at the base of the bipolar transistor and read out to the emitter. Then, when Qres is turned on, it is reset to a constant potential.

A pulse φres for ON / OFF control is input to the gate electrode of Qres of each sensor S, and a constant voltage Vbg is applied to the other main electrode of Qres.

A fixed positive electrode is applied to the collector electrode of each sensor S, and the emitter electrodes are connected to the vertical lines L (L1, L2,...).

A constant voltage Veg is applied to each vertical line L via a transistor Qvrs, and a pulse φres for ON / OFF control is input to a gate electrode of Qvrs.

The vertical lines L are respectively connected to the storage capacitors Ct, and a signal is output from the bipolar transistor BPT2 via the transistor Qt.

Hereinafter, another embodiment of the photoelectric converter of the present invention will be described. The same components as those in the embodiment shown in FIGS. 5 (A) and 5 (B) are denoted by the same reference numerals, and description thereof is omitted.

FIG. 7 is a schematic sectional view for explaining a second embodiment of the present invention.

As shown in the drawing, the present embodiment, the light receiving regions serving p ^- region
A collector resistance is reduced by providing ap ⁺ region 4010 only on the surface of 4004 and an n region 4011 having a high impurity density below the base of the bipolar transistor. Note that n ⁻ region 4003 and n region 4011 are a second semiconductor region, n ⁻ region 4003 is a low impurity concentration region, n region 4011 is a high impurity concentration region, and n region 4011 that is a high impurity concentration region is a p ⁺ region. 4005, n ⁺ area 4006,
p ⁺ region 4007 (fourth, fifth, and sixth semiconductor regions) and buried region 4002
(First semiconductor region).

FIG. 8 is a schematic sectional view for explaining a third embodiment of the present invention.

As shown in the drawing, the present embodiment, the light receiving regions serving p ^- region
4004 is expanded to the lower part of the emitter of the bipolar transistor, and the bipolar transistor has a drift base type to measure high speed. That is, a part of the p ⁻ region 4004 as the third semiconductor region is changed to the p region 4005 as the fourth semiconductor region.
And an n ⁻ region 4003 as a second semiconductor region. Output-side bipolar transistor BP shown in FIG.
Needless to say, this structure can also be used for T2.

FIG. 9 is a schematic sectional view for explaining a fourth embodiment of the present invention.

As shown in the figure, in the present embodiment, the n region 4011 is made deep, and reaches the buried region to lower the collector resistance. That is, a part of the p ⁻ region 4004 as the third semiconductor region is provided between the p ⁺ region 4005 as the fourth semiconductor region and the n region 4011 as the high impurity concentration region.

FIG. 10 is a schematic sectional view for explaining a fifth embodiment of the present invention.

As shown in the drawing, the present embodiment has a structure in which the buried region is limited to only a location such as a bipolar transistor. That is, the n ⁺ region 4002 as the first semiconductor region is provided except for a region corresponding to the p ⁻ region 4004 as the third semiconductor region.

As shown in the figure, the n ^- region and p
Considering the substrate, there is no neutral region between the n ⁻ and p substrates, the cause of lateral carrier diffusion between the sensor cells is eliminated, and the improvement of smear and NTF is improved.

In the embodiment described above, the present invention can be applied not only to Si but also to other semiconductor materials. Further, it can be used in a structure in which n and p are all replaced.

Further, as in the above embodiments, the characteristics of the transistor can be improved by lowering the collector resistance (specifically, the amplification characteristics, switching characteristics, etc. of the transistor can be improved).

The above-described embodiment makes it possible to achieve the above-mentioned object more effectively.

FIG. 11 is a schematic sectional view for explaining a first reference example of the photoelectric converter of the present invention.

This embodiment is a photoelectric converter in which the anode of the photodiode and the base region of the bipolar transistor are manufactured in different steps.

In the figure, reference numeral 1001 denotes a p-type substrate; 1002, an n-type buried layer which is a collector of a bipolar transistor;
03 is an n ^- epitaxial layer, 1004 is a p-layer which is a base region of a bipolar transistor as an amplifier, and 1005 is p which is an anode of a photodiode as a photoelectric converter.
Layer 1006 n layer is an emitter region of the bipolar transistor, 1007 _-1 is made of a conductive material such as Al, connecting the p layer 1004 is a base region of the p layer 1005 and the bipolar transistor is an anode of the photodiode Wiring, 1007
_{Reference numeral -2} denotes an emitter electrode made of a conductive material such as Al or polysilicon, and reference numeral 1008 denotes a LOCOS oxide film. L indicates a light receiving unit, and D
Indicates a light shielding portion. Note that the n-type buried layer 1002 is a first semiconductor region, the n ⁻ epitaxial layer 1003 is a second semiconductor region,
A layer 1005 is a third semiconductor region, a p-layer 1004 is a fourth semiconductor region,
n layer 1006 fifth semiconductor region, 1007 _-1 is the conductive material for connecting the third semiconductor region and the fourth semiconductor region.

As shown in the figure, the bipolar transistor is provided in the light shielding portion and the photodiode is provided on the light receiving unit wiring 1007 _-1
The light receiving unit and the light shielding unit can be formed at a certain distance from each other.

When the photoelectric converter of the present invention is used as a color line sensor, the light receiving section 12 of the line sensor for red (R) and the light receiving section 12 of the line sensor for green (G) are adjacent to each other as shown in FIG. And the light-shielding portion 11 of the green line sensor can be arranged outside the blue (B) line sensor. Therefore, when the R signal of a certain line of the document is obtained, the G signal is the position of the document on the second line from that line, B
The signal becomes each signal of the document position of the (n + 3) th line,
R, B, G signals are sample and hold circuits (S / H) 14,
The signal is processed through the A / D conversion circuit 15 and at least the GB signal is stored in the external memory 102. At this time, the amount of the previously output GB signal to be stored is reduced as compared with the color line sensor of FIG. 16 described above, and the capacity of the external memory can be smaller. Note that, similarly to FIG. 16, the light shielding portion has a width that is an integral multiple of the width of the light receiving portion.

In the present reference example, the impurity diffusion is independently controlled between the p region 1004 which is the base region of the bipolar transistor and the p layer 1005 which is the anode of the photodiode, and the size of the diffusion region, the impurity concentration, etc. are independently controlled. This makes it possible to control the spectral sensitivity characteristics of the photodiode to the desired wavelength sensitivity, and to set the characteristics of the bipolar transistor, such as the amplification factor and the response speed, to desired optimum values.

FIG. 12 is a schematic sectional view for explaining a second reference example of the photoelectric converter of the present invention.

The present reference example is a photoelectric converter in which ap ⁺ region is formed in a bipolar transistor and the collector region of the bipolar transistor is individually formed. Note that the same components as those in the first reference example described above are denoted by the same reference numerals and description thereof is omitted.

In the figure, 1004 _-1 p layer is the anode of the photodiode, 1004 _-2 a p layer is a base region of a bipolar transistor is fabricated simultaneously. 1006 _-2 is an n layer which is an emitter region of the bipolar transistor. Reference numeral 1009 denotes a p ⁺ layer in which a high impurity concentration region is provided for improving frequency characteristics. 1010 is an n layer which is a collector region of the bipolar transistor, and 1006 _-3 is
The n ⁺ layer, 1007 _-3 is a collector electrode made of a conductive material such as Al or polysilicon. Incidentally, n-type buried layer 1002 is first semiconductor region, n ^- layer 1003, n layer 1010 is lightly doped region and the high impurity concentration region of the second semiconductor region, p layer 1004 _-1 third semiconductor region, p layer 1004 _-2 fourth semiconductor region, n layer 1006 _-2 fifth semiconductor region, 1007 _-1 is the conductive material for connecting the third semiconductor region and the fourth semiconductor region. N a low impurity concentration region of the second semiconductor region ^- the layer 1003 is in contact with the p layer 1004 _-1 to be the third semiconductor region, n layer 1010 serving as a high impurity concentration region of the second semiconductor region is a collector electrode 1007 _-3 is electrically connected. p ⁺ layer 1009 and the p layer 1004 _-2 constitutes the input portion of the amplifying portion (bipolar transistor), as described above, the impurity concentration of the p ⁺ layer 1009 is higher than the p layer 1004 _-2, p ⁺ layer 1009 is wired to a p-layer 1004 _-1 serving as a photoelectric conversion unit 10
It is connected via a 07 _-1.

As shown in the drawing, it is connected by the bipolar transistor wiring 1007 _-1 provided to the photodiode and the light shielding portion provided in the light receiving portion which are separately formed, it is possible to obtain the same effects as in the first reference example, 13 The color line sensor shown in the figure can be configured.

Next, an example of an image reading apparatus to which the above-described photoelectric converter of the present invention is applied will be described.

FIG. 14 is a schematic configuration diagram of an example of an image reading device.

In the figure, an original 5201 mechanically moves in the direction of arrow Y relative to a reading unit 5205. In addition, reading of an image is performed by scanning the image sensor 5204 in the arrow X direction.

First, light from a light source 5202 is reflected by an original 5201, and the reflected light forms an image on an image sensor 5204 according to the present invention through an imaging optical system 5203. As a result, carriers corresponding to the intensity of the incident light are accumulated in the image sensor 5204, photoelectrically converted, and output as image signals. This image signal is digitally converted by the AD converter 5206, and is taken into a memory in the image processing unit 5207 as image data.
Then, processing such as shading correction and color correction is performed and transmitted to the personal computer 5208, a printer, or the like.

When the image signal transfer for the scanning in the X direction is completed in this manner,
By moving the original 5201 relatively in the Y direction and repeating the same operation, the previous image of the original 5201 can be converted into an electric signal and extracted as image information.

[Effects of the Invention] As described in detail above, according to the photoelectric converter of the present invention, the input region and the photoelectric converter of the amplification unit can be independently manufactured, and the size of the diffusion region, the impurity concentration, The configuration and the like can be controlled independently, the spectral sensitivity characteristics of the photoelectric conversion unit can be adjusted to the desired wavelength sensitivity, and the characteristics of the amplification unit, such as the amplification factor and the response speed, are set to desired optimal values. It is possible to design a device having desired performance.

Furthermore, the photoelectric conversion device is used to optimize the manufacturing conditions such as the impurity concentration and thickness of the semiconductor region that generates and accumulates charges by light incidence, and the impurity concentration, impurity concentration distribution, and thickness of the semiconductor region serving as the base region of the semiconductor transistor. It is possible to arbitrarily set optimum manufacturing conditions such as the conditions for each semiconductor region. As a result, the light receiving section and the semiconductor transistor section can be separately designed, and the blue sensitivity can be increased, and the speed of the semiconductor transistor can be increased.

Note that a photoelectric conversion device of the present invention in which a semiconductor region of the opposite conductivity type is divided into a semiconductor region for storing charges generated by light irradiation and a semiconductor region serving as a base region of a semiconductor transistor, A conversion unit is formed, an amplification unit is formed in the light shielding unit, and the photoelectric conversion unit and the input area of the amplification unit are connected by wiring, and the light receiving unit and the light shielding unit are separated and formed at a certain distance. By combining with the photoelectric converter described above, the performance can be further improved.

[Brief description of the drawings]

1 (A) and 1 (B) are schematic structural views for explaining a first embodiment of a photoelectric converter of the present invention, respectively. FIG. 1 (A) is a schematic plan view, and FIG. FIG. (B) is a schematic longitudinal sectional view. FIG. 2 (A) is a schematic enlarged view of FIG. 1 (B) cut along the line BB ′ of FIG. 1 (B), and FIG. 2 (B) is a diagram of FIG. It is a potential figure in the depth direction of A). FIG. 3 is a characteristic diagram for explaining the absorption coefficient of Si and Ge with respect to the wavelength of light. FIG. 4 is a characteristic diagram for explaining the relationship between the p-impurity density NA and the total depletion layer width W when the reverse bias voltage VR = 5V. FIG. 5 is a characteristic diagram illustrating the relationship between the p− impurity density NA and the thickness xp of the p-layer depletion layer. FIG. 6 is a schematic circuit diagram for explaining one embodiment of a drive circuit for a photoelectric converter according to the present invention. FIG. 7 is a schematic sectional view for explaining a second embodiment of the present invention. FIG. 8 is a schematic sectional view for explaining a third embodiment of the present invention. FIG. 9 is a schematic sectional view for explaining a fourth embodiment of the present invention. FIG. 10 is a schematic sectional view for explaining a fifth embodiment of the present invention. FIG. 11 is a schematic sectional view for explaining a first reference example of the photoelectric converter of the present invention. FIG. 12 is a schematic sectional view for explaining a second reference example of the photoelectric converter of the present invention. FIG. 13 is a schematic configuration diagram for explaining an image reading system using the photoelectric converter of the present invention. FIG. 14 is a schematic configuration diagram of an example of an image reading device. FIG. 15 is a schematic sectional view illustrating the configuration of a conventional photoelectric converter. FIG. 16 is a schematic configuration diagram for explaining an image reading system using a conventional photoelectric converter. FIG. 17 (A) is a schematic plan view of a configuration example of the photoelectric converter, and FIG. 17 (B) is a sectional view taken along line AA ′ of FIG. 17 (A).
FIG. 3 is a schematic cross-sectional view when FIG. 18 (A) and 18 (B) are voltage waveform diagrams for explaining the refresh operation, respectively. 4001: silicon substrate, 4002: embedded region, 4003: n ^- region, 4004: p ^- region, 4005: p ⁺ region, 4006: n ⁺ region, 4007: p ⁺
Area, 4008: n ⁺ area, 4009: n ⁺ area, 4101: electrode, 4102, 41
03, 4104, 4108, 4109, 4110: electrode wiring, 4105, 4106, 4107: insulating film.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 27/146 H01L 31/02 H01L 31/10

Claims (14)

(57) [Claims] 1. The semiconductor device according to claim 1, wherein one of the two regions of the same conductivity type is an emitter region of the transistor and another of the same conductivity type is a collector region of the transistor. The semiconductor device has a base region of a conductivity type opposite to the conductivity type of the two regions of the same conductivity type, a region irradiated with light is a semiconductor region of the opposite conductivity type, and the semiconductor region of the opposite conductivity type is a semiconductor region of the transistor. A semiconductor region serving as a base region, and a semiconductor region having a lower impurity concentration than the semiconductor region serving as the base and for storing charge generated by light, and two of the same conductivity type of the transistor. A photoelectric converter from which an output corresponding to a charge generated by light is extracted from at least one of the regions. 2. A first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type provided on the first semiconductor region,
A third conductive type third electrode provided in contact with the second semiconductor region.
A semiconductor region, a fourth semiconductor region of the second conductivity type provided in contact with the third semiconductor region and the second semiconductor region, and a fourth semiconductor region of the first conductivity type provided in contact with the fourth semiconductor region. 5 semiconductor region, the second semiconductor region provided in contact with the second semiconductor region.
A sixth semiconductor region of a conductivity type, wherein the third semiconductor region is an optical input region, and the first, second, fourth, and fifth semiconductor regions and a second,
A photoelectric converter in which the fourth and sixth semiconductor regions are each a transistor element, wherein the third semiconductor region is lower in impurity concentration than the fourth semiconductor region. 3. The photoelectric converter according to claim 2, wherein the second semiconductor region has regions of the same conductivity type and different impurity concentrations including a low impurity concentration region and a high impurity concentration region. . 4. The photoelectric converter according to claim 2, wherein the second semiconductor region has regions of the same conductivity type and different impurity concentrations including a low impurity concentration region and a high impurity concentration region. And the high impurity concentration region is provided between the fourth, fifth, and sixth semiconductor regions and the first semiconductor region. 5. The photoelectric converter according to claim 2, wherein at least a part of the third semiconductor region is provided between the fourth semiconductor region and the second semiconductor region. 6. The photoelectric converter according to claim 2, wherein said second semiconductor region has regions of the same conductivity type and different impurity concentrations including a low impurity concentration region and a high impurity concentration region. The impurity concentration region is provided between the fourth, fifth, and sixth semiconductor regions and the first semiconductor region, and at least a portion of the third semiconductor region is provided between the fourth semiconductor region and the second semiconductor region. Photoelectric converter. 7. The photoelectric converter according to claim 6, wherein the third semiconductor region is provided between the fourth semiconductor region and the high impurity concentration region. 8. The photoelectric converter according to claim 2, wherein the first semiconductor region is provided except at least a region corresponding to the third semiconductor region. 9. The photoelectric converter according to claim 2, wherein the first semiconductor region is provided on a substrate of the same conductivity type. 10. The photoelectric converter according to claim 2, wherein the first semiconductor region is formed on a substrate having a conductivity type different from that of the first semiconductor region. 11. The photoelectric converter according to claim 2, wherein the first conductivity type is an n-type. 12. The photoelectric converter according to claim 2, wherein the second conductivity type is a p-type. 13. The photoelectric converter according to claim 10, wherein the different conductivity type is a p-type. 14. The photoelectric converter according to claim 2, wherein the seventh semiconductor region of the first conductivity type, which acts as a channel stop, is a region surrounding the third, fourth, fifth, and sixth semiconductor regions. (2) A photoelectric converter provided on a surface portion of the semiconductor region.