JP2805780B2 - Magnetic disk drive - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic disk drive, and more particularly to a magnetic disk drive having a 1-7 code conversion circuit for writing and reading.

[Conventional technology]

FIG. 3 shows a conventional example. In the prior art shown in FIG. 3, the analog signal read by the head is 1-7
A code conversion circuit 10 for converting to code data 102, and 1-7 code data 10 output from the code conversion circuit 10
It has a tecoder circuit 20 for decoding 2 into an NRZ signal 108, and a clock correction circuit 30 for correcting a frame for the decoded NRZ signal 108. Further, the decoded normal signal 112 output from the decoder circuit 20 as well as the decoded NRZ signal 108 output from the decoder circuit 20 described above.
And an AND gate 40 for calculating the logical product of the NRZ signal 113 and sending out the decoded NRZ signal 113 to the host device.

In the conventional example shown in FIG. 3, the NRZ signal is operated by a read command from a higher-level device to read 1-7 code data recorded on a disk medium.
13 and send it to the host machine. In this case, at the time of decoding into an NRZ signal, frame adjustment has been performed according to the corrected clock 104 output from the clock correction circuit 30 so that the above-described NRZ signal is correctly decoded. In FIG. 3, reference numeral 101 denotes a decoding start signal, and reference numeral 103 denotes a basic clock for reading. Reference numeral 105 denotes “00 data signal” and reference numeral 1 denotes
06 indicates “10 data signals”, and reference numeral 107 indicates “11 data signals”.

[Problems to be solved by the invention]

However, in the above conventional example, when the frame adjustment fails in decoding the NRZ signal for the host device, the NRZ signal is not correctly decoded. No signal is output, which is why "all zero"
A situation occurs in which only the data of (i) can be transmitted. For this reason, the information which can be read as long as the frame adjustment can be performed correctly is in an unreadable state. In such a case, the host machine determines that there is no information in the sector because the target information cannot be obtained. Subsequently, a malfunction such as a write operation is induced, which causes a problem that information is erased.

[Object of the invention]

An object of the present invention is to improve the inconveniences of the conventional example, and in particular, it is possible to effectively transmit the presence of information to a higher-level device even when frame adjustment fails, and to effectively eliminate the information erasure operation. It is another object of the present invention to provide a magnetic disk device that can prevent the problem.

[Means for solving the problem]

In the present invention, a code conversion circuit for converting an analog signal read by a head into 1-7 code data,
It has a decoder circuit for decoding the 1-7 data into an NRZ signal, and a clock correction circuit for correcting a frame corresponding to the decoded NRZ signal. A timer circuit that operates simultaneously with the operation of the decoder circuit and outputs a data determination signal after a predetermined time, a 01 data determination circuit that inputs a decoded NRZ signal and outputs a 01 data determination signal,
And an AND gate for inputting each output of the 01 data decision circuit and the decoder circuit and outputting a 01 data detect signal. The configuration is such that a selector circuit is provided which uses the decoded normal signal as a strobe signal, inputs the output signal from the AND gate and the decoded NRZ signal, and outputs a selected NRZ signal to the host device.
This aims to achieve the above-mentioned object.

(Example of the invention)

Hereinafter, an embodiment of the present invention will be described with reference to FIG. Here, the same reference numerals are used for the same components as those in the conventional example described above.

In the embodiment shown in FIG. 1, a code conversion circuit 10 converts an analog signal read by a head into 1-7 code data 102, and converts the 1-7 data 102 into an NRZ signal 10.
8 and a decoder circuit 20 for decoding the decoded NRZ.
Clock correction circuit 3 that corrects the frame for signal 108
0. A timer circuit 1 that operates simultaneously with the operation of the decoder circuit 20 and outputs a data determination signal 109 after a predetermined time; a 01 data determination circuit 2 that inputs a decoded NRZ signal 108 and outputs a 01 data determination signal 110 And this 0
And an AND gate 3 to which each output of the 1 data decision circuit 2 and the decoder circuit 20 is input and which outputs the 01 data detect signal 111. Further, there is provided a selector circuit 4 which uses the above-mentioned decoded normal signal as a strobe signal, inputs the output signal from the AND gate 3 and the decoded NRZ signal 108, and outputs a selected NRR signal 213 to a higher-level device. Have been.

 This will be described in detail while taking more specific operations.

First, upon receiving a read command from the host machine, the magnetic disk device in this embodiment activates the decoding start signal 101 and restarts decoding of the 1-7 code data 102. The 1-7 code data 102 to be decoded is “1001001
00100 ”. When this data is decoded, "1111 ...", "1010 ..."
... "and" 0000 ... ". Here, the expected decoded NRZ signal 108 is "0000 ..."
It is.

On the other hand, the clock correction circuit 30 corrects the information of the 00 data signals 105, 10
The decoding clock 104 is corrected so that it is decoded to zero. When decoding to 00 is possible, the decoder circuit 20
Activate the decoding normal signal 112 and select the selector circuit 4
Converts the decoded NRZ signal 108 to the selected NRZ signal 2
Transmitted to host machine as 13.

In this case, in the conventional example shown in FIG.
All the selected NRZ signals 213 (see FIG. 2) remained "zero" unless the decoded normal signal 112 became active.

Next, when information is present in the sector that has received the read command, the data of “001000101000” exists after “100100” continues for a certain length in the 1-7 code data.
This means that if the frame is correctly corrected,
1001 (19HEX) ".

Even when the frame correction fails (that is, when the decoded normal signal 112 is not activated), there is a portion where the data of “001000101000” described above is decoded as “01”. Then, when the “01 data” in the decoded NRZ signal 108 is determined by the “01 data determination circuit 2”, the “01 data determination signal 110” is output.

After the decryption start signal 101 becomes active, the timer circuit 1 outputs the above-mentioned 1-7 data bits “0010001010”.
When "00" appears in the 1-7 data bits 102, the data discrimination signal 109 is activated for a certain period of time (2 bytes long), and 01
The data determination signal 110 is transmitted to the select circuit 4 as the 01 data detect signal 111 to notify the host device that the information was present in the sector and that the frame correction failed, so that decoding could not be performed correctly.

FIG. 2 shows an algorithm for encoding the NRZ signal into a 1-7 code signal and decoding the 1-7 code into an NRZ signal.

Here, the necessity of adjusting the above-mentioned “framing” will be described.

From the above decoding algorithm, "100100100100100"
1-7 data can be framed in the following three ways. Each shows an NRZ signal to be decoded.

That is, in order to change the framing of <A> and <B> to the framing of <C>, it is necessary to adjust the framing.

〔The invention's effect〕

As described above, according to the present invention, the decoder circuit that outputs the data discrimination signal a fixed time after the start of decoding, and the 01 data discrimination circuit that detects 01 data in the decoded NRZ signal are provided. Even if a frame adjustment failure occurs at the time of decoding (at the time of decoding) due to the operation of each of these circuits, "01 data" can be transmitted to the higher-level device. It is possible to provide an unprecedented excellent magnetic disk device that can clearly indicate to the machine that the information is present in the sector and can be transmitted to the host machine in the form of a request for a reread command.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is an explanatory chart showing the operation of FIG. 1, and FIG. 3 is a block diagram showing a conventional example. 1 ... timer circuit, 2 ... 01 data judgment circuit, 3 ... AN
D gate, 4 selector circuit, 10 code conversion circuit, 20 decoder circuit, 30 clock correction circuit.

Claims (1)

(57) [Claims] 1. A code conversion circuit for converting an analog signal read by a head into 1-7 code data, a decoder circuit for decoding the 1-7 data into an NRZ signal, and a decoded NRZ signal A clock correction circuit that corrects a frame with respect to, a timer circuit that operates simultaneously with the operation of the decoder circuit and outputs a data determination signal after a predetermined time, and receives the decoded NRZ signal and outputs a 01 data determination signal. A 01 data decision circuit for outputting, and an AND gate for receiving each output of the 01 data decision circuit and the decoder circuit and outputting a 01 data detect signal, wherein the decoding normal signal is used as a strobe signal, and
A magnetic disk drive, comprising: a selector circuit that inputs an output signal from an AND gate and a decoded NRZ signal and outputs a selected NRR signal to a host device.