JP2802439B2 - Semiconductor substrate - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a II-VI compound (or mixed crystal) semiconductor substrate for obtaining a II-VI group compound semiconductor (or mixed crystal thereof) on a silicon substrate. Things.

(Prior art) II-VI group compound semiconductors such as ZnSe and ZnS, or ZnSSe
II-VI compound mixed crystal semiconductors are being used for high-performance, high-performance devices by utilizing their excellent features. However, compound semiconductors are generally expensive and have problems such as difficulty in obtaining large-area high-quality substrate crystals. As an attempt to overcome such problems, an inexpensive, high-quality, light-weight, large-area silicon substrate is used as a substrate, and a compound semiconductor is stacked on the silicon substrate to manufacture a device on the compound semiconductor layer. Have been.

(Problems to be Solved by the Invention) As growth of II-VI on the Si substrate, ZnS on Si (100) by MBE method is described in the literature (M. YOKOYAMA et al. (Journa).
l of Crystal Growth 81 (1987) 73).

Several structures in which a compound semiconductor substrate is stacked using such a silicon substrate have been proposed, but they are still inferior to bulk crystals in terms of crystal quality.

This is because the semiconductor has a different coefficient of thermal expansion and lattice constant from silicon. In particular, the thermal stress based on the difference in thermal expansion coefficient is 10 ⁹ dyn / cm ² or more in GaAs on Si or the like, which is a main factor causing defects and cracks. For example, after the GaAs layer is grown on the Si substrate at the growth temperature Tg, when the cooling is started, the thermal expansion coefficient αSi of the Si substrate and the thermal expansion coefficient α
Stress based on difference from GaAs σ _T = (αGaAs−αSi) · (Tg
−T) · E / (1−ν) occurs. This stress is Si and GaAs
It is inevitable as long as they adhere to each other, and the cracks and defects are introduced into the GaAs layer thinner than the Si substrate to mitigate them. This is III
Although this is an example of a -V semiconductor, the same applies to an II-VI semiconductor.

Conventionally, in order to solve this problem, alumina single crystal is used as a substrate close to the thermal expansion coefficient of GaAs.
nal of Applied Physics, vol. 42, No. 6 (1971) P2519)
And JP-A-62-232120. From the viewpoint of thermal expansion coefficient, alumina single crystal is 4.6 × 10
⁻⁶ ° C. ⁻¹ , whereas the III-V group crystal satisfies the condition of 4 to 6 × 10 ⁻⁶ ° C. ⁻¹
Group-V crystals are difficult to grow, and a high quality single crystal thin film has not been obtained.

As another method, there is a method of laminating and integrating a plurality of semiconductor substrates of different types. Japanese Patent Application Laid-Open No. 61-182215 discloses a method in which InP and GaAs are placed next to each other on a Si substrate, mirror surfaces are brought into close contact with each other, and heat treatment is performed to integrate them.

In this method, the difference in thermal expansion coefficient between adjacent materials is 2 × 10
^-6 deg ^-1 and the bonding temperature is at most 200 ° C.
Thermal strain is greatly reduced. But its size is III-V
It is not economical because it is limited to the size of group semiconductor and uses InP which is more expensive than GaAs.

(Object of the Invention) The present invention has been proposed to solve the above-mentioned drawbacks, and an object of the present invention is to provide a high-quality II-VI compound (or mixed crystal thereof) semiconductor layer free of cracks and defects on a Si substrate. It is to provide a semiconductor substrate on which is grown.

(Means for Solving the Problems) In order to achieve the above object, the present invention relates to a II-VI compound (or a mixed crystal thereof) grown on a Si substrate, wherein the II-VI compound (or a mixed crystal thereof) is used. Glass on a substrate with a coefficient of thermal expansion comparable to that of a semiconductor,
The gist of the present invention is a semiconductor substrate characterized by laminating a substrate and further a semiconductor layer of a II-VI compound (or a mixed crystal thereof).

(Function) In contrast to the conventional technology having a structure in which a II-VI compound semiconductor is grown on a thick Si substrate, according to the present invention, a thermal expansion coefficient substantially equal to the thermal expansion coefficient of the II-VI compound semiconductor to be grown is obtained. A thin Si layer is adhered to the substrate using a glass substrate, and a II-VI compound (or a mixed crystal thereof) semiconductor crystal is grown on the Si layer.
An internal stress generated due to a difference in thermal expansion coefficient between the compound semiconductor film and the compound semiconductor film is reduced, so that a high-quality II-VI compound semiconductor film having a low dislocation density can be obtained.

Next, examples of the present invention will be described. It should be noted that the embodiments are merely examples, and it is needless to say that various changes or improvements can be made without departing from the spirit of the present invention.

(Example 1) as a substrate material 1, the thickness of 2 mm, size 30 × steatite plate 20 mm ² (coefficient of thermal expansion 6.6 × 10 ^-6) PSG glass 2 on
Were laminated by a plasma CVD method, and a (100) Si substrate 3 was placed thereon and heated to about 1000 ° C. to bond the steatite substrate and the Si substrate. Thereafter, the Si substrate 3 is etched by about 1
The thickness was reduced to μm. The Si substrate on the steatite thus prepared was set in a MOCVD growth apparatus,
The growth was performed at about 350 ° C., and the ZnSe semiconductor film 4 (the coefficient of thermal expansion was 7.1 × 10 ⁻⁶ 1 / C) was grown to about 5 μm. The internal stress of the thus obtained II-VI compound (or mixed crystal) semiconductor thin film having the structure shown in FIG. 1 was estimated to be about 1.5 × 10 ⁸ dyn / cm ² from the shift amount of the peak wavelength of photoluminescence. The etch pit density (EPD) is estimated to be about 1 × 10 ⁵ / cm ² ,
The film quality was remarkably higher than that of the ZnSe semiconductor film on the Si substrate obtained so far.

(Example 2) As a substrate material 1, a metal tantalum having a thickness of 1 mm and a size of 20 × 20 mm ² (coefficient of thermal expansion: 6.5 × 10 ⁻⁶ / C) was used, and tantalum was produced in exactly the same procedure as in Example 1. The PSG glass 2 and the Si substrate 3 were laminated on the above-mentioned plate, and a ZnSe semiconductor film 4 was formed thereon by MBE (Molecular Beam Epitaxy). The film was evaluated in exactly the same manner as in Example 1, and as a result, a film having almost the same film quality was obtained.

(Example 3) substrate material 1, the thickness of 2 mm, the glass substrate 2 (the composition of the size 30 × 30 mm ² will CaO, PbO, from SiO _2, the thermal expansion coefficient
5.8 × 10 ^-6 1 / C)
The glass 2 and the Si substrate 3 were laminated to obtain a substrate for growing a II-VI mixed crystal semiconductor. This substrate was set in a MOCVD thin film growth apparatus, and a ZnSe film 4 was grown to about 5 μm in the same manner as in Example 1. The ZnSe film thus produced has an internal stress of 4 ×
The density was 10 ⁸ dyn / cm ² and the dislocation density was 1 × 105 / cm ² .

(Example 4) substrate material 1, the thickness of 2 mm, the glass substrate 2 (the composition of the size 30 × 30 mm ² will CaO, PbO, from SiO _2, the thermal expansion coefficient
5.8 × 10 ^-6 1 / C)
The glass 2 and the Si substrate 3 were laminated to obtain a substrate for growing a II-VI mixed crystal semiconductor. This substrate was set in a MOCVD thin film growth apparatus, and ZnS _x Se _1-x (x = 0.1, 0.2,
0.5, 0.7) The film was grown to about 5 μm. ZnS fabricated in this way
_The xSe _1-x film also had an internal stress of 4 × 10 ⁸ dyn / cm ² and a dislocation density of 1 × 105 / cm ² .

(Example 5) The substrate material 1, the thickness of 2 mm, the glass substrate 2 (the composition of the size 30 × 30 mm ² will CaO, PbO, from SiO _2, the thermal expansion coefficient
5.8 × 10 ^-6 1 / C)
The glass 2 and the Si substrate 3 were laminated to obtain a substrate for growing a II-VI mixed crystal semiconductor. This substrate was set in a MOCVD thin film growth apparatus. A GaAs film is formed on a Si substrate by a so-called two-step growth method (400
Growth of about 1 μm (low temperature growth at 700 ° C. and high temperature growth at 700 ° C.), followed by ZnS _x Se
_1-x ( _x- 0.05) grew to about 5 μm. The Ga _x In _1-x P film thus produced has an internal stress of 4 × 10 ⁸ dyn / cm ² ,
The dislocation density was 1 × 105 / cm ² .

In this embodiment, ZnS, ZnSeII-VI group compound semiconductors and mixed crystals thereof have been described. However, other II-VI group compound semiconductors such as ZnTe, and quaternary or more mixed crystal semiconductors such as ZnTeSSe can be similarly formed. Effect was obtained.

Further, in this embodiment, the case where PSG glass is used as the glass layer has been described, but it is needless to say that the same effect can be obtained by using other glass.

The thickness of the Si substrate interposed between the glass and the II-VI compound (or a mixed crystal thereof) is 1/1 of the thickness of the II-VI compound (or a mixed crystal thereof) semiconductor film.
It is preferred to be 5 or less or 2 μm or less.

 The reason is as follows.

In any of the examples, when the thickness of the Si film was set to about 3 μm, the effect of improving the film quality was smaller than in the case of the Si film thickness of 1 μm performed in the present example.

When the thickness of Si exceeds 1/5 of the thickness of the II-VI compound semiconductor, the stress from the difference in thermal expansion coefficient between Si and the II-VI compound semiconductor increases. This stress is considered to introduce defects or cracks in the II-VI compound semiconductor. The limit is determined by the critical stress σ _{c at} which defects or cracks enter the II-VI compound semiconductor film, the difference in the thermal expansion coefficient between the II-VI compound semiconductor and Si, and the product of the temperature difference between the growth temperature and room temperature.
The stress σ ₀ in the —VI compound semiconductor film is considered to be a main factor, and is approximately in the relationship of σ ₀ <σ _c . for that purpose,
The film thickness of Si needs to be 1/5 or less of the film thickness of the II-VI compound semiconductor.

From the above relationship, when the thickness of the II-VI compound semiconductor is large, the thickness of Si only needs to be 1/5 of that. For example II
If the -VI compound semiconductor is 10 µm or more, Si may be 2 µm or more. However, Si stress is generated due to a difference in thermal expansion coefficient between the substrate (a substrate having a thermal expansion coefficient similar to that of the II-VI compound semiconductor) and Si. It is considered that if the Si film thickness exceeds about 2 μm due to this stress, cracks are generated in the Si film, and a high-quality substrate cannot be obtained.

Further, as the substrate material, it is preferable to use a material having a thermal expansion coefficient difference of 30% or less from that of the II-VI compound (or mixed crystal thereof) semiconductor.

This is because if the difference from the coefficient of thermal expansion exceeds 30%, the thermal stress applied to the II-VI compound semiconductor film increases, causing defects or cracks in the II-VI compound semiconductor film.

The stress applied to the II-VI compound semiconductor film is almost determined by the product of (temperature difference between growth temperature and room temperature) and thermal expansion coefficient difference between the substrate and the II-VI compound semiconductor). Growth temperature is II-VI
Determined by the compound semiconductor growth method, if the difference in thermal expansion coefficient exceeds 30%, the relationship of σ ₀ <σ _c is exceeded,
High quality II-VI compound semiconductor films could not be obtained.

(Effect of the Invention) As described above, according to the present invention, II growing on a Si substrate
-VI compound (or a mixed crystal thereof) semiconductor;
On a substrate having a thermal expansion coefficient similar to that of a -VI compound (or mixed crystal thereof) semiconductor, a glass, a Si substrate thereon, and a II-VI compound (or mixed crystal thereof) semiconductor layer are laminated thereon. The internal stress generated due to the difference in the thermal expansion coefficient between Si and the II-VI compound semiconductor film is reduced, and this has the effect of obtaining a high-quality II-VI compound semiconductor film having a low dislocation density.

[Brief description of the drawings]

 FIG. 1 shows an embodiment of a semiconductor substrate according to the present invention. 1 ... substrate material 2 ... glass 3 ... Si substrate 4 ... II-VI mixed crystal layer

──────────────────────────────────────────────────続 き Continued on the front page (72) Eiji Mori, Inventor 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (72) Kazuo Imai 1-16-1 Uchisaiwaicho, Chiyoda-ku, Tokyo Japan Telegraph and Telephone Co., Ltd. (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/20 H01L 21/36

Claims (4)

(57) [Claims] An II-VI compound (or mixed crystal thereof) semiconductor grown on a Si substrate, wherein a glass having a thermal expansion coefficient similar to that of the II-VI compound (or mixed crystal thereof) semiconductor is formed on a substrate. A semiconductor substrate comprising a Si substrate and a II-VI compound (or mixed crystal thereof) semiconductor layer laminated thereon. 2. The method according to claim 1, wherein the Si substrate is laminated.
-VI compound (or mixed crystal thereof) 1/5 of semiconductor film thickness
Alternatively, a semiconductor substrate using a Si substrate having a thickness of 2 μm or less. 3. A semiconductor substrate, wherein PSG glass is used as the glass according to claim 1. 4. The substrate according to claim 1, wherein the material of the substrate is II-VI.
A semiconductor substrate, wherein a substrate having a difference in thermal expansion coefficient from a compound (or mixed crystal thereof) semiconductor within 30% of a thermal expansion coefficient of the compound semiconductor is used.