JP2795898B2 - Method for manufacturing MSI type nonlinear switching element - Google Patents
Method for manufacturing MSI type nonlinear switching elementInfo
- Publication number
- JP2795898B2 JP2795898B2 JP11587689A JP11587689A JP2795898B2 JP 2795898 B2 JP2795898 B2 JP 2795898B2 JP 11587689 A JP11587689 A JP 11587689A JP 11587689 A JP11587689 A JP 11587689A JP 2795898 B2 JP2795898 B2 JP 2795898B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode layer
- switching element
- manufacturing
- msi
- nonlinear switching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Description
【発明の詳細な説明】 〔産業上の利用分野〕 液晶表示素子は低消費電力のフラットパネルディスプ
レイとして広く応用されている。中でも、スイッチング
素子を各画素に作り込んで駆動するアクティブマトリク
ス方式は大容量高品質の表示素子としてテレビ、情報端
末等に用いられつつある。スイッチング素子としては3
端子型のTFT(薄膜トランジスタ)と2端子型のダイオ
ードやMIM、MSI(メタル・セミインシュレイター)等の
非線形抵抗素子が使われる。商品化は3端子型のTFTが
先行したが、2端子型は製造が3端子型に対して簡単で
あり、今後が期待されている。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] Liquid crystal display elements are widely applied as flat panel displays with low power consumption. Among them, an active matrix system in which a switching element is formed in each pixel and driven is being used as a large-capacity, high-quality display element in televisions, information terminals, and the like. 3 for switching element
Terminal type TFTs (thin film transistors) and two-terminal type diodes and non-linear resistance elements such as MIM and MSI (metal semi-insulator) are used. Commercialization was preceded by three-terminal TFTs, but two-terminal TFTs are easier to manufacture than three-terminal TFTs, and are expected to grow in the future.
本発明はMSI(メタル・セミインシュレイター)型非
線形スイッチング素子に関する。The present invention relates to an MSI (metal semi-insulator) type nonlinear switching element.
第2図に従来のMSI型非線形スイッチング素子を示
す。ガラス等の基板1上に透明電極ITO(酸化インジウ
ム)等による第1の電極層2が成膜・パタン化される。
続いて、非ストイキヨメトリーSiNxやSiNxOy等の半絶縁
層3が成膜・パタン化される。最後にCrやAl等の第2の
電極層5が成膜・パタン化される。FIG. 2 shows a conventional MSI type nonlinear switching element. A first electrode layer 2 made of a transparent electrode such as ITO (indium oxide) is formed and patterned on a substrate 1 such as glass.
Subsequently, a semi-insulating layer 3 such as non-stoichiometric SiNx or SiNxOy is formed and patterned. Finally, a second electrode layer 5 of Cr, Al, or the like is formed and patterned.
従来例の課題は製造工程がやや複雑である点にある。
第2図の従来例では3枚のフォトマスクを必要としてい
る。また第1の電極層2と第2の電極層5があらわに露
出しているために図中の21の経路を通じてのリーク電流
がスイッチング素子としてのOFF特性を不安定としやす
い。The problem of the conventional example is that the manufacturing process is slightly complicated.
In the conventional example of FIG. 2, three photomasks are required. Further, since the first electrode layer 2 and the second electrode layer 5 are clearly exposed, a leak current through the path 21 in the drawing tends to make the OFF characteristic as a switching element unstable.
本発明の目的は従来例の製造法を簡略化し、且つ安定
化する方法を提供する。An object of the present invention is to provide a method for simplifying and stabilizing the conventional manufacturing method.
本発明はMSI型非線形スイッチング素子の製造方法に
於て基板上に第1の電極層と半絶縁層を連続的に成膜・
パタン化する工程と、第1の電極層を酸化して酸化膜を
形成する工程と、該第1の電極層と該酸化膜上に第2の
電極層を設ける工程とを有する事を特徴とし、2枚マス
ク工程で安定なMSI型非線形スイッチング素子を製造可
能とする。The present invention relates to a method of manufacturing an MSI type nonlinear switching element, wherein a first electrode layer and a semi-insulating layer are continuously formed on a substrate.
Patterning, oxidizing the first electrode layer to form an oxide film, and providing a second electrode layer on the first electrode layer and the oxide film. 2. A stable MSI type nonlinear switching element can be manufactured by a two-mask process.
第1図は本発明の実施例で、MSI型非線形スイッチン
グ素子の製造方法を示す断面図である。FIG. 1 is a sectional view showing a method for manufacturing an MSI type nonlinear switching element according to an embodiment of the present invention.
第1図(A)は基板1上に第1の電極層2と半絶縁層
3を連続的に成膜・パタン化する工程である。第1の電
極層2は実体酸化可能な金属であり、具体的には、Ta、
Al、Mo、MoSix等をスッパタ、蒸着等で成膜される。半
絶縁層3は非ストイキヨメトリーSiNx、SiOxNy等、非線
形抵抗特性を示す20〜150nmの薄膜であり、プラズマCVD
等で形成される。FIG. 1A shows a step of continuously forming and patterning a first electrode layer 2 and a semi-insulating layer 3 on a substrate 1. The first electrode layer 2 is a substantially oxidizable metal, specifically, Ta,
Al, Mo, MoSix, etc. are formed by sputtering or vapor deposition. The semi-insulating layer 3 is a thin film having a non-linear resistance characteristic of 20 to 150 nm, such as non-stoichiometric SiNx, SiOxNy, etc.
And the like.
第1図(B)は第1の電極層2を酸化して酸化膜4を
形成する工程である。FIG. 1B shows a step of oxidizing the first electrode layer 2 to form an oxide film 4.
第1の電極層2を酸化して酸化膜4を形成する方法の
第1の実施例としては、陽極酸化を用いる。例えば、第
1の電極層としてTa、Al、MoSix等を用いた場合、クエ
ン酸溶液中で陽極酸化する事により、厚さ約100〜500nm
の陽極酸化膜を第1図(B)のように第1の電極層2の
側壁に形成する。As a first embodiment of the method of forming the oxide film 4 by oxidizing the first electrode layer 2, anodic oxidation is used. For example, when Ta, Al, MoSix, or the like is used as the first electrode layer, the thickness is about 100 to 500 nm by anodizing in a citric acid solution.
Is formed on the side wall of the first electrode layer 2 as shown in FIG.
第1の電極層2を酸化して酸化膜4を形成する方法の
第2の実施例としては、熱酸化を用いる。例えば、第1
の電極層2としてTa、Mo等を用いた場合、400〜500度の
空気、酸素或は水蒸気雰囲気中で実体熱酸化する事によ
り、厚さ約100〜500nmの酸化膜4を(B)のように第1
の電極層2の側壁に形成する。As a second embodiment of the method of forming the oxide film 4 by oxidizing the first electrode layer 2, thermal oxidation is used. For example, the first
When Ta, Mo or the like is used as the electrode layer 2 of FIG. So first
Is formed on the side wall of the electrode layer 2.
第1図(C)は該第1の電極層2と該酸化膜4上に第
2の電極層5を成膜・パタン化する工程である。透過型
ディスプレーの場合、第2電極としては透明電極が好ま
しく、透明電極ITO(酸化インジウム)等を用いると良
い。反射型ではAl、Cr、Au等の金属の反射電極で良い。FIG. 1C shows a step of forming and patterning a second electrode layer 5 on the first electrode layer 2 and the oxide film 4. In the case of a transmissive display, a transparent electrode is preferable as the second electrode, and a transparent electrode such as ITO (indium oxide) may be used. In the reflection type, a reflection electrode made of a metal such as Al, Cr, and Au may be used.
本発明の第1の特徴は従来例が3枚のフォトマスクと
3回のパタン化工程を必要としたのに対し、2枚のフォ
トマスクと2回のパタン化工程で問題がない点にある。
本発明は製造設備投資、製造歩留、製造コストの点でメ
リット大きい。A first feature of the present invention is that the conventional example requires three photomasks and three patterning steps, whereas two photomasks and two patterning steps have no problem. .
The present invention has significant advantages in terms of manufacturing equipment investment, manufacturing yield, and manufacturing cost.
本発明の第2の特徴は第1の電極層2の表面が最終的
に露出せず、第2図21の様なリーク経路が存在しない点
にある。第1の電極層2の表面はすべて酸化膜4に覆わ
れているため、水分等の影響が少なく、従来例にくらべ
極めて安定である。A second feature of the present invention is that the surface of the first electrode layer 2 is not finally exposed, and there is no leak path as shown in FIG. Since the entire surface of the first electrode layer 2 is covered with the oxide film 4, the surface is less affected by moisture and the like, and is extremely stable as compared with the conventional example.
以上の実施例で明かな如く、本発明では2枚マスク工
程という極めて簡単な工程で、従来例と比べ非常に安定
なMSI型非線形スイッチング素子を製造可能とする。As is clear from the above embodiments, the present invention makes it possible to manufacture an MSI type nonlinear switching element which is very stable as compared with the conventional example, by a very simple process of a two-mask process.
第1図は本発明の実施例で、MSI型非線形スイッチング
素子の製造方法を示す断面図、第2図は従来技術で、MS
I型非線形スイッチング素子の製造方法を示す断面図で
ある。 1……基板、2……第1の電極層、 3……半絶縁層、4……酸化膜、 5……第2の電極層。FIG. 1 is a sectional view showing a method of manufacturing an MSI type nonlinear switching element according to an embodiment of the present invention, and FIG.
It is sectional drawing which shows the manufacturing method of an I-type nonlinear switching element. DESCRIPTION OF SYMBOLS 1 ... board | substrate, 2 ... 1st electrode layer, 3 ... semi-insulating layer, 4 ... oxide film, 5 ... 2nd electrode layer.
Claims (4)
電極層と、該両電極層間に設けられた半絶縁層からなる
MSI(メタル・セミインシュレイター)型非線形スイッ
チング素子の製造方法に於て、基板上に第1の電極層と
半絶縁層を連続的に成膜・パタン化する工程と、第1の
電極層を酸化して酸化膜を形成する工程と、該第1の電
極層と該酸化膜上に第2の電極層を設ける工程とを有す
る事を特徴とするMSI型非線形スイッチング素子の製造
方法。1. A semiconductor device comprising: a first electrode layer and a second electrode layer provided on a substrate; and a semi-insulating layer provided between the two electrode layers.
In a method for manufacturing an MSI (metal semi-insulator) type nonlinear switching element, a step of continuously forming and patterning a first electrode layer and a semi-insulating layer on a substrate; A method for manufacturing an MSI nonlinear switching element, comprising: oxidizing to form an oxide film; and providing a first electrode layer and a second electrode layer on the oxide film.
事を特徴とする請求項1記載のMSI型非線形スイッチン
グ素子の製造方法。2. The method for manufacturing an MSI type nonlinear switching element according to claim 1, wherein the first electrode layer is oxidized by anodic oxidation.
を特徴とする請求項1記載のMSI型非線形スイッチング
素子の製造方法。3. The method according to claim 1, wherein the method of oxidizing the first electrode layer is thermal oxidation.
請求項1記載のMSI型非線形スイッチング素子の製造方
法。4. The method according to claim 1, wherein the first electrode layer is a Ta film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11587689A JP2795898B2 (en) | 1989-05-09 | 1989-05-09 | Method for manufacturing MSI type nonlinear switching element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11587689A JP2795898B2 (en) | 1989-05-09 | 1989-05-09 | Method for manufacturing MSI type nonlinear switching element |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02293822A JPH02293822A (en) | 1990-12-05 |
JP2795898B2 true JP2795898B2 (en) | 1998-09-10 |
Family
ID=14673353
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11587689A Expired - Fee Related JP2795898B2 (en) | 1989-05-09 | 1989-05-09 | Method for manufacturing MSI type nonlinear switching element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2795898B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20220384835A1 (en) * | 2019-11-07 | 2022-12-01 | Hitachi High-Tech Corporation | Fuel Cell Array and Fuel Cell Inspection Method |
-
1989
- 1989-05-09 JP JP11587689A patent/JP2795898B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH02293822A (en) | 1990-12-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2637079B2 (en) | Method of fabricating a thin film field effect transistor in an active matrix liquid crystal display | |
US4861141A (en) | Electro optical device and method for manufacturing same | |
JP2795898B2 (en) | Method for manufacturing MSI type nonlinear switching element | |
US5068699A (en) | Thin film transistor for a plate display | |
US5539549A (en) | Active matrix substrate having island electrodes for making ohmic contacts with MIM electrodes and pixel electrodes | |
JP2812720B2 (en) | Method of manufacturing reflective MIM active matrix substrate | |
JPS5922361A (en) | Semiconductor device | |
JP3000776B2 (en) | Liquid crystal display | |
JP3306986B2 (en) | Liquid crystal device manufacturing method | |
JPS6262333A (en) | Production of thin film two-terminal element type active matrix liquid crystal display device | |
JPH05183214A (en) | Active-matrix liquid crystal display device | |
JPH0331823A (en) | Production of liquid crystal display device and electrode substrate | |
JPH02137826A (en) | Active matrix substrate | |
JPH0462050B2 (en) | ||
JPH01281435A (en) | Liquid crystal display device | |
JP3341346B2 (en) | Manufacturing method of nonlinear element | |
JPH0345933A (en) | Production of mim type nonlinear switching element | |
JP2859304B2 (en) | Manufacturing method of nonlinear resistance element | |
JPH01120539A (en) | Liquid crystal display device | |
JPH0299928A (en) | Nonlinear element | |
JPH07104319A (en) | Mim type nonlinear element | |
JPH0342632A (en) | Production of liquid crystal display panel of active matrix | |
JPS62253193A (en) | Matrix type display unit | |
JPH11109421A (en) | Active matrix substrate and its production as well as liquid crystal display panel | |
JPS6314128A (en) | Thin film diode for display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |