JP2786246B2 - Self-routing channel - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a self-routing communication path used for a cell switch used for exchanging fixed-length packets (cells).

[Conventional technology]

FIG. 2 is a diagram showing an example (8 incoming lines × 8 outgoing lines) of a typical self-routing communication path used for a cell switch.

The switch element SE is a circuit that determines and outputs a link to be output from an outgoing line address assigned to a cell (communication information) to be transferred. The switch element SE of the first communication path stage has a connection information addition circuit 1A, and the connection information addition circuit IA displays the address of the outgoing line p in the cell in binary (d ₃ d ₂ d ₁ ), where p = d imparting at ^{_{3 · 2 2 + d 2 ·}} 2 1 + d 1 × 2 0. The switch element ES at the k-th communication path stage is
If the bit d _{4-k in} this bit string is 0, the cell is transferred to the upper output link, and if it is 1, the cell is transferred to the lower output link.
The link L between the communication path stages is formed after the connection information is removed by the connection information removal circuit IR in the final communication path stage after the cell of an arbitrary incoming line has passed through all the communication path stages by the operation of the switch element SE. Wired to output to the specified outgoing line. (For details of the operation, see, for example, [Ref. 1] C. Wu and T. Feng, “Routing techniques for a cla
ss of multistage interconnection networks ", 1978, In
t'1 Conf. Parallel Processing, pp. 197-205) [Problems to be Solved] The conventional self-routing communication path as described above is easy to control because the routing path is uniquely determined. It is inevitable to discard or buffer cells due to link competition between cells in the switch network. The larger the scale, the lower the probability of reaching the outgoing line, and the cell switch throughput (outgoing line usage rate) ) Is low.

In a similar network, there is a proposal of a network in which link competition does not occur internally unless each cell goes to the same outgoing line (for example, [Reference Document 2] JYHui and E. Arthurs, “Abr.
oadband packet switch for integrated transport, "IE
EE J. Selected Areas Comm., Vol.SAC-5, pp, 1264-127
(See 3, Oct. 1987) The number of stages of the preceding circuit that eliminates competition becomes very large.

An object of the present invention is to solve the drawbacks of the prior art, to allow the existence of a plurality of cells going to the same outgoing line, and to make it possible to increase the throughput of a switch without extremely increasing the number of switch elements. To provide a self-routing communication path.

[Means for solving the problem]

In order to achieve the above object, in the present self-routing communication path, nodes accommodating incoming and outgoing lines are connected by a hypercube network having a self-routing function by nature, and each node preferentially assigns a route to a short-distance cell, Added a function to bypass the cell at the time of contention.

[Action]

In the present invention, the use rate of the inter-node link can be kept low even during heavy traffic by using the hypercube network for the connection of the nodes, and the probability of the link block is reduced. In addition, the link block probability is further reduced by giving priority to a cell with a short distance at each node, and even when a cell encounters a link block, the cell is bypassed to create a queuing buffer (queue) in the network. There is no need to have, and cell loss due to buffer overflow has been eliminated.

For a cell arriving from an incoming line and going to an outgoing line accommodated in another node, all the links may encounter a busy state, but such a situation is low due to the low use rate of the inter-node link in the first place. Is very small, and the required capacity of the incoming line queue is small. In the case where a plurality of cells output to the same line arrive at the final destination node at the same time, it is possible to wait in a link-compatible or common outgoing line queue provided in each node, and furthermore, this queue overflows. In such a case, it is also possible to avoid cell discard by transferring to an adjacent node through an empty link.

〔Example〕

FIG. 1 is a diagram showing, as an embodiment of the present invention, a self-routing communication path in which nodes accommodating incoming and outgoing lines are connected by a hypercube network. (For a description of a general hypercube network, see, for example, [Ref. 3] DA
“Multicomputer Networks: Me” by Reed and RMFujimoto
ssage-Based Parallrl Processing ", 1987, the MIT Pre
(See pages 17-18 of ss)
The three-dimensional network of (log ₂ 8) is used. The number of each node is given so as to match the number of the incoming / outgoing line to be accommodated, and this is shown in binary in the figure. The adjacent nodes where the link exists have a relationship in which only one bit is different when comparing the bits of each digit of the binary-displayed address.

FIG. 3 shows information moving between nodes, which is composed of communication information (cell) upon arrival from an incoming line and connection information including an outgoing line node address. The "other connection information" may not be present, and the number of times of detour may be entered. Hereinafter, this information is referred to as “cell with connection information”. First,
The basic operation is explained and terms are defined.

Self-routing function: A basic routing method will be described with reference to FIG. The example shown is for eight nodes, and the node address is represented by four digits.

At each node, the destination node address and the own node address in the received "cell with connection information" (both are displayed in binary)
Are compared with each other to find a different digit. In the example, the link candidates to be transferred whose first, third and fourth digits are different are:
A link between adjacent nodes corresponding to these different digits. In the example, of the four nodes (010 1 ), (01 1 0), ( 0 00), and ( 1 100) adjacent to the current node (0100), three nodes having different first, third, and fourth digits are used. Node (0101) (000
0) The link connecting (1100) is a link candidate to be transferred. If the “distance” from the current position of the “cell with connection information” to the destination node is defined by the number of links passing before reaching the final destination, the number of “different digits” obtained by the above operation, that is, The number of possible links should be
Indicates the shortest "distance" from the current position of the "cell with connection information" to the destination node. If the "cell with connection information" could be transferred to the "candidate" link, the shortest "distance" at the transfer destination node Decreases by one. This corresponds to the “cell with connection information” taking the shortest path.

Detour: If the "cell with connection information" is not transferred to the "candidate" link but is transferred to a link other than the "candidate", the shortest "distance" to the destination node at the transfer destination node increases by one. This is equivalent to the “cell with connection information” taking a detour route.

Link block: A plurality of “cells with connection information” exist in a node, and “candidates” to be transferred for some “cells with connection information” in the process of determining each route (destination link) In some cases, transfer cannot be performed on any of the links. This is called a “link block”. The cause of the link block may be that all of the “candidate” links have been determined as transfer destinations of other “cells with connection information”.

Examples of the present invention will be specifically described below. Fifth
(A) is a configuration example of each node when the number of incoming and outgoing lines is eight. INF0 is the interface circuit for incoming lines, INF1 to INF4
Is the interface circuit for the input link from the adjacent node,
SW is a four-input three-output switch, and these circuits are controlled by the control circuit C. The SEL is a control circuit for outputting cells in the outgoing line queue in each interface circuit to the outgoing line one by one.

FIG. 5 (b) shows a configuration example of the incoming line interface circuit INF0. ES is an elastic store memory for synchronizing the bits of cells arriving from the incoming line. Separation circuit 11 generates connection information by copying the information necessary to generate connection information such as the output node address from the header information of the cell. Sends the cell itself to the circuit 12 and the cell queue 13 for the incoming line.
Transfer to The connection information generating circuit 12 determines an outgoing line node based on the information sent from the separating circuit 11, generates connection information necessary for routing in the cell switch, and transfers it to the incoming line connection information queue 14. . The cell in the cell queue is transferred to the outgoing line queue 15 or the connection information adding circuit 16 according to an instruction from the control circuit C shown in FIG.
The cell transferred to the outgoing line queue 15 is sent out to the outgoing line under the control of the SEL shown in FIG. 5 (a), and the cell transferred to the connection information adding circuit 16 is a "cell with connection information". 5 (a) and transmitted to the output link through the switch SW. If the speed of the link between the incoming / outgoing line and the node is different, the speed may be converted at an appropriate location in INF0. 2
The capacity of each type of incoming line queue is made equal, and if all the queues are closed, the arriving cell is discarded.

FIG. 5 (c) shows an input link interface circuit INF1.
~ INF3 is a configuration example. ES is an elastic store memory for synchronizing bits of "cells with connection information" arriving from the input link in the same manner as in FIG. 5 (b). Separation circuit 11 copies connection information of "cells with connection information" and connects them. At the same time as transferring to the information buffer 12, the “cell with connection information” itself is transferred to the cell buffer 20. The connection information buffer 12 is a buffer for temporarily storing the connection information until the control circuit C reads the data. The cell buffer stores the “cell with connection information” according to an instruction from the control circuit C.
Or to the output link through the switch SW in FIG. 5 (a). The "cell with connection information" transferred to the connection information removing circuit 21 is transferred to the outgoing line queue 15 after the connection information is removed and sent out to the outgoing line under the control of the SEL shown in FIG. 5 (a). If the speed of the link between the incoming / outgoing line and the node is different, the speed may be converted at an appropriate location in INF1.

FIG. 6 shows an operation sequence of the control circuit of FIG. 5 (a). This operation is repeatedly performed with the transfer time of one cell on the input / output link as one cycle. The sequence will be described below.

Step I: Determination of Transfer Destination Link Candidates (“Cell with Connection Information”) If connection information buffers in all input link interface circuits are searched and connection information is included (ie, “cell with connection information” is earlier) The connection information is extracted (if it has arrived at the period of (1)), and candidates for the transfer destination link of the corresponding “cell with connection information” are obtained for each of them.

Step II: Determination of Transfer Destination Link (“Cell with Connection Information”) Check for free / occupied candidate links in ascending order of the number of transferable link candidates (ie, in ascending order of distance to the final destination node). In this case, the transfer destination link is determined. When all the candidates are closed, the routes of all the “cells with connection information” are determined, and then the detour destination link is determined. When there are a plurality of “cells with connection information” having the same number of transfer link candidates, the order does not matter (however, the number of detour encounters up to that point is stored in the connection information, and “cells with connection information” with many detours are stored. By giving priority, the variance of the number of bypass encounters by the cell can be reduced). In addition, the order of the “cells with connection information” at the time of determining the bypass route is not important. If there are a plurality of free transfer link candidates, any link may be selected. (However, if a link with a small number of “cells with connection information” that selects that link as a transfer destination candidate is selected first, the link block rate is further increased. Can be expected to decrease).

The “cell with connection information” having the number of transfer link candidates of 0 is transferred to the connection information removing circuit to be placed in the outgoing line queue because the own node is the final destination. If there is no free space in the outgoing line queue, it is detoured (if the probability that the outgoing line queue is completely blocked is very small, it may be discarded without detouring here). As shown in FIG. 5 (a), the number of input links and the number of output links of each node are equal. Therefore, even if all the "cells with connection information" are addressed to other nodes, they can always be transferred to an adjacent node.

Step III: Determination of Transfer Destination Link (Cell from Incoming Line) If there is connection information at the head of the connection information queue of the interface circuit INF0 for incoming line, this is read out and candidates for the transfer destination link are obtained. In the case of a node, transfer to the outgoing line queue. If the destination of the cell is not its own node, the inter-node link is checked for occupancy, and if there is vacancy, a link is searched for from transfer link candidates to determine a transfer destination link. When all the candidates for the transfer destination link are completely closed, the link is bypassed. Even if the outgoing line queue is not fully closed, it is bypassed as much as possible. If the link is completely blocked to the other node or if both the outgoing line queue and the link are completely blocked to the own node, the removal from the incoming line queue is abandoned and the next cycle is performed.

Step IV: Output processing In the above steps, all "cells with connection information" to be processed in this cycle and cell processing have been determined, so the SW connection pattern is determined and driven, and output to the link through the SW. In order to output the "cell with connection information" and / or the cell, each interface circuit is instructed.

Output of cells in the outgoing line queue to the outgoing line is performed under the control of the selector circuit SEL. The SEL sends out the cells in the outgoing line queue of all the interface circuits to the outgoing line one by one.

The implementation examples of the present invention have been described above with reference to FIGS. 5 (a), (b), (c) and FIG. 6. However, the method of having the outgoing line queue common to all the interface circuits in the node, If there is a free link, a method of extracting a plurality of cells from the incoming line queue at the same period and transferring the cells is also conceivable. The control circuit may be realized by a microprocessor, or the sequence of FIG. 6 may be realized by hardware when high-speed operation is aimed.

〔The invention's effect〕

In order to increase the throughput, it is necessary to reduce cell discard even during high traffic. Although the self-routing channel of the present invention allows a plurality of cells to arrive at the same outgoing line at the same time, if the capacity of the outgoing line queue is made sufficiently large, the overflow probability can be reduced. Even when the method of discarding cells at the time of overflow is adopted, the discard rate here becomes small.

Since the only opportunity to discard cells other than when the outgoing line queue overflows is when the incoming line queue overflows, this case will be considered below.

Cells accumulate in the incoming line queue when all inter-node links are blocked as described in the embodiment. Assuming that cell destinations are uniformly distributed in all outgoing lines, the use rate of the inter-node link is at most 0.5 (when the incoming and outgoing line use rate is 1) ignoring the rise in link use rate due to "detour". Therefore, the present invention proposes a method for giving priority to cells having a short distance to the destination node in order to reduce the “detour”. In this case, the inter-node link usage rate is considered even if the influence of the “detour” is considered. Is well below one.
Therefore, the probability that all the inter-node links of one node will be closed is very small, and if the capacity of the incoming line queue is increased to some extent, the cell loss rate becomes extremely small. (Calculating on the assumption that the cell destination is uniform, the load in the communication path is uniform, and the capacity of the outgoing line queue is sufficiently large, the node is used even if the incoming line usage rate becomes 1 when the number of incoming and outgoing lines is 1024. The usage rate of the inter-links is 0.6 or less, so in this case the probability that all inter-node links will be closed is (0.6) ^{10 to} 0.006
As described above, according to the present invention, it is possible to realize a self-routing communication path that allows the existence of a plurality of cells destined for the same outgoing line and that can maintain high throughput with a switch.

[Brief description of the drawings]

FIG. 1 is an explanatory view showing a self-routing communication path in which nodes accommodating incoming and outgoing lines are connected by a hypercube network according to an embodiment of the present invention, and FIG. 2 is an explanatory view showing a self-routing communication path according to the prior art. FIG. 3 is an explanatory diagram of information (cells with connection information) moving between nodes in FIG. 1, FIG. 4 is an explanatory diagram of a basic routing method in a hypercube network used in the present invention, and FIG. a) A block diagram showing an example of implementation of each node in FIG.
FIG. 5 (b) is a block diagram showing an implementation example of the interface circuit for incoming lines of FIG. 5 (a), and FIG.
6A is a block diagram showing an example of realizing the incoming link interface circuit shown in FIG. 5, and FIG. 6 is an explanatory diagram showing an example of realizing the operation sequence of the control circuit shown in FIG. 5A. Description of reference numerals INF0-3 INF: Interface circuit, SW: Switch, C
…… Control circuit, SEL …… Control circuit, ES …… Elastic store memory

Continuation of the front page (56) References JP-A-2-184143 (JP, A) JP-A-2-43849 (JP, A) JP-A-61-289746 (JP, A) JP-A-1-240052 (JP) , A) Proceedings of IEICE Spring National Convention, B-440 (1990-3-15), P.3-18 ISS'90 (1990-5), P. 105-110 (58) Field surveyed (Int. Cl. ⁶ , DB name) H04L 12/28 H04L 12/56

Claims (1)

(57) [Claims] 1. A self-routing intercom that transfers communication information (cell) from a specific incoming line to a specific outgoing line using connection information added to the communication information and accommodates a set of outgoing and incoming lines. The controlling nodes are interconnected by a hypercube network based on the address, and each node determines (a) the outgoing line of the cell arriving at the queue corresponding to the incoming line, and determines the node address accommodating the outgoing line. (B) a function of comparing each destination node address of a cell with connection information arriving from a plurality of adjacent nodes with its own node address, and calculating a distance to a destination node for each; (C) When the distance is 0, that is, when the destination node is the own node, a function of storing the cell or the cell with connection information in a queue for transmitting from the outgoing line. (D) For a cell with a distance of 1 or more, find a link candidate (or a plurality of links) to be transferred, and transfer cells with connection information arriving from an adjacent node from among the candidates in ascending order of the distance to the destination node. A function of searching for a possible link and finally searching for a transfer link of a cell arriving from the incoming line. (E) In the process of (d), if all candidate links are blocked, the cell or the cell with connection information (F) A cell in the incoming line queue is stored in a queue corresponding to the incoming line if there is no free link to be transferred, (G) a function of simultaneously transmitting the cells to the destination after determining the destination links of all the cells; (h) extracting the cells from the outgoing line queue and the destination node address, etc. A self-routing communication path characterized in that the function of transmitting a cell to an outgoing line after removing connection information added to reach the outgoing line is repeatedly performed with a transfer time of one cell as a cycle.