JP2724174B2 - ATM switch for distribution connection - Google Patents

Description

Detailed Description of the Invention [Table of Contents] Overview Industrial application field Conventional technology (FIGS. 6, 7, 8, 9, 10)
Figure) Problems to be Solved by the Invention Means for Solving the Problems (FIG. 1) Operation (FIG. 2) Embodiment (FIGS. 3, 4, and 5) Effects of the Invention [Overview] Distribution Connection With regard to a possible ATM switching device, with the aim of realizing the distribution of ATM cells, M primary switch modules accommodating m input highways and having m × N output lines are provided. , N × N secondary switch modules having m × M input lines and accommodating n output highways,
Each cell arriving at the ATM multiplex from each of the m × M input highways is exchanged via the M primary switch modules and the N secondary switch modules, and is exchanged from each of the n × N output highways. In an ATM switching device capable of output distribution connection, each of the primary switch modules is provided for each input highway, and an arbitrary number of secondary switch modules are distributed to cells input via the input highway. And a first space switch having N input points and N output terminals each having N cross points for each input highway, and N means of the first space switch. Of the output lines connected to the output terminals of the second switch modules are connected to the input lines of the respective second switch modules. A cell output from the first means, and switching control of each crosspoint of the first space switch according to the contents of the routing header, to control a secondary destination designated by the routing header. A second means for outputting to an input line of the switch module, and further comprising a third means for storing each of the secondary switch modules, the cells being output from a first space switch of the primary switch module; , Extracting n or less cells from the third means for each cell transmission cycle,
A fourth means for performing a process of assigning numbers from 1 to n to these cells as an internal header, and the number of input terminals m × M having n cross points for every m × M input lines
And a second space switch having n number of output terminals, and using the internal header of the cell to perform switching control of n cross points of the second space switch, thereby making the cell correspond to the internal header. And a fifth means for routing to the output highway.

[Industrial applications]

 The present invention relates to an ATM switching device capable of distribution connection.

2. Description of the Related Art Conventional telephone-based communication networks are shifting to ISDN (Integrated Services Digital Network), which can provide various communication services to users with the same access method. In particular, ATMs that can handle voice, data, images, etc.
Broadband ISDN based on (Asynchronous Transfer Mode) technology is promising. Under the ATM system, cells of fixed information length with a header such as VCI (Virtual Channel Identifier) are transferred only while there is information, and exchange / transfer processing using that header is performed. Even during a call, it is not necessary to occupy one line as in the circuit switching system, and various communication media including burst data can be processed in a unified manner.

And even under such broadband ISDN, CAT
V, video conferencing, etc. are also included in the unified treatment, but in such communication media, it is also required that efficient distribution connection such as 1: N can be efficiently performed. ing.

[Conventional technology]

The earliest scheme in such a distribution exchange involves storing a packet on an input link in a storage device and sending the read packet to an output link to be distributed, in order to send the packet on a desired number of output links. The software processing of storing and reading out the data in each buffer connected to the software is performed for each packet. However, since the cumulative number of processing steps for each packet in the software processing is large and the exchange speed is low, hardware processing is performed. A self-routing switching system based on distributed control has been developed and is being put to practical use.

One example is as shown in FIG. Packet data received from the input links # 1 to #n (hereinafter, packet data)
A cell is simply called an input logical channel number (ILCN) and information. This cell enters the header processing unit 100 ₁ to 100 _n, which is controlled by the call processing control unit 101, a routing header (RH) and its output link own output a logical channel number (OLCN) is added showing the output link number Is done. The self-routing switch 110 receives these cells and selects an output link based on the RH of the cell. Then, each cell is output from the output links # 1 to #m. Note that n and m may be the same or different.

In this system, when one-to-N distribution connection is to be performed, the header processing unit adds the routing header (RH) and the output logical channel number (OLCN) by an additional processing sequence for the number of distributions as shown in FIG. Repeatedly, a cell consisting of the self-routing control information followed by the input cell is input to the self-routing switch 110.

In this self-routing exchange method, the header processing unit only has a routing header (RH) corresponding to the distribution number.
Therefore, it is necessary to repeat the sequence of adding the output logical channel number (OLCN) and the output logical channel number (OLCN), thereby increasing overhead. Further, since the length of the header portion changes depending on the number of distributions, self-routing becomes complicated or difficult.

As a technique for avoiding such a problem, there is a self-routing switching method as shown in FIG. In this method, cells entering through the input rank are buffered.
0 _{1 to} 200 _n are provided to the header processing units 210 _{1 to} 210 _n . The information entered in the header processing sections 210 _{1 to} 210 _n returns to the buffer input as many times as necessary in the case of a distribution connection having a plurality of destinations. For example, as shown in FIG.
Assume that an input information cell has entered and that information 1 of cell C1 is to be output to output links # 1, # 2 and # 3.

First, the cell C1 that has entered the header processing unit 210 ₁ via the buffer 200 ₁ (ILCN is to a) routing header RH indicating a row destination (output link) (here denotes the # 1 "1") and therein Logical channel number (OLCN) a1 (No. 9)
Of the figure). The input cell C1 is fed back to the input of buffer 200 ₁ again. During this time, input cell C2 (ILCN is b
To) the LCN converted enters the header processing unit 210 ₁ is performed through the buffer 200 _1, routing header RH (where denotes the # 2 "2") and a logical channel number in it (OLC
N) b1 is attached (of FIG. 9).

Next, the cells C1 which has been waiting in the buffer 200 _1, conversion of LCN is performed enters the header processing unit 210 ₁ again. That is, the routing header RH ("2" indicating # 2) and the logical channel number (OLCN) b2 therein are attached to the same information 1 (FIG. 9). After repeating the operation a required number of times (one more time in the example in the figure), the self-routing switch 220 is switched by the routing header RH, so that a 1: N distribution connection can be performed. In the example of the figure, information 1 can be distributed to three output links # 1 to # 3.

In the latter method, the disadvantages of the former method are eliminated, but the operation of performing the LCN conversion on the cells according to the input of the buffer must be repeated by the number of distributions, so that the delay increases.

A distributed control type self-routing switching system capable of efficiently performing distributed connection while eliminating such technical problems has already been proposed. This method is as shown in Fig. 10,
When a call processing request signal is input to the call processing control unit 330, a logical channel number (LCN) on an input link and an output link to be given to the call is determined and notified to a preceding or subsequent station or terminal. . Thereafter, the cell routing for this call is based on these input / output logical channel numbers (ILCN, OLC
N). For example, cell C1 coming from input link # 1 is composed of an information part and an input logical channel number (ILCN). Routing header processing unit 300
₁ assigns an input link number (ILN) indicating which input link the information comes from, and an output link flag (OLF) corresponding to the link of the output destination. ILN and OLF
Cell Cla with is followed by self-routing switch 3
In step 10, the self-routing switch 310 stores the cell Cla in the buffer BU of the output link corresponding to the bit in which the output flag (OLF) is set, and reads the cell Cla.

In the output logical channel number processing unit 320 _1, the logical channel number on the output link corresponding to the ILCN and ILN (OLCN)
And sends it to the output link (here, # 1).
As a result, the output from the logical channel number processing unit 320 _1, output logic channel number (OLCN) and become a cell Clc only information out to the output link # 1. Input cell in this method
Both C1 and the output cell Clc are composed only of information and LCN.

[Problems to be solved by the invention]

In this distributed control type self-routing switching system, since the routing is basically to output from one input link to one output link, the routing process must be performed for the number of corresponding links. For example, if both input and output links are 10
If there were 00, cells would have to be routed to any of the 1000 outputs for each cell. Therefore, as the number of input links and output links increases, the routing process becomes very troublesome.

This relationship is inherited even when performing distributed control.

The present invention has been created in view of such problems,
It is an object of the present invention to provide an ATM switching system capable of distribution connection that can perform distribution under simplification of routing and the like.

[Means for solving the problem]

FIG. 1 shows a principle configuration diagram of the present invention. As shown in this figure, M primary switch modules 11 accommodating m input highways and having mxN output lines are provided, further, mxM input lines are provided, and N secondary switch modules 12 accommodating n output highways are provided, and each cell arriving by ATM multiplexing from each of the mxM input highways is transmitted to the M primary switch modules 11 and N In an ATM switching device which can be exchanged via the secondary switch module 12 and output from each of the n × N output highways, each primary switch module 11 is provided for each input highway, and the input highway is provided. Number of destination secondary switch modules for cells input through
The first means (routing providing circuit 4 _i , routing providing unit 4 _ij (i = 1,
2,..., M, j = 1, 2,..., M), and a first spatial switch 6 _ij having N input points and N output terminals having N cross points for each input highway. First space switch 6 _ij
The output lines connected to the N output terminals of each of the N second switch modules 12 are connected to the input lines of the second switch modules 12, respectively, and The cell output from the means (4 _ij ) is _subjected to switching control of each cross point of the first spatial switch 6 _ij according to the contents of the routing header, and the secondary switch module to which the routing header points is designated. And a second means (6 _i ) for outputting to the 12 input lines, and each of the secondary switch modules is a third means for storing cells output from the first space switch of the primary switch module. Means (10 _ijk , k = 1,2,…, N)
Fourth means (buffer read control circuit 40 _k) for taking out n or less cells from the third means for each cell transmission period and assigning a number from 1 to n to these cells as an internal header ) And n for every m × M input lines
The second space switch (the concentrator space switch 46) having m × M input terminals and n output terminals having the number of cross points.
_k means for controlling the switching of the second spatial switch using the internal header of the cell and routing the cell to the output highway of the secondary switch module 12 corresponding to the internal header (the spatial switch control circuit 44). _k ,
Concentrator space switch 46 _k ).

(Operation)

FIG. 2 is a diagram for explaining the operation principle of the present invention. As shown in FIGS. 1 and 2, there are M primary switch modules 11 accommodating m highways and N secondary switch modules 12 accommodating n output highways. In an ATM switching device for exchanging cells arriving at an ATM multiplex from an input highway, a 1 × N space switch 6 having N input points and N output terminals having N cross points for each of m input highways. _ij (i = 1,2,
.., M, j = 1, 2,..., M) and M primary switches are arranged in the primary switch module 11.

Each of the N secondary switch modules 12 has m × M
Buffers 10 _ijk (i = 1, 2,..., M, j = 1,
2,..., M) and a concentrating space switch 46 _k (k = 1, 2,..., N) having m × M input terminals and n output terminals. The output terminal of the first spatial switch 6 _ij and the input buffer 10 _ijk of the secondary switch module 12 are connected one-to-one to a single link 8 _ijk (k = 1, 2 _,. Next switch module 12 corresponding each)
In the primary switch module 11, each cell is provided with a routing header indicating an arbitrary number of secondary switch modules 12 to which the cells are distributed, and the header includes a 1 × N space switch 6 _ij.
To control the number of secondary switch modules for the number of cells to be distributed
At the same time accumulate 12 of the input buffer 10 _ijk, whereas in the second switch module 12, by the action of the space switch control circuit 44 _k, m × M pieces of the input buffer 10 scans _ijk, cell every transmission cycle of the cell _Are taken out one by one from the input buffer 10 _{ijk of} n or less that accumulates them, and the cells of a total of n or less are taken out, and these cells are numbered from 1 to n and assigned as internal hegs. The switch _46k is controlled to autonomously route the cell to a predetermined secondary switch module 12 output highway.

More specifically, a cell input from the input highway 2 _ij = x is added with the input highway number of the input highway and a routing header. As shown in FIG. 2, for example, as shown in FIG. 2, if the output highway group to be distributed is p, q, the added routing header is the output highway group in the routing header, that is, the corresponding bit of the corresponding secondary switch. To “1”
And

When the spatial switch 6 _ij is controlled by the routing header, the spatial switch 6 _ij is distributed to the links (cell transfer paths) 8 _ijp and 8 _ijq from the input highway group to the output highway groups p and q.

The cells on these links 8 _ijp , 8 _ijq are stored and stored in the same way as the cells on the cell transfer path that transfer cells from other spatial switches to the output highway group to which the links belong, and store them. .

For each of the output highway groups, of the stored cells, the cells to be read in the same cell transmission cycle are read out by the number of output highways belonging to the same output highway group for each cell transmission cycle. An internal header indicating the output highway is added and transmitted.

Then, for each output highway group, a size determined by the product of the number of input highways and the number of input highway groups in the input highway group, that is, mxM, and the number n of output highway groups under the control of the internal header of the transmitted cell. To control the concentrator spatial switches 46 _p , 46 _q, etc., composed of the self-routing type spatial switches, and output the cells to the output highway designated by the internal header of the concentrator spatial switches 46 _p , 46 _q . . The virtual channel number of the cell A output to the output corresponding to the output highway is converted into an output virtual channel number C corresponding to the input virtual number a and the input highway number x of the input cell A, and designated by the internal header. Output highway. Cell B is similar.

〔Example〕

FIG. 3 shows an embodiment of the present invention. In this figure,
2 _ij (i = 1, 2,..., M, j = 1, 2,..., M) are m ATM inputs of the same incoming route (corresponding to the input highway group in FIG. 1). On each of the highways. 4 _ij is AT
It is a routing header providing unit provided for each of the M input highways _2ij . This routing header adding unit 4 _ij
Outputs a routing header consisting of N bits,
"1" is given to the bit corresponding to the outgoing route to be distributed, and "0" is given to the bit corresponding to the other outgoing route. Reference _{numeral 6i} denotes a first space switch, which is composed of 1 × N space switches _6ij composed of m self-routing space switches for distribution. The detailed configuration is shown in FIG. 4. The configuration shown in FIG. 4 is the same as that of a 1 × N self-routing type space switch provided in the same configuration for each routing header providing unit 4 _ij belonging to each incoming route. Are shown as representatives. This space switch 6 _ij
A D-FF composed of N D-FF circuits 20 _k (k = 1, 2,..., N) connected to the output of the routing header providing unit 4 _ij
The circuit row 24 and one input routing header providing unit 4 _ij
The output of the configured the other input from the AND circuit 22 _k connected to the corresponding D-FF circuit 20 _k.

Among the distribution outputs of the first spatial switches 6 _i, the distribution cells output to the cell transfer path (link) 8 _ijk belonging to the same output path k (corresponding to the output highway group in FIG. 2) are the same output paths. It is connected to a corresponding input buffer 10 _ijk in the secondary switch module 12 _k for the path. This secondary switch module _12k is disclosed in the specification and the drawings attached to the patent application filed on Sep. 19, 1988 by the present applicant. It is explained below.

40 _k is a buffer read control circuit, and the input buffers 10 _11K , 10 _12K ,..., 10 _M1K ; 10 _21K , 10 _22K ,..., 10 belonging to the secondary switch module 12 _k per cell read cycle.
_MmK ; ...; 10 _M1K , 10 _M2K , ..., 10 _MmK is set to a predetermined scan order (for example, each input buffer is sequentially or the input buffer is divided into a plurality of groups, and scanning is performed for each group. When the data is read from the input buffer in the group, the input buffer transmission right is moved to the next input buffer in the group, and the scan order of each group is set in a predetermined scan order such as a cyclic order. To read out n cells or less, and generates and outputs an internal header consisting of numbers 1 to n indicating the output highway in response to each cell read. 42 _11K , 42 _12K , ・ ・ ・, 42 _M1K ; 40 _21K , 40 _22K , ・ ・ ・,
42 _M2K ;... 42 _M1K , 42 _M2K ,..., 42 _MmK are delay absorption buffers for storing read cells and internal headers for the cells. 44 _K is a space switch control circuit,
At the end of reading of n or less cells from the above-mentioned m × M input buffers, the internal header read from all the delay absorption buffers at the same time uses the internal header of the mm × N self-routing type space switch (converging space switch) 46. _The output of 14 _Kl (l = 1, 1) specified by each internal header by controlling the _k cross point
2,..., N) output the cell corresponding to the internal header to (corresponding to the ATM output highway).

The VCI conversion circuit 16 _Kl connected to each output 14 _Kl of each secondary switch module 12 _K converts the header of the cell that has been condensed there and input to the ATM output highway (corresponding to the output transmission line in FIG. 1). The output is converted to a suitable output VCI, which is connected to the ATM output highway 18 _Kl . This conversion of the VCI is used in the distributed control type self-routing switching system described in the section of [Background Art].

An example of the operation in the above-described configuration embodiment will be described below in correspondence with the description of the operation principle diagram of the present invention described in the section of [Operation]. The input transmission line x in FIG. 2 is connected to the ATM in FIG.
Attitude and the input highways _211, the ATM input transmission paths y and ATM input highways 2 _M1, output-cell A of ATM input highways ₂₁₁ channel p, and partitioned q, the cell B on the ATM input highways 2 _M1 road p, assuming that distributes the r, in the routing header adding unit 4 _11, although ATM input highways ₂₁₁ cell input HW number 1 and N-bit routing header of is applied, attitude in its routing header The bits corresponding to the paths p and q are each set to "1" (see FIG. 2). This is the same for the ATM input highway 2 _M1 .

Routing header adding unit 4 ₁₁ and 4 _M1, such as the aforementioned input highways (HM) number and cell A is added to the routing header, B is input to the first space switch 6 ₁ and 6 _M, the first space routing header to D-FF circuit chain 24 ₁ in the switch is shifted in are held in their D-FF circuit array 24 _1, 24 _M. D-FF circuit array 24 _1, 24 cell distribution as indicated by the contents of the routing header held in the _M is caused in each of the primary switch module 6 _1, 6 _M. That is, the cell A to which the input HW number 1 is added is written to the input buffers 10 _11p and 10 _11q in the secondary switch modules 12 _p and 12 _q via the cell transfer paths 8 _11p and 8 _11q . The cell B is written to the input buffers 10 _M1p and 10 _M1r in the secondary switch modules 12 _p and 12 _r .

The self-routing process in the secondary switch modules 12 _p , 12 _q , 12 _r is performed according to the disclosure in the specification and drawings of the above-mentioned patent application. The summary is as follows.

In the secondary switch module 12 _p, the buffer read control circuit 40 _p each 10 belongs input buffer under the control of _{11p, 10 12p, ···, 10} 1mp; 10 21p, 10 22p, ···, 10
_2mp ; ・ ・ ・; 10 _M1p , 10 _M2p ,..., _Scanning for 10 _Mmp are sequentially performed in each cell read cycle or in group order.
When the number of cells read from the input buffers becomes n or the number of input buffers counted from the scan start input buffer reaches mM, the scan in the cell read cycle is performed. finish. Each time a cell is read from the input buffer as described above,
From the buffer readout circuit 40 _p in response thereto, an internal header for cell read into the corresponding delay absorbing buffer is added to the cell is sent to the delay absorption buffer.

Then, at the end of the scan, reading of all delay absorption buffers is performed simultaneously, and the internal header of the read cell is used in the space switch control circuit _44p , from which the output _14pl designated by the internal header is output. a switching signal allowed to sending the cell is generated to the cell self-routing type space switch 46 _p is read from the delay absorption buffer is switching mM × n in the switching signal is output to the internal header specified output 14 _Kl You.

If the scan to the input buffers 10 _11p and 10 _11q in such a self-routing concentrator just occurred at the same interval as the generation of the internal header, the first
As shown, cells A and B are placed on the same output highway _18pl.
Is sent. The output VCI of cells A and B in that case is
In the same manner as the method shown in FIG.
It is converted to the output VCI on the output highway corresponding to the W number.

[Effects of the Invention] As described above, according to the present invention, by grouping the input highway and the output highway, it is possible to realize a distributed connection while improving the use efficiency of both highways while facilitating the routing process.

[Brief description of the drawings]

1 is a diagram illustrating the principle of the present invention, FIG. 2 is a diagram for explaining the operation principle of the present invention, FIG. 3 is a diagram illustrating an embodiment of the present invention, and FIG. FIG. 5 is a diagram showing a configuration of a 1 × N self-routing type spatial switch, FIG. 5 is a diagram showing a configuration of a secondary switch module, FIG. 6 is a conceptual diagram showing a first example of a self-routing switching system, and FIG. FIG. 8 is an explanatory diagram of a method of realizing a distributed connection in a front-end system, FIG. 8 is a conceptual diagram showing a second example of a self-routing switching system, FIG. 9 is an operation explanatory diagram of the system shown in FIG. 2, and FIG. It is a conceptual diagram showing the 3rd example of a self-routing switching system. 2 _ij is an input transmission line, 4 _ij is a routing header adding unit, 6 _ij and 46 _K are self-routing type space switches, 8 _ijk is a cell transfer line, and 18 _Kl is an output transmission line.

 ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Michio Kusanagi 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (56) References JP-A-2-822741 (JP, A) JP-A-1-177239 (JP, A) JP-A-64-29045 (JP, A) JP-A-63-294036 (JP, A)

Claims (1)

(57) [Claims] 1. An apparatus for accommodating m input highways and m ×
A primary switch module having N output lines is denoted by M
And N secondary switch modules having m × M input lines and accommodating n output highways, each cell arriving by ATM multiplex from each of the m × M input highways. Is exchanged via the M primary switch modules and the N secondary switch modules, and is output from each of the n × N output highways. A first means for providing a routing header indicating an arbitrary number of secondary switch modules to which cells are distributed via input highways, provided for each input highway; A first space switch having N input points and N output terminals having N cross points, and an output connected to N output terminals of the first space switch. A line for distributing each of the lines to the N second switch modules and connecting to the input line of each of the second switch modules; and further outputting cells output from the first means to the routing header. Switching control of each cross point of the first space switch according to the content, and outputting to the input line of the secondary switch module of the distribution destination indicated by the routing header;
Means for storing the cells output from the first space switch of the primary switch module; and the third switch module for each cell transmission cycle. A fourth means for taking out n or less cells from the means and assigning a number from 1 to n to these cells as an internal header; and n cross points for every m × M input lines A second space switch having m × M input terminals and n output terminals, and having the internal header of the cell being subjected to switching control so as to convert the cell to a secondary corresponding to the internal header. And a fifth means for routing to an output highway of the switch module.