JP2778957B2 - Character display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION "Industrial application field"
Using the generator and the character generator
Character display device. [Prior art] In recent years, personal computers have become very popular,
The specifications of personal computers used in Europe and the United States
It has become a global standard. Therefore, these specifications
Many excellent software that matches
And personal computers for mass production of the same standard.
The price of the computer itself is becoming cheaper. "Problems to be solved by the invention" By the way, European and American standard type personal computers
Indicates that alphanumeric characters are displayed as display characters (characters).
It is enough if you can. On the other hand, this type of personal computer
When running Japanese software on a computer
Needs a kanji display function. in this case,
In graphic mode, you can use any characters such as kanji
It is possible to display the text
Function (character display function) reduces the execution speed
The problem arises. Also, it is extremely difficult to transplant
Had the disadvantage of Therefore, the applicant of the present invention has adopted a personal computer of European and American standard specifications.
Even when using a computer, characters such as kanji
Can be displayed in text mode,
Execution speed, software compatibility and
Character display device that can facilitate portability and transplantation
Was developed earlier (Japanese Patent Application No. 62-219576). This character display device uses a so-called
Expressed in 2 bytes using Shift JIS code, alphanumeric characters
Are expressed in one byte. Schiff
G JIS defines the kanji wards in JIS C 6226
Move to unused ward and assign normal alphanumeric characters
The position is not duplicated.
Shows the code map. In this figure, S.JIS-I and
Areas marked with the symbols S and JIS-II are kanji sections.
Also, alphanumeric (ANK) characters, half-width Gaiji and Kana (KAN
Characters displayed in half-width characters such as A) are 1-byte codes,
Meaning (00) _H ~ (7F) _H And (A0) _H ~ (DF) _H To
Is specified. In the character display device described above, the character code
Whether it is a kanji code or an alphanumeric code depending on the contents of the first byte
Identify and read the font data of the corresponding character
doing. As a result, 1 byte alphanumeric character code and 2 bytes
Ito Kanji character code can be mixed in the memory
To ensure compatibility and portability with European and American standard equipment.
Have. Also, the memory capacity required for each character code
There is also an effect that the amount and the display area correspond. By the way, the kanji area of the shift JIS code is shown in Fig. 6a.
Since they are not continuous as shown in the figure, the code
If you create a character generator with
There are many areas and storage efficiency is poor. The present invention has been made in view of the above circumstances,
It is possible to access with Shift JIS code
Character generator with good storage efficiency
Character can be displayed satisfactorily using the
It is an object to provide a tractor display device. "Means for Solving the Problems" To solve the above problems, the first invention
Is entered by entering the Shift JIS code.
Output font data of characters corresponding to JIS code
Character generator, the first byte and
A 2-byte address consisting of the second byte is assigned
And a series of storage areas.
As the first byte (E0) _H ~ (E9) _H Each shift including
The kanji font data corresponding to the JIS code
Assignment of address where upper 2 bits of byte are “00”
Stored in each storage area allocated as the first byte (E
A) _H Kanji phone corresponding to each Shift JIS code including
The first byte is (80) _H Of the address that is
Stored in each assigned storage area, and
Shift data corresponding to the font data.
Keys stored in the storage area with the S code as the address
A character generator and the character generator based on the shift JIS code.
Means for outputting a read address to the convergence generator, wherein: a. The first byte is (E0) _H ~ (E7) _H Is each shift JIS
For codes, the shift
Upper 2 bits of the second byte of the JIS code, shift JIS
Lower 3 bits of first byte of code, (00) _B ,
Lower 6 bits of the second byte of the shift JIS code
B. The first byte is (E8) _H Or (E9) _H Each shift is
For JIS code, (00)
_B , The least significant bit of the first byte of the Shift JIS code
Upper 2 bits of the second byte of the Shift JIS code
G, (00) _B , Below the second byte of the Shift JIS code
Output read address consisting of 6 bits
C. The first byte is (EA) _H For each Shift JIS code
In this case, (00000) _B ,
Upper 2 bits of the second byte of the shift JIS code,
Each lower 6 bits of the second byte of the JIS code
D. For the shift JIS code other than the above a, b, c,
Address that outputs the shift JIS code as the read address
Conversion means and font output from the character generator
Create serial dot data for display based on data
And a dot data creation unit
I have. In the second invention, the shift JIS code is entered.
Sentence corresponding to the Shift JIS code
Character generator that outputs character font data
And the two bytes consisting of the first byte and the second byte
From a series of storage areas to which
In the font data, the first byte (E
0) _H ~ (E9) _H Han corresponding to each shift JIS code including
The upper two bits of the second byte
For each storage area assigned the address "00"
Remember, as first byte (EA) _H Each shift JIS including
The first byte of the kanji font data corresponding to the code
But (80) _H Each memory area assigned an address that is
The font data of each other character
The shift JIS code corresponding to the
The first character generator stored in the storage area
Data and the font data of the character indicated by the 1-byte character code.
Character generator that stores data, and a character code whose character code output from the memory is 1 byte.
If it is a mode, the second character generator
Selecting means for selecting, and the first character based on the shift JIS code.
The read address to the storage means of the generator
The first byte is (E0) _H ~ (E7) _H Is each shift JIS
For codes, the shift
Upper 2 bits of the second byte of the JIS code, shift JIS
Lower 3 bits of first byte of code, (00) _B ,
Lower 6 bits of the second byte of the shift JIS code
B. The first byte is (E8) _H Or (E9) _H Each shift is
For JIS code, (00)
_B , The least significant bit of the first byte of the Shift JIS code
Upper 2 bits of the second byte of the Shift JIS code
G, (00) _B , Below the second byte of the Shift JIS code
Output read address consisting of 6 bits
C. The first byte is (EA) _H For each Shift JIS code
In this case, (00000) _B ,
Upper 2 bits of the second byte of the shift JIS code,
Each lower 6 bits of the second byte of the JIS code
D. For the shift JIS code other than the above a, b, c,
Address that outputs the shift JIS code as the read address
Output from the first and second character generators.
Serialization for display based on the font data
And a dot data creation unit for creating dot data.
It is characterized by: [Action] Font data of character code by Shift JIS is continuous
Since the addresses are rearranged and stored in the order of the addresses,
It has good storage efficiency, and requires
Data is stored. In addition, the shift JIS code is
Is converted to the address data of the
Even if the shift JIS code is used,
Point data from the character generator
be able to. In the second invention, it is indicated by a one-byte character code.
Characters and fonts of characters by Shift JIS code
Data are set to unique addresses
The one-byte character code and the two-byte character code
Even when mixed, access to each character contact data
Source does not overlap. Then, the character code output from the memory
Depending on whether the code is 1-byte code or 2-byte code,
The corresponding character generator is selected and
Since the address corresponding to the character code is created,
Normal alphanumeric character code and shift JIS code in memory
Even if characters are mixed, the corresponding character
Event data can be read. Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
I do. FIG. 7 is a block diagram showing the overall configuration of an embodiment of the present invention.
FIG. In FIG. 7, reference numeral 1 denotes, for example, a Western standard type par.
CPU provided in the Sonal Computer (central processing
Device) and operates based on a predetermined program.
This CPU 1 communicates with the CRT controller 2 in various ways.
It exchanges data and controls the CRT controller 2. C
The RT controller 2 controls display on the CRT display device 4.
And display the data in VRAM (video RAM) 3 on the display surface.
Read according to the scan of
To perform display control. In this case, as shown in FIG.
3a and the second plane 3b.
In character mode, a character code is written on the first plane 3a.
The attribute that indicates the display character attribute is stored in the second plane 3b.
Butte data is stored. Here, the attribute data corresponds to the 8-bit data shown in FIG.
Each bit has, for example, the function shown in the figure.
doing. In the example shown, the 0th to 2nd bits are characters
And the 0th, 1st, and 2nd bits are
Instruct blue / green / red color on / off respectively
I do. Also, the fourth bit and the fifth bit are under
And the display of the left vertical line, and the sixth bit is
Designation of reverse characters (characters whose text color and background color are reversed),
The seventh bit specifies a blinking character. This tribute
The function of each bit of the data
Different definitions are provided as appropriate. Also, the character code is a character code by Shift JIS
is there. Next, the relationship between the data in VRAM3 and the display characters is shown in FIG.
Shown in As shown in this figure, the character code is 2 bytes
Certain Chinese characters are displayed in double-byte characters, and the character code is 1 byte
Alphanumeric characters are displayed in single-byte characters. Therefore, the display surface
The area occupied by the character and the text of the character in VRAM3
The size of the area occupied by the character code corresponds to the size. In addition,
In the VRAM3 area map shown in FIG.
Mode and attribute data are arranged alternately
However, these are actually the first plane 3a and the second plane 3b.
Are stored in pairs, and the addresses are set to the same
Is defined. Also, as shown in FIG. 9, the first plane 3a and the second plane 3a
All address buses and data buses in lane 3b are 8
The bit is connected to a common bus 15. This common bus 15
Is time-divisionally used, character codes, attribute data
Data and address data by the CRT controller 2 respectively.
Out to the common bus 15 at the timing
Is forced. In this case, the address data is
Data and column address data.
Output in time division. Each data in VRAM3 is as described above,
When roller 2 reads the character code from VRAM3,
The font data corresponding to the character code is
Read from the lacquer generator 5. And the read file
Point data to serial data, and the CRT display device
4 In this case, the character code
Display color control and blinking control based on attribute data
I will do it. Note that the above components 1 to 5 are general
Installed in European and American standard type personal computers
It is the same as the constituent element. Next, reference numeral 10 denotes a kanji display device, and the control unit 10a and the character
And a generator 10b. Han below
The configuration of the character display device 10 will be described with reference to FIG.
You. The code fetch unit 20 shown in FIG.
Is connected to the common bus 15 and the CRT controller
2 fetches character code and attribute data
To fetch these data at
You. In this case, the code fetch unit 20
Of the first plane 3a and the second plane 3b
Output enable signal (not shown)
Identify data and character codes. Also, tribute
2 bytes for both data and character code
Flip-flop with predetermined minutes (D-type flip-flop)
) Is stored. 21 is for 2 bytes
An attribute data latch unit having a storage capacity;
The attribute data in the code fetch unit 20 is
Data is fetched in order from the previously fetched data.
ing. 22 has a 1-byte storage capacity each
A sentence composed of the first storage unit 22a and the second storage unit 22b
This is a character code latch unit. This second storage unit 22b stores
The character code in the code fetch unit 20 was fetched first
Sentence in order from the first one and sent to the second storage unit 22b
The character codes are sequentially supplied to the first storage unit 22a.
ing. 23 is the upper 3 bits of data in the first storage unit 22a
Based on the character code in the storage unit
Is a full / half detection unit that detects whether
You. Double-byte characters are 2-byte character codes as described above.
The upper 4 bits of the first byte are
As you can see 8 _H , 9 _H , E _H Is stored in the first storage unit 22a.
Full-width character code can be identified by 3 bits
it can. This full / semi-detection unit 23 is a combination of logic gates.
Character code is 8 _H , 9 _H , E _H Either
If so, the full-width detection signal ZEN is output. Next, 24 is a character generator based on the character code.
CG address generation unit that generates the address of the
You. The CG address generation unit 24 generates a character based on the character code.
An address signal for the lacquer generator 10b is generated. This
In the case of, the character generator 10b
Remembered Kanji ROM 10b ₁ A that stores alphanumeric characters
NK / ROM10b _Two CG address generation
The unit 24 creates a chip address according to the character code
A select signal is also created. The CG address generator 24
Is supplied with the full-width detection signal ZEN from the full / half detection unit 23.
Is in the first storage unit 22a and the second storage unit 22b.
Generate address based on byte character code,
When the detection signal ZEN is not supplied, the first storage unit 22a
Generates an address based on the character code of Also,
Character stored in character generator 10b
Body face is 8 x 19 dots for half-width characters.
16 and 19 dots are set for
You. Here, FIG. 1 shows the kanji display of the CG address generation unit 24.
Such part and Kanji ROM10b ₁ Is shown. Fig. 1
50 is a character in the first storage unit 22a and the second storage unit 22b.
Decode the code to create signals B, C, and D (each a "1" signal)
This is the decoder to be performed. The decoding contents of the decoder 51 are as follows
It is as shown in the table.
Become. 51 is each character code in the first storage unit 22a and the second storage unit 22b
And kanji R based on signals B, C and D supplied from decoder 50
OM10b ₁ 7-bit address A of ₁₇ ~ A ₁₁ Create
In this case, the selector 51, as shown in FIG.
The lower 5 bits (b) of the character code stored in the storage unit 22a ₁₁ ~
b _Fifteen ) And the upper character code stored in the second storage unit 22b
2 bits (b ₂₈ , b ₂₇ ).
ing. FIG. 3 is a circuit diagram of the selector 51.
And the four selectors 51a to 51d and the OR gate OR1,
It is composed of OR2. Each of the selectors 51a to 51d
2 selectors with 4 bit input and 1 bit output
It is configured in pairs. Also, each of the selectors 51a to 51d
Has a 2-bit control input, which is
The output signals of the gates OR1 and OR2 are supplied.
You. The OR gate OR1 takes the logical OR of the signals D and C, and
The OR 2 takes the logical sum of the signals C and B. Each selector 51a-51d
Is the bit corresponding to the value of the signal supplied to the control input.
Input terminal is selected. Also, the selector
At the input terminals 51a to 51d, the illustrated
(See Figure 2 for numbers)
Address signal from the output terminals Ya and Yb of the selector 51a.
The signals A11 and A12 are addressed from the output terminals Ya and Yb of the selector 51b.
The signals A13 and A14 are addressed from the output terminals Ya and Yb of the selector 51c.
Signals A15 and A16 are sent from the output terminal Ya of the selector 51d.
The signal A17 is output. Here,
The following table shows the selection operation of the selector 51. Kanji ROM 10b in this embodiment ₁ Is an 18 bit ad
Bus, of which the lower 5 bits are used for scanning.
Address bus for left and right selection of fonts and fonts
You. Here, FIG. 4 shows the character font and the scan address.
The relationship is shown below. Thus, the lower 4 bits A3 to
A0 is the scan address, and A4, the lower 5 bits, is the format.
Kanji ROM10b ₁ In
The upper 13 bits of the address signals A5 to A17.
The character is selected. Then, by the operation of the selector 51,
Depending on the contents of the first byte of the character code, the address signal
The assignment of each bit of A17 to A5 and character code is shown in Fig. 5.
It is switched as shown. That is, the first character code
The content of the site is (81) _H ~ (9F) _H When (E0) _H ~
(E7) _H When (E8) _H , (E9) _H , And (E
A) _H In the case of, respectively, FIG. 5 (a), (b),
Switching is performed as shown in (c) and (d). On the other hand, Kanji ROM10b ₁ Contains the second byte of the Shift JIS code.
That the upper two bits of the
And the first byte is (80) _H Area is vacant
The address of the font data of each character is continuous using
In the order in which they are stored. 6b
Shown in the figure. In the figure, the first byte of the character code is (E
0) _H ~ (E7) _H Shift JIS format in area Ar1
The first byte is (88) _H ~ (9F) _H Second
The upper two bits of the byte are both set to the area Ar1 'of "0".
Has been replaced. To show this recombination in more detail,
It becomes like the following table. Then, the above recombination and the selection in column B of Table 2 described above are performed.
The shift operation of the apparent area Ar1 from outside
Even if you access the JIS code, you can actually use Kanji ROM10
b ₁ To access the area Ar1 '
The character font corresponding to the shift JIS code is read.
You. The first byte of the character code is (E8) _H , (E9) _H so
In the font data in a certain area Ar2, the first byte is (8
1) _H To (87) _H And the upper 2 bits of the second byte are both
The area has been rearranged to the area Ar2 'of "0". this
Details of the recombination are shown in the following table. Then, the above recombination and the switching process in column C of Table 2 are performed.
From the area Ar2 by the shift JIS code.
Area Ar2 'is actually accessed even if
In addition, the character font corresponding to the Shift JIS code
Is accessed. The first byte of the shift JIS code is (EA) _H In
The font data of the area Ar3 is the first byte of the character code.
G (80) _H And the upper 2 bits of the second byte are both
It has been rearranged to an area Ar3 'other than "0". As mentioned above, Kanji ROM 10b ₁ Has the disconnection shown in Figure 6a.
Each of the Shift JIS codes assigned to the next area
Character fonts are now stored in sequential order
Shift JIS code
Is converted to the address corresponding to the specified character. In addition, Kanji
ROM10b ₁ Character font data storage area in itself
Means that the address signals A17 to A5 are displayed in hexadecimal (000
0) _H ~ (1FFF) _H Becomes The above is the CG address generator 24
Related to Kanji display and Kanji ROM10b ₁ In the configuration
You. ANK / R, which stores fonts of alphanumeric characters
OM10b _Two Depends on the contents of the first byte of the character code.
Selected (upper 4 bits are 8 _H , 9 _H , E _H , F _H Other than
Corresponding to the first byte of the character code
Characters are directly accessed. Next, 26 shown in FIG.
dot font data of 8 bits supplied from b.
Converts to serial data based on lock DCK and converts this to
A parallel-serial converter that outputs as dot data
is there. This parallel-serial converter 26 is connected to the input terminal H.
Data is output in order from the supplied data
You. In this case, the character generator 10b
When character font data is read, one character
Output font data for 8 dots in the horizontal direction of the
When font data of full-width characters is read
Is the font data for 16 dots in the horizontal direction of the character.
Output is performed twice for every 8 dots. 27 is the output signal of the parallel / serial converter 26 and the cursor.
Exclusive OR with the output signal of the enable signal generator 43
Is an exclusive OR gate that takes
The nail signal generation unit 43 outputs the cursor enable signal CEN.
Parallel-to-serial conversion when no (“1” signal) is generated
Through the dot data output from the detector 26
ing. Reference numeral 28 denotes a color code generation unit.
Dot data supplied via the passive OR gate 27
About the predetermined color code from the color palette 31
The data is read out and output to the CRT display device 4. Prescribed color code
Is a card specified by the attribute processing unit 30.
It is a color code. That is, the attribute processing unit 30
Is an attribute supplied from the attribute data latch unit 21.
Function of each bit of tribute data (see Fig. 8)
Color code generator to select the corresponding color code
Supply a control signal to the For example, attributes
Data shows "red" as foreground color
If the
To read the red color code
You. Next, reference numeral 40 denotes an address fetch unit on the common bus 15.
Fetches the address data sent to. Common bus
The row address and the column address are time-division
Output, but the address fetch unit 40
Controller 2 outputs a strobe signal (not shown).
These are identified and stored as a set of data. address
Row address data and data stored in the fetch unit 40 are
The ram address data is supplied to the comparison unit 41, where
It is determined whether the data matches the data in register 42.
You. When the comparison unit 41 detects a match, the match detection signal is
Output to the Sol Enable signal generator 43.
You. In this case, the cursor is registered in the register 42 by the CPU 1.
Is written in advance. Curso
The enable signal generator 43 is supplied with the match detection signal.
The cursor enable signal CEN (“1” signal)
The signal is supplied to the other input terminal of the exclusive OR gate 27. This
In the case of, the full-width detection signal ZEN is supplied from the full / half detection unit 23.
Is displayed, the period
Output enable signal CEN and full-width detection signal
If the number ZEN is not supplied, the display time of half-width characters
Outputs the cursor enable signal CEN for the corresponding period.
Exclusive OR gate 27 is cursor enabled
While the signal CEN is supplied, the parallel-serial converter 2
For 6 functions as an inverter. For this reason,
Cursor is a character whose text color and background color are reversed.
Is displayed. Next, the operation of this embodiment with the above configuration will be described.
I do. First, the programs used in CPU1 use Western
When the kanji display is not performed for
The display on the CRT display device 4 does not operate and the CRT control
Controller 2. On the other hand,
Program needs to display Kanji in Japanese
In this case, the CRT controller 2
Access M3, but control CRT display 4
Do not do. And, instead of CRT controller 2, Kanji
The display device 10 is the access information of the CRT controller 2
Character code, attribute data and address
Fetch each data and CR based on these data
The T display 4 is controlled. The following describes the operation in this case.
Will be explained. First, the CRT controller 2 scans the display surface.
To access VRAM3. And the code
Switch 20 stores the character code accessed by the CRT controller 2.
And attribute data. This code
The character code taken into the fetch unit 20 is a character code
The signal is supplied to the latch unit 22 and is further
Is determined to be a full-width character or a half-width character. And the full-width sentence
If it is a character, the full-width detection signal ZEN is output and the CG
The address generation unit 24 includes a first storage unit 22a and a second storage unit 2
Characters are determined based on the 2-byte character code in 2b.
The address of the generator 10b is generated. That is, CG
Operation of the decoder 50 and the selector 51 in the dress generation unit 24
Performs the conversion shown in FIG. 5, whereby the shift
JIS code is Kanji ROM10b ₁ To the address of the corresponding character
Is replaced. Also, if the character code is a one-byte character
In this case, the full-width detection signal ZEN is not output,
The address generation unit 24 uses the character code in the first storage unit 22a to
ANK ・ ROM10b _Two Generate the address of Then, the character generator 10b outputs the full-width character
If the font is accessed, the horizontal direction of the character
16-dot data is used as address signal A4 (see Fig. 4)
Therefore, it is output twice for each of the left and right 8 dots,
If the character is accessed, the character's horizontal 8
Output the data for each bit. And parallel serial
Converter 26 is output from character generator 10b
Data is sequentially converted to serial data,
The data is supplied to the color code generator 28 via the
You. The color code generator 28 includes an attribute processor 30
Each of the supplied dot data based on the control signal of
And generates a color code and outputs it to the CRT display device 4.
You. As a result, the display surface of the CRT display device 4 has a character
Character specified by the attribute data
Color and other attributes (flashing, inverted
Etc.). On the other hand, the address fetch unit 40
Fetches the address data output by. This fe
The touched data is stored in the comparator 41 in the register 42.
Data, and if a match is found, the cursor enable
Signal generator 43 generates the cursor enable signal CEN
I do. As a result, the character at the position where the cursor should be displayed
Exclusive or gated dot data
27 functions as an inverter, thereby
Is displayed as a reversed character. In the above embodiment, the personal computer of the European and American standard
Just add the Kanji display device 10 to the null computer,
There is an advantage that kanji can be displayed. And VRAM
3 and use the CRT controller 2
Access is used as it is,
No changes are required. In the embodiment, the CRT controller 2 controls
The part 10a is added.
It may be configured as a more integrated circuit that has functions
No. Further, the above-described embodiment is applied to the kanji / kana in Japanese.
This is an example of display, but the present invention is not limited to Japanese.
It can be applied to other languages. That is, 2 or more
It is necessary to indicate the character using the character code of
Some languages, such as Chinese or Korean
Can be applied. [Effects of the Invention] As described above, according to the first invention, the shift JI
There is a part that does not exist in the value of the specific bit of the S code
Using this, the shift JIS code is discontinuous in this empty area.
Shift JIS by transferring the font data of the part
Font data for each character in the kanji code area of the code
Data was rearranged in the order of consecutive addresses and stored.
It has good storage efficiency,
Data can be stored. Also, use Shift JIS code on the program
However, it is possible to read the font data of the corresponding character.
In this case, a general-purpose program can be used as it is. Further, according to the second invention, a normal alphanumeric character code
And Shift JIS code are mixed in the program
Also, the font data of the corresponding character
Can be read. Therefore, improvement of storage efficiency and
Both are the softwares of personal computers that use Western standards.
Software compatibility and portability.
Wear.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a configuration of a main part of an embodiment of the present invention, and FIG. 2 is a first storage unit 22a and a second storage unit shown in FIG.
FIG. 3 is a block diagram showing the connection relationship between 22b, decoder 50 and selector 51, FIG. 3 is a circuit diagram showing details of selector 51, FIG. 4 is a diagram showing the relationship between kanji fonts in character generator 10b and scan addresses, FIG. FIG. 5 is a diagram showing an address signal generation process by the selector 51, and FIG.
FIG. 6b shows a code map of codes, FIG. 6b shows a block diagram showing an overall configuration of the embodiment, and FIG. 8 shows attribute data in the embodiment. Figure, ninth
FIG. 10 is a block diagram showing a configuration of a character display control unit in the embodiment. FIG. 10 is a diagram showing character display and VR in the embodiment.
It is a figure showing the relation with the character code in AM3. 2 ... Display controller, 3 ... VRAM (memory), 10b ₁
…… Kanji ROM (first character generator), 10b ₂
…… ANK ROM (second character generator), 20…
... Code fetch section, 23 ... Full / half detection section (selection section),
24: CG address generator (address generator), 26: parallel-serial converter (dot data generator), 50:
Decoder (access creation unit), 51... Selector (access creation unit).

   ────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Shozo Ohmae               5-11-5 Minami-Aoyama, Minato-ku, Tokyo Stock               In company ASCII                (56) References JP-A-57-157346 (JP, A)                 JP-A-59-184392 (JP, A)                 JP-A-60-43688 (JP, A)                 JP-A-58-139243 (JP, A)                 JP-A-59-30587 (JP, A)                 JP-A-58-113076 (JP, A)                 JP-A-59-184392 (JP, A)                 JP-A-61-140985 (JP, A)                 JP-A-61-217090 (JP, A)

Claims (1)

(57) [Claims] A character generator that outputs font data of a character corresponding to the shift JIS code when a shift JIS code is input, and is a series of storage areas to which a 2-byte address including a first byte and a second byte is assigned. The font data of the kanji corresponding to each shift JIS code including (E0) _H to (E9) _H as the first byte of the font data is stored in the second byte.
The upper two bits of the byte are stored in each storage area to which an address of “00” is assigned.
Font data kanji corresponding to each shift JIS code including A) _H, first byte (80) is stored in each storage area assigned in which the address _H, the other font data for each character, the Shift JI corresponding to font data
A character generator stored in a storage area having an S code as an address, and means for outputting a read address to the character generator based on the Shift JIS code, wherein: a. The first byte is (E0) _H to ( E7) Each shift JIS that is _H
For codes, the shift
Upper 2 bits of the second byte of the JIS code, shift JIS
A read address consisting of the lower 3 bits of the first byte of the code, (00) _B , and the lower 6 bits of the second byte of the Shift JIS code is output. B. The first byte is (E8) _H or ( E9) Each shift that is _H
For JIS code, (00)
_B , the least significant bit of the first byte of the Shift JIS code, the upper 2 bits of the second byte of the Shift JIS code, (00) _B , the lower 6 bits of the second byte of the Shift JIS code C. For each shift JIS code in which the first byte is (EA) _H , (00000) _B , the upper two bits of the second byte of the shift JIS code, A read address consisting of the lower 6 bits of the second byte of the second byte of the shift JIS code is output. D. For the shift JIS code other than the above a, b, and c, an address conversion that outputs the shift JIS code as a read address. Means and a dot data creation unit for creating serial dot data for display based on font data output from the character generator. Character display apparatus according to claim. 2. A character generator that outputs font data of a character corresponding to the shift JIS code when a shift JIS code is input, and is a series of storage areas to which a 2-byte address including a first byte and a second byte is assigned. The font data of the kanji corresponding to each shift JIS code including (E0) _H to (E9) _H as the first byte of the font data is stored in the second byte.
The upper two bits of the byte are stored in each storage area to which an address of “00” is assigned.
Font data kanji corresponding to each shift JIS code including A) _H, first byte (80) is stored in each storage area assigned in which the address _H, the other font data for each character, the Shift JI corresponding to font data
A first character generator stored in a storage area having an S code as an address, a second character generator storing font data of a character designated by a 1-byte character code, and a character code output from the memory A selection means for selecting the second character generator when is a one-byte character code; and a means for outputting a read address to the storage means of the first character generator based on the Shift JIS code, a. Each shift JIS whose first byte is (E0) _H to (E7) _H
For codes, the shift
Upper 2 bits of the second byte of the JIS code, shift JIS
A read address consisting of the lower 3 bits of the first byte of the code, (00) _B , and the lower 6 bits of the second byte of the Shift JIS code is output. B. The first byte is (E8) _H or ( E9) Each shift that is _H
For JIS code, (00)
_B , the least significant bit of the first byte of the Shift JIS code, the upper 2 bits of the second byte of the Shift JIS code, (00) _B , the lower 6 bits of the second byte of the Shift JIS code C. For each shift JIS code in which the first byte is (EA) _H , (00000) _B , the upper two bits of the second byte of the shift JIS code, A read address consisting of the lower 6 bits of the second byte of the second byte of the shift JIS code is output. D. For the shift JIS code other than the above a, b, and c, an address conversion that outputs the shift JIS code as a read address. Means and a dot data creating section for creating serial dot data for display based on font data output from the first and second character generators Character display apparatus characterized by comprising a.