JP2770586B2 - Method for manufacturing heterojunction bipolar transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing method for reducing the base resistance of a heterojunction bipolar transistor with good reproducibility and realizing high uniformity of a maximum oscillation frequency _{fmax on} a wafer.

[0002]

2. Description of the Related Art Heterojunction bipolar transistors (H)
In BT), the base layer and the collector layer, which are active layers, are being made thinner in order to improve the current gain cutoff frequency (f _T ), which is one index of high-speed characteristics. In recent years, ultra-thin base layers of 500 Å or less have become commonplace due to thin-film crystal growth techniques using molecular beam epitaxy (MBE) or metal-organic chemical vapor deposition (MOCVD). The accompanying increase in base resistance has become a problem. As is well known, the relationship between the maximum oscillation frequency (f _max ) and the current gain cutoff frequency (f _T ) which is another index of the high-speed characteristics is

(Equation 1)

[0003]

[0004] Where R _B is the base resistance,
C _BC represents the base-collector junction capacitance. From the above equation, it can be seen that an increase in base resistance directly degrades f _max . So, as explained below,
Base resistance while improving f _T by thinning the layer, among the
Ohmic electrode is also the dominant factor that causes base resistance
A method for reducing the contact resistance of the semiconductor device has been studied. In addition,
An electrode (usually a metal) is formed on a semiconductor
When a voltage is applied between the semiconductor and the electrode
In addition, the flowing current has a linear relationship with the applied voltage (that is,
That is, the resistance is always constant regardless of the magnitude of the voltage or current
) Means an electrode in such a state. Semiconductor is enough
Semiconductor properties when heavily doped
The quality is closer to that of metal, and the contact with the electrodes is also ohmic contact.
Tend to be more economical. Conversely, if the impurity concentration of the semiconductor is
If sufficient, the interface between the semiconductor and the electrode can be electrically rectified.
The electrode under such conditions is shot
It is called a key electrode or the like. In the following, there is nothing special
Unless the term “electrode” in the present invention refers to this ohmic electrode,
Shall refer to the pole.

Referring to FIGS. 4 and 5, a conventional example in which both the f _T and f _max are improved by regrowing an external base layer in the external region of the HBT will be described.

As shown in FIG. 4A, semi-insulating GaAs
n ⁺ -GaAs on the s substrate wafer 1 by MBE
(Silicon impurity doping concentration: 5 × 10 ¹⁸ cm ⁻³ )
5000 angstrom sub-collector layer 2 of n ⁻ -GaAs (silicon impurity doping concentration: 5 × 10 ¹⁶ cm ⁻³ ); 5000 angstrom collector layer 3 of p ⁻ -GaAs (beryllium impurity doping concentration: 2) × 10 ¹⁹ cm ^-3 ) 500 Å thick base layer 4, N-Al _0.3
Ga _0.7 As (silicon impurity doping concentration: 5 × 1
An emitter layer 5 of 0 ¹⁷ cm ^-3 ) and a thickness of 2500 Å, and an emitter cap layer 6 of n ⁺ -GaAs (silicon impurity doping concentration: 5 × 10 ¹⁸ cm ^-3 ) and a thickness of 1500 Å are sequentially grown. Next, 2000 Å of a heat-resistant electrode material WSi was sputter-deposited on the wafer,
After the formation of the angstrom silicon oxide film 8,
The emitter electrode 71 is processed by reactive ion etching (RIE) using F ₆ gas.

As shown in FIG. 4B, the emitter cap layer 6 and the emitter layer 5 are etched by reactive ion beam etching (RIBE) using Cl ₂ gas, and are etched before the base layer 4 is exposed. To stop.
Here, the emitter layer 5 left up to the base layer 4 is approximately 50
The thickness is set to 0 angstrom so that damage to the crystal due to dry etching does not reach the base layer 4. Next, a side wall 8s having a thickness of 2500 angstroms made of a silicon oxide film is provided on the side surface of the projection of the emitter.
As shown in (c), the remaining emitter layer 5 and base layer 4 are completely removed by wet etching using a mixture of phosphoric acid, hydrogen peroxide and water using the insulating film 8 and the side walls 8s as a mask. .

Next, as shown in FIG. 5D, trimethylgallium (C) is deposited by metal organic chemical vapor deposition (MOCVD).
H ₃ Ga) and a gas consisting of arsine (As ₃ H)
Grow aAs. At this time, the growth substrate temperature is set to, for example, 60
If the temperature is selected to be 0 ° C., regrowth proceeds only on the GaAs surface, and GaAs does not grow on the silicon oxide film. Further, since the regrowth GaAs CH ₃ Ga carbon atoms (C) is efficiently taken up arsenic (As) site in a state bound to the gallium atoms (Ga), very high concentration (about 10 ²¹ c
The m ^-type p-type external base layer 41 is formed. Here, the thickness of the external base layer 41 is sufficiently large as 2000 Å to reduce series resistance in the base layer.

Next, as shown in FIG. 5E, a base electrode 72 made of titanium, platinum and gold is deposited by a lift-off method using a photoresist 9.

Finally, as shown in FIG. 5 (f), the subcollector layer 2 is exposed, and a collector electrode 73 made of a gold-germanium alloy is deposited by a lift-off method as in FIG. 5 (e) to complete the HBT. ing.

In the conventional HBT, since the base layer 4 in the intrinsic region is sufficiently thin, a large f _T is obtained.
On the other hand, the external base layer 41 is thick, the series resistance in the base layer is reduced, and the non-alloy base electrode has a very low electrode contact resistivity of the order of 10 ⁻⁸ cm ² Ω because of high concentration doping. _Are obtained, which contributes to improvement of f _max .

[0012]

According to the above-mentioned method of manufacturing an HBT, a crystal regrowth step is performed to reduce the base resistance.
At least three processes, a photoresist process for forming an electrode and a deposition process for an electrode metal, are required. Since f _max as shown in the equations 1 is inversely proportional to the square root of the base resistance R _B, the relationship between the variation of the change and f _max of R _B is given by the following equation.

[0013]

(Equation 2)

[0014]

Here, ΔR _B and Δf _max represent minute fluctuation _ranges of R _B and f _max , respectively. When the external base regrowth method is used, the statistical average value of the contact resistance of the electrode is greatly reduced, but as described below, the conventional method increases the variation in the manufacturing process. This will be described with reference to an energy band diagram near the semiconductor / metal interface shown in FIG.
Generally, the carrier 10 flowing perpendicularly to the semiconductor-metal interface has a path flowing over the Schottky barrier 11 (position 12a in the figure) and a path crossing the Schottky barrier by the tunnel mechanism (position 12b in the figure). )). In addition, 13 shows a Fermi level.
In the case of a semiconductor doped at a very high concentration, the tunnel mechanism becomes dominant, and an oxide film at the interface or surface contamination greatly affects the tunnel mechanism of carriers. In the formation of a base electrode by ordinary vacuum deposition as in the conventional method, the GaAs surface is exposed to the atmosphere before the deposition, so that it is difficult to control the surface state before the electrode is formed. Further, the influence of the remaining photoresist at the photoresist opening cannot be ignored. These obviously cause variations in the base resistance within a wafer and between wafers. In these, the impurity concentration of the external base layer was not so high (10 ¹⁹ c
m- ³ ) Sometimes, the absolute value of the base resistance was relatively large and did not cause much problem.

An object of the present invention is to provide a method for manufacturing a heterojunction bipolar transistor which has solved the above-mentioned disadvantages.

[0017]

According to the present invention, there is provided a semiconductor device comprising:
Heterojunction bipolar transistor with a structure in which main layers are laminated
After several steps to complete the transistor,
Electrodes made of a semiconductor in the region where the
A tact layer is grown, and then the electrode
Omitting continuously while maintaining the surface state of the contact layer
Growing a single-crystal metal to serve as a contact electrode
You. In this case, the ohmic electrode is particularly a base electrode.
It is intended for poles. Also, the same atmosphere is an extremely high atmosphere.
The atmosphere is kept clean by vacuum,
The contact layer and the single crystal metal are cleaned by ultra-high vacuum.
It is formed continuously in a clean atmosphere. And the present invention
In the case of the single crystal metal that becomes the ohmic electrode, for example,
Aluminum can be used for the base electrode.

[0018]

Since the base electrode is epitaxially grown on the external base layer, a very stable semiconductor-metal interface can be obtained, and good and reproducible electrode contact resistance can be obtained.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. 1 (a) to 1 (c) correspond to FIGS. 4 (a) to 4 (c) of a conventional example.
This is exactly the same as the step (c).

In the step of FIG. 1 (c), after removing the base layer 4 grown by MBE, a gas source MBE device (referred to as GSMBE, MOMBE, etc.) provided with a gas source in a normal MBE device using a solid source.
The wafer was carried in.

As shown in FIG. 2D, first, trimethylgallium (CH ₃ Ga) and arsine (As ₃ H)
Carbon (C) -doped GaAs was grown to a thickness of 2000 angstroms using a gas source consisting of: to form a p-type external base layer 41 , that is, an electrode contact layer . Subsequently, an aluminum molecular beam was irradiated from an aluminum cell to epitaxially grow the aluminum thin film 72a to a thickness of 2000 Å. Aluminum and GaAs have different lattice constants, but after growing aluminum on GaAs, a few atomic layers later, aluminum becomes a single crystal, and it is confirmed that it is thermally stable and can be obtained at the ideal semiconductor-metal interface. Was done. Although GaAs does not adhere to the silicon oxide film, aluminum does not adhere to the silicon oxide film 8.
2 (e), a photoresist 9 was applied to the wafer, and the aluminum 72a deposited on the silicon oxide film 8 was removed by phosphoric acid using oxygen plasma.

[0022] Next, as shown in FIG. 2 (f), aluminum
Of the emitter thin film 72a, the emitter mesa (from the emitter layer 5)
Aluminum thin film from which the area surrounding the convex part has been removed
A base electrode 72a made of 72a is formed. Then
At the portion where the thin film 72a is removed,
The source layer 41 and the collector layer 3 to remove
Exposing the collector layer 2 and providing a collector electrode 73 there.
With this, the structure of the HBT was completed.

FIG. 3 is almost the same as the embodiment of FIGS. 1 and 2 except that base layer 4 grown by MBE is used.
Of the external base layer 4 without completely removing
1 was regrown , ie, the electrode contact layer was regrown.
Illustrating an embodiment. As a result, the contact area between the regrown base layer 41 and the base layer 4 increases, and the contact resistance between both base layers further decreases.

In each of the above embodiments, only the case where the emitter layer is located on the base layer has been described. However, the present invention can be applied to a collector top type HBT in which the collector layer is located on the base layer. Further, the present invention can be applied to not only the NPN type but also a PNP type transistor. In the embodiment, the external base layer and the base electrode metal are grown in a crystal growth chamber equipped with both a gas source and a solid source vapor deposition source. They may be grown in separate crystal growth chambers that can transport wafers to each other. Also, after the growth of the external base layer, once the wafer is exposed to the atmosphere and then the base electrode is epitaxially grown again, there is no problem if the wafer surface treatment such as thermal cleaning is sufficiently performed before the growth. Although the embodiment has been described using carbon as the p-type impurity for the external base layer, it is needless to say that besides this, beryllium, zinc, magnesium and other impurities may be used.

[0025]

As described above, according to the manufacturing method of the present invention, the current gain cutoff frequency f _T and the maximum oscillation frequency f _max
However, the HBT can be manufactured with excellent characteristics in terms of uniformity within a wafer and good reproducibility between wafers. Since the base electrode is formed simultaneously in the step of regrowth of the external base, there is an effect of shortening the manufacturing process period and reducing the number of steps.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram showing an HBT manufacturing process according to a first embodiment.

FIG. 2 is an explanatory view showing a manufacturing process of the HBT according to the first embodiment.

FIG. 3 is an explanatory view showing a process of manufacturing an HBT according to a second embodiment.

FIG. 4 is an explanatory view showing a conventional HBT manufacturing process without using the present invention.

FIG. 5 is an explanatory view showing a conventional HBT manufacturing process without using the present invention.

FIG. 6 is an explanatory diagram showing an energy band structure near a valence band at a semiconductor / metal interface.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Subcollector layer 3 Collector layer 4 Base layer 5 Emitter layer 6 Emitter cap layer 8 Insulating film 8s Side wall 9 Photoresist 10 Carrier 11 Schottky barrier 12a, 12b Carrier flow path 13 Fermi level 41 External base layer 71, 72,73 electrode 72a base electrode (single crystal aluminum)

Claims (4)

(57) [Claims] After passing through several steps for completing a heterojunction bipolar transistor having a structure in which main layers are stacked on a semiconductor substrate, an electrode contact layer made of a semiconductor is grown in a region where an ohmic electrode is formed. Then, a single crystal metal to be an ohmic electrode is continuously grown in the same atmosphere while maintaining the surface state of the electrode contact layer, the method comprising manufacturing a heterojunction bipolar transistor. 2. The method according to claim 1, wherein the ohmic electrode is a base electrode. 3. The same atmosphere is an atmosphere maintained by ultra-high vacuum cleanliness, and it is preferable that the electrode contact layer and the single crystal metal are continuously formed in the clean atmosphere by ultra-high vacuum. 3. A method according to claim 1, wherein
3. The method for manufacturing a heterojunction bipolar transistor according to item 1. 4. The method for manufacturing a heterojunction bipolar transistor according to claim 1, wherein the single crystal metal serving as the ohmic electrode is aluminum.