JP2764488B2 - Method of patterning protective film - Google Patents

Method of patterning protective film

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Publication number
JP2764488B2
JP2764488B2 JP27642491A JP27642491A JP2764488B2 JP 2764488 B2 JP2764488 B2 JP 2764488B2 JP 27642491 A JP27642491 A JP 27642491A JP 27642491 A JP27642491 A JP 27642491A JP 2764488 B2 JP2764488 B2 JP 2764488B2
Authority
JP
Japan
Prior art keywords
protective film
substrate
gan
patterning
gaas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP27642491A
Other languages
Japanese (ja)
Other versions
JPH0590256A (en
Inventor
清輝 吉田
正洋 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Optoelectronics Technology Research Laboratory
Original Assignee
Optoelectronics Technology Research Laboratory
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Optoelectronics Technology Research Laboratory filed Critical Optoelectronics Technology Research Laboratory
Priority to JP27642491A priority Critical patent/JP2764488B2/en
Publication of JPH0590256A publication Critical patent/JPH0590256A/en
Application granted granted Critical
Publication of JP2764488B2 publication Critical patent/JP2764488B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Drying Of Semiconductors (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、化合物半導体から成る
基板のパターニング方法に関し、特に保護膜のパターニ
ング方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of patterning a substrate made of a compound semiconductor, and more particularly to a method of patterning a protective film.

【0002】[0002]

【従来の技術】化合物半導体(例えば、GaAs)から
成る基板上に微細なパターンを形成する手段としては、
まず、基板表面上に金属等から成る微細なパターンを有
するマスク層を形成し、反応性イオン等を基板全面に照
射してエッチングを行い、続いて、集束イオンビーム
(FIB)をパターンジェネレータを用いて走査させる
ものがある。FIBを走査させる場合、塩素ガス雰囲気
中あるいは塩素ガスを照射してエッチングを促進するこ
とがある。また、FIBにかえて電子ビームを照射する
こともある。この場合においても、塩素ガス雰囲気中あ
るいは塩素ガスを照射して行われる。また、基板表面上
の酸化膜を保護膜として用い、トリメチルAl(TM
A)を選択成長させる方法も行われている。
2. Description of the Related Art As means for forming a fine pattern on a substrate made of a compound semiconductor (for example, GaAs),
First, a mask layer having a fine pattern made of a metal or the like is formed on the surface of a substrate, and etching is performed by irradiating the entire surface of the substrate with reactive ions or the like. Subsequently, a focused ion beam (FIB) is applied using a pattern generator. Some are scanned by When scanning the FIB, etching may be promoted in a chlorine gas atmosphere or by irradiation with a chlorine gas. An electron beam may be irradiated instead of the FIB. Also in this case, the irradiation is performed in a chlorine gas atmosphere or by irradiation with chlorine gas. Also, using an oxide film on the substrate surface as a protective film, trimethyl Al (TM
A method of selectively growing A) is also performed.

【0003】[0003]

【発明が解決しようとする課題】しかし、従来のパター
ンニングにおいては、FIBや電子ビーム等が照射され
ると、これがマスクに強くたたきつけられマスク表面の
みならず基板の内部にまで損傷が発生することがある。
この場合、パタ−ニング後、化合物半導体を良好にエピ
タキシャル成長できないという問題点がある。さらに、
酸化膜を保護膜として用いる方法においては、TMAが
保護膜上で分解して酸素と結合し保護膜上で成長が進行
してしまい選択成長が行えないという問題点がある。本
発明の課題は、基板内部に損傷が生じない保護膜のパタ
ーンニング方法を提供することである。
However, in the conventional patterning, when an FIB, an electron beam, or the like is irradiated, the FIB or the electron beam is strongly hit against the mask, and damage is caused not only on the mask surface but also inside the substrate. There is.
In this case, there is a problem that the compound semiconductor cannot be satisfactorily epitaxially grown after the patterning. further,
The method using an oxide film as a protective film has a problem that TMA decomposes on the protective film and combines with oxygen to grow on the protective film, so that selective growth cannot be performed. An object of the present invention is to provide a method of patterning a protective film that does not cause damage inside a substrate.

【0004】[0004]

【課題を解決するための手段】本発明によれば、化合物
半導体から成る基板上に形成されるGaNから成る保護
膜にGaおよびInのうち少なくとも一方を照射してパ
ターン部を形成する第1の工程と、前記保護膜を600
℃〜650℃の温度で加熱して前記パターン部が形成さ
れた前記保護膜を除去する第2の工程とを有することを
特徴とする保護膜のパターニング方法が得られる。
According to the present invention, there is provided a first method for forming a pattern portion by irradiating at least one of Ga and In to a protective film made of GaN formed on a substrate made of a compound semiconductor. Process and the protective film
A second step of removing the protective film on which the pattern portion is formed by heating at a temperature of about 650 ° C. to about 650 ° C. to obtain a protective film patterning method.

【0005】[0005]

【実施例】以下、図面を参照して、本発明の一実施例を
説明する。本実施例では図示しない超高真空装置(UH
V、図示せず)内で有機金属を用いたMBE法(MOM
BE法)を行う。第1の実施例を図1を参照して説明す
る。図1は、GaN保護膜にパターンニングする工程を
示す図である。 GaAs(100 )基板10上にジメチルヒドラジン2
1とメタルGa22とを同時に照射しながらGaN保護
膜20を形成する(基板温度を680℃として、GaN
保護膜20は2〜3monolayer 形成する)。 GaN保護膜20表面上に、パターン31を切った銅
の薄板30を被せる。 メタルのIn40(またはGa)を銅の薄板30表面
に向けて、ノズル100からブロードに照射し、In層
(パターン部)をパターン31に沿って2〜3monolaye
r 形成する。 銅の薄板30を除去する。 この状態のGaAs基板10を600℃〜650℃ま
で加熱してGaN保護膜20のIn40の形成された部
分のみを選択的に熱分解(除去)させる。 以上のようにして、GaAs基板10上のGaN保護膜
20にパターンニングがなされた。即ち、パターンに沿
ってGaAs基板10の表面が露出した状態である。
An embodiment of the present invention will be described below with reference to the drawings. In this embodiment, an ultra-high vacuum device (UH
V, not shown) using an organic metal in the MBE method (MOM
BE method). A first embodiment will be described with reference to FIG. FIG. 1 is a diagram showing a step of patterning a GaN protective film. Dimethylhydrazine 2 on a GaAs (100) substrate 10
1 and metal Ga 22 are simultaneously irradiated to form a GaN protective film 20 (substrate temperature is 680 ° C.,
The protective film 20 is formed as two to three monolayers). On the surface of the GaN protective film 20, a thin copper plate 30 having the pattern 31 cut is put. The metal In 40 (or Ga) is directed broadly from the nozzle 100 toward the surface of the copper thin plate 30, and the In layer (pattern portion) is formed along the pattern 31 by 2 to 3 monolayers.
r form. The copper sheet 30 is removed. The GaAs substrate 10 in this state is heated to 600 ° C. to 650 ° C. to selectively thermally decompose (remove) only the portion of the GaN protective film 20 where In 40 is formed. As described above, the GaN protective film 20 on the GaAs substrate 10 was patterned. That is, the surface of the GaAs substrate 10 is exposed along the pattern.

【0006】つづいて、この状態のGaAs基板10に
GaAs等を選択成長させる。 基板10の温度を400℃にして、トリエチルGa
(TEG)とAs4 とを照射する。 これにより、GaN保護膜20の形成されていない(G
aAs10の表面が露出した)部分だけGaAsが成長
した。 680℃以上で加熱して残っているGaN保護膜20
を除去させる。 以上のようにして、GaAs基板10にパターニングが
なされた。尚、工程においてGaN保護膜20の除去
されたGaAs基板10の表面上にGaAsをエピタキ
シャル成長させても良い。
Subsequently, GaAs or the like is selectively grown on the GaAs substrate 10 in this state. The temperature of the substrate 10 is set to 400 ° C., and triethyl Ga
Irradiate (TEG) and As 4 . Thereby, the GaN protective film 20 is not formed (G
GaAs grew only in the portion where the surface of aAs10 was exposed). GaN protective film 20 remaining after heating at 680 ° C. or more
Is removed. As described above, the GaAs substrate 10 was patterned. Note that GaAs may be epitaxially grown on the surface of the GaAs substrate 10 from which the GaN protective film 20 has been removed in the process.

【0007】次に、GaN保護膜のパターニング方法の
第2の実施例を図2を参照して説明する。図2におい
て、超高真空中でGaN保護膜20の形成されたGaA
s基板10に、ノズル200から比較的細く絞ったIn
40(Gaでもよい)を照射してパターン部41を形成
する。このとき、精密にパターンを形成するためには、
ノズル200の先端は、GaAs基板10の表面に至近
であることが好ましい。パターン形成後、前述した工程
を行う。以後、第1の実施例と同様に化合物半導体の
成長を行う。
Next, a second embodiment of a method of patterning a GaN protective film will be described with reference to FIG. In FIG. 2, GaAs having a GaN protective film 20 formed in an ultra-high vacuum
s Substrate 10 is relatively narrowly squeezed from nozzle 200 into In
The pattern portion 41 is formed by irradiating 40 (may be Ga). At this time, in order to form a pattern precisely,
The tip of the nozzle 200 is preferably close to the surface of the GaAs substrate 10. After forming the pattern, the above-described steps are performed. Thereafter, the compound semiconductor is grown in the same manner as in the first embodiment.

【0008】尚、 III−V 族化合物半導体をエピタキシ
ャル成長させる場合、GaN保護膜の除去が不完全であ
っても、GaNも III−V 族であるため、電気的に不活
性で不都合がない。また、GaN保護膜の形成および除
去は、真空一貫プロセスで行える。さらに、TEGがG
aN保護膜上で分解することなく選択成長が行える。
When a III-V group compound semiconductor is epitaxially grown, even if the removal of the GaN protective film is incomplete, since GaN is also a III-V group, it is electrically inactive and has no inconvenience. Further, the formation and removal of the GaN protective film can be performed by an integrated vacuum process. In addition, TEG is G
Selective growth can be performed without decomposition on the aN protective film.

【0009】[0009]

【発明の効果】本発明によれば、GaN保護膜にGaお
よびInのうち少なくとも一方から成るパターン部を形
成し、GaN保護膜を所定温度にて加熱してパターン部
の形成されたGaN保護膜を除去してパターンニングす
るため、化合物半導体基板が損傷しない。
According to the present invention, a pattern portion comprising at least one of Ga and In is formed on a GaN protective film, and the GaN protective film is heated at a predetermined temperature to form a GaN protective film having the pattern portion formed thereon. Is removed and patterning is performed, so that the compound semiconductor substrate is not damaged.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施例によるパターンニング方
法を示す図である。
FIG. 1 is a diagram illustrating a patterning method according to a first embodiment of the present invention.

【図2】本発明の第2の実施例によるパターンニング方
法を示す図である。
FIG. 2 is a diagram illustrating a patterning method according to a second embodiment of the present invention.

【符号の説明】[Explanation of symbols]

10 GaAs基板 20 GaN保護膜 30 銅の薄板 40 In 100、200 ノズル Reference Signs List 10 GaAs substrate 20 GaN protective film 30 Copper thin plate 40 In 100, 200 Nozzle

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 21/205 H01L 21/203 H01L 21/318 H01L 21/302 H01L 21/363 H01L 21/365 H01L 21/471──────────────────────────────────────────────────の Continued on the front page (58) Surveyed fields (Int.Cl. 6 , DB name) H01L 21/205 H01L 21/203 H01L 21/318 H01L 21/302 H01L 21/363 H01L 21/365 H01L 21 / 471

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】化合物半導体から成る基板上に形成される
GaNから成る保護膜にGaおよびInのうち少なくと
も一方を照射してパターン部を形成する第1の工程と、
前記保護膜を600℃〜650℃の温度で加熱して前記
パターン部が形成された前記保護膜を除去する第2の工
程とを有することを特徴とする保護膜のパターニング方
法。
A first step of irradiating at least one of Ga and In to a protective film made of GaN formed on a substrate made of a compound semiconductor to form a pattern portion;
A second step of heating the protective film at a temperature of 600 ° C. to 650 ° C. to remove the protective film on which the pattern portion has been formed.
JP27642491A 1991-09-30 1991-09-30 Method of patterning protective film Expired - Lifetime JP2764488B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27642491A JP2764488B2 (en) 1991-09-30 1991-09-30 Method of patterning protective film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27642491A JP2764488B2 (en) 1991-09-30 1991-09-30 Method of patterning protective film

Publications (2)

Publication Number Publication Date
JPH0590256A JPH0590256A (en) 1993-04-09
JP2764488B2 true JP2764488B2 (en) 1998-06-11

Family

ID=17569222

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27642491A Expired - Lifetime JP2764488B2 (en) 1991-09-30 1991-09-30 Method of patterning protective film

Country Status (1)

Country Link
JP (1) JP2764488B2 (en)

Also Published As

Publication number Publication date
JPH0590256A (en) 1993-04-09

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Effective date: 19980212