JP2647056B2 - Semiconductor pattern formation method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a semiconductor pattern, and more particularly to a method for forming a pattern using a modified portion of a semiconductor by simultaneous irradiation of electrons, ions, light and gas as an etching mask.

[0002]

2. Description of the Related Art In recent years, ultra-fine processing technology on the order of submicrons to nanometers has become necessary with the increasing integration and function of devices. Especially for the creation of highly functional devices using quantum wave effects such as quantum wires and quantum boxes,
A so-called ultrahigh-vacuum continuous process is required in which all the preparation procedures including the growth of the substrate and the processing are performed in the ultrahigh vacuum.

[0003] As a pattern forming method applicable to this ultra-high vacuum continuous process, Japanese Patent Application Laid-Open Publication No.
The method described in 6327 is known. The method will be briefly described. First, a GaAs epitaxial layer is formed on a GaAs (001) substrate surface by a molecular beam epitaxy method or the like. Next, the surface of the GaAs epitaxial layer is exposed to an oxygen gas atmosphere, and a focused electron beam is partially irradiated on the surface. At this time, a surface oxide film is selectively formed on the portion irradiated with the electron beam. Next, after evacuating oxygen gas, this surface is exposed to chlorine gas. As a result, the portion not irradiated with the electron beam is etched by chlorine gas, but the oxide film formed on the electron beam irradiated portion functions as an etching mask for chlorine gas,
This part is not etched, so that it is possible to form a desired pattern drawn by an electron beam.

[0004]

However, in the above-mentioned conventional method, although a vacuum continuous process is possible, the oxygen adhering to the inside of the vacuum apparatus or to the stage holding the substrate during the exposure of oxygen for forming the etching mask is reduced after the processing. Since it adheres to the semiconductor surface, there has been a problem that the semiconductor surface is oxidized and deteriorated even though the process is performed without exposing the substrate to the air. Furthermore, after the conventional method described above,
When embedding and regrowing a processing pattern in a vacuum continuous process,
Oxygen scattered in the vacuum device in the process of removing the surface oxide film mask by heating is re-attached to the processed semiconductor surface, which also oxidizes the semiconductor surface despite processing the substrate without exposing it to the atmosphere. Therefore, there is a problem that the quality of the interface with the buried growth layer is deteriorated. Further, since the semiconductor surface after the removal of the surface oxide film has poor crystallinity, there is a problem that the quality of the buried growth layer in the vicinity thereof is deteriorated.

An object of the present invention is to provide a pattern forming method suitable for a vacuum continuous process that does not use oxygen or the like that causes deterioration of the quality of a semiconductor surface.

[0006]

According to the present invention, there is provided a method for forming a pattern of a semiconductor, comprising the steps of: etching a semiconductor substrate with a gas for etching the semiconductor substrate; and simultaneously irradiating the gas with electrons, ions or light and the gas. A first step of growing a first semiconductor layer serving as an etching mask for a gas, and etching on the first semiconductor layer by simultaneous irradiation of the gas and the electrons or the ions or the light; A second step of forming a second semiconductor layer having a step; and forming the second semiconductor layer on the second semiconductor layer.
The gas and the electrons or the ions or the light, the first semiconductor layer is partially exposed and the exposed portion is exposed to simultaneous irradiation of the gas and the electrons or the ions or the light; and A third step of simultaneously irradiating the second semiconductor layer until a state where the second semiconductor layer remains in a portion other than the exposed portion; and a fourth step of irradiating the gas after the third step.
And a step of:

[0007]

In the present invention, the semiconductor layer exposed in the third step and exposed to the simultaneous irradiation of the etching gas and the electrons, the ions, or the light is not etched by the etching gas. Therefore, after that, when the etching gas is irradiated in the fourth step,
The exposed portion serves as an etching mask for this gas. On the other hand, in the third step, the solid layer remaining portion other than the exposed portion and the semiconductor layer and the semiconductor substrate thereunder are:
Irradiation with the gas in the fourth step results in etching.
Thus, patterning of the semiconductor substrate can be performed.

The first semiconductor layer used in the present invention is characterized in that it is etched by a gas for etching a semiconductor substrate and is not etched by the gas after simultaneous irradiation of electrons, electrons or ions or light with the gas. For example, GaAs / AlGa is used as a semiconductor substrate of a material to be processed.
When As is used, InGa is used as such a semiconductor layer.
There is As. In this case, G is used as a solid layer above the semiconductor layer.
aAs and Cl ₂ can be used as an etching gas. Next, the reason why InGaAs can be used as a semiconductor layer will be described.

In the etching of InGaAs using Cl ₂ gas, as the In composition in InGaAs increases, the etching rate decreases. This is because the etching rate of a mixed crystal material having a plurality of elements is determined by the etching rate of a reaction product having the lowest vapor pressure in the material. Cl ₂
And InGaAs, the vapor pressure is In chloride <Ga
Since there is a relationship of chloride <As chloride, the etching rate is determined by the In content (= composition). Therefore InG
By changing the In composition of the aAs layer in-plane, the InGaAs
By exposing the s layer to Cl ₂ , a pattern of InGaAs can be formed. If this can be achieved, InGaAs can be used as an etching mask of a material that is more easily etched than InGaAs by Cl ₂ gas. Well, InGaAs
As a method for changing the In composition of the layer in-plane, electrons and Cl are used.
Simultaneous irradiation with _two gases is used. It is known that when irradiating electrons when etching a semiconductor material with Cl ₂ gas, the etching rate of an electron-irradiated portion increases, but this etching speed-up effect differs depending on the material.
In the case of InGaAs, the effect of increasing the etching rate by electron irradiation is that In <Ga, so that Ga in the electron irradiation part is C
1 ₂ selectively etches, resulting in an increase in the relative In composition of this portion. Therefore, the Cl ₂ etching rate of the irradiated portion is reduced, so that the InG
An aAs pattern is formed. Since the vapor pressure of As chloride is very high, it is immediately etched regardless of electron irradiation. The acceleration of the GaAs Cl ₂ etching by electron irradiation described above also occurs depending on light and ions.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG.

First, as shown in FIG. 1A, a lower AlGa layer having a thickness of 2000 ° and an Al composition ratio of 0.3 is formed on a GaAs (001) substrate 101 by molecular beam epitaxy.
As barrier layer 102, GaAs quantum well layer 103 having a thickness of 100 °, upper Al having a thickness of 200 ° and an Al composition ratio of 0.3.
A GaAs barrier layer 104 is grown at a substrate temperature of 650.degree. Next, the substrate temperature was lowered to 520 ° C.
An InGaAs mask layer 105 having an n composition ratio of 0.2 is grown, and a GaAs layer 106 having a thickness of 3000 ° is grown thereon. Next, the sample was taken out of the molecular beam epitaxy apparatus, and was exposed to an electron beam resist 10 by electron beam exposure.
7, a resist opening pattern 108 having a diameter of 1 μm is formed. Next, as shown in FIG. 1B, the GaAs layer 1 under the resist opening pattern 108 is formed by dry etching.
06 is etched away by a depth of 2600 ° to a thickness of 400 °. Next, after removing the resist 107, the sample is carried into an ultra-high vacuum apparatus equipped with an electron beam source and a chlorine gas introduction system, where the sample temperature is set to 1 as shown in FIG.
At 00 ° C., an electron beam 109 having a kinetic energy of 100 eV and a chlorine gas 110 of 5 × 10 ⁻⁵ Torr were applied to the entire surface of the sample.
Irradiate for 2 minutes. By this process, GaAs becomes 2400Å
Due to the etching, 600 ° remains in the portion 111 of the GaAs layer 106 other than the resist opening pattern portion. On the other hand, the resist opening pattern portion having a thickness of 400
The part of Å is etched in the first two minutes, and the I
Although the nGaAs mask layer 112 is exposed to electrons and chlorine gas for 10 minutes, the InGaAs mask layer 112 is not removed by etching, thereby improving the chlorine gas etching resistance. Next, as shown in FIG.
℃ the sample surface 5 × 10 remains ^-4 Torr of chlorine gas 11
Expose to 3 only for 2 minutes. In this process, the remaining GaAs 111 having a thickness of 600 °, the InGaAs mask layer thereunder and the AlGaAs layer thereunder are etched by a thickness of 150 °. On the other hand, the InGaAs mask layer 112 exposed to electrons and chlorine gas in FIG. 1C is not etched. Next, as shown in FIG.
At 0 ° C., the surface of the sample is chlorine gas 114 of 5 × 10 ⁻⁵ Torr.
For 7 minutes. By this process, the InGaAs mask layer 112 is not etched, but other GaAs.A
Since the lGaAs layer is etched at a depth of 350 °, G
The pattern of the aAs quantum well layer 103 is formed.

Thereafter, the substrate 101 is heated at 400 ° C. for 20 minutes to remove the chloride adhered to the substrate surface. And
The substrate 101 is transported again into the molecular beam epitaxy apparatus through the ultra-high vacuum. Then, the substrate 1 is irradiated with As.
01 is heated at 680 ° C. for 5 minutes to remove the InGaAs layer 112 exposed to electrons and chlorine gas. At this time, InG
Since aAs and GaAs were lattice-matched from the beginning, Gn after removing the InGaAs layer remaining as a mask by heating was removed.
The crystallinity of the aAs surface is good, and as a result, a GaAs pattern with good surface crystallinity and cleanliness can be formed without exposing the substrate to the atmosphere.

Further, according to the present invention, it is possible to form a desired portion at which the chlorine gas etching resistance is improved at a time.

In this embodiment, the case of using electrons and chlorine gas has been described. However, light or ions (in the case of using ions, the kinetic energy is preferably 100 eV or less) may be used instead of electrons. Instead of chlorine gas, a gas containing at least halogen may be used. The semiconductor layer used as an etching mask may be another semiconductor. In this embodiment, the GaAs epitaxial layer is used as the solid layer above the semiconductor layer.
aAs, amorphous GaAs, and other semiconductors and metals may be used.

[0015]

According to the present invention, since the semiconductor layer is used as a mask, there is no deterioration in quality due to contamination of the substrate surface, which is a problem when a conventional oxide film is used as a mask. Also, if a semiconductor layer lattice-matched to the substrate is used as a mask, the substrate semiconductor surface obtained after removing the mask after pattern formation becomes a clean crystal surface. The clinical quality is very good.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining steps of an etching process according to an embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 101 GaAs substrate 102 Lower AlGaAs barrier layer 103 GaAs quantum well layer 104 Upper AlGaAs barrier layer 105 InGaAs mask layer 106 GaAs layer 107 Electron beam resist 108 Resist opening pattern part 109 Electron beam 110 Chlorine gas 111 GaAs layer 112 Exposure to electrons and chlorine gas InGaAs mask layer 113 chlorine gas 114 chlorine gas

Claims (1)

(57) [Claims] A first semiconductor layer is formed on a semiconductor substrate, the first semiconductor layer being etched by a gas for etching the semiconductor substrate and serving as an etching mask for the gas after simultaneous irradiation of the gas with electrons, ions, or light. A second step of forming a second semiconductor layer on the first semiconductor layer, which is etched on the first semiconductor layer by simultaneous irradiation of the gas and the electrons, the ions, or the light and has a step on the surface;
On the second semiconductor layer, the gas and the electrons or the ions or the light, the first semiconductor layer is partially exposed and the exposed portion is the gas and the electrons or A third step of simultaneously exposing to a state where the second semiconductor layer remains except for the exposed portion while being exposed to the simultaneous irradiation with the ions or the light, and irradiating the gas after the third step A semiconductor pattern forming method.