JP2763233B2 - Semiconductor device and mounting method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a multilayer structure having a lower wiring board and an upper wiring board, and a method of mounting the same.

[0002]

2. Description of the Related Art In recent years, a semiconductor device having a two-layer structure including a lower wiring substrate 110 and an upper wiring substrate 120 in one case 100, as schematically shown in FIG. This device requires a relay terminal 132 for electrically connecting the upper wiring board 120 and the lower wiring board 110.

The relay terminal 132 penetrates the rod 131 vertically and is fixed to the rod 131, and the lower end thereof is soldered to the lower wiring board 110. Also, the rod 1
The upper part of 31 is electrically connected to upper wiring substrate 120 by being inserted into through hole 122 provided in upper wiring substrate 120 and soldered.

In FIG. 7, reference numerals 111 and 121 denote semiconductor chips.

The relay terminal 132 is connected to the case 100
To arrange in place of the inner frame 130 was fixed to the inside of the protruding portion 112 of the case 100 by a screw 1 4 1.

[0006]

[SUMMARY OF THE INVENTION However, in the semiconductor device having such a structure, the relay terminal 13 when the strain on the case 100 is applied the distortion through the frame 1 3 0
Transmitted to 2, the relay terminal 13 2 is displaced from a predetermined position, the junction between the relay terminal 13 2 and the lower wiring board 110 and the upper wiring board 120 was sometimes called impaired.

Moreover, sometimes the upper direction or lower direction of the stress when the relay terminal 13 2 is expanded is heated during the semiconductor operation is applied to the frame 130, as a result, unnecessary stress is applied to the relay terminal 13 2 itself There was something.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and a semiconductor device in which no stress is applied to a relay terminal when the entire semiconductor device is strained, and a mounting for obtaining such a device. The aim is to provide a method.

[0009]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device having a multilayer structure in which a lower wiring board and an upper wiring board are accommodated in a case. This is achieved by a semiconductor device in which a projection is formed on the other side, and the frame is positioned by loosely fitting the projection into the hole.

Further, the present invention provides a
(a) a step of preparing a case with a bottom, (b) a step of fixing the lower wiring board on which the first semiconductor chip is mounted to the bottom of the case, (b) a rod extending substantially horizontally, A frame having a relay terminal standing upright through the rod portion is disposed above the upper wiring board, and a lower end portion of the relay terminal is electrically connected to the lower wiring board. (C) placing the upper wiring board on which the second semiconductor chip is mounted on the frame inside the case; and (d) placing the upper end portion of the relay terminal on the upper wiring board. (B-1) loosely fitting a protrusion provided on the other side in a vertical hole provided on the inside of the case or on one of the frames. Providing a method comprising positioning the frame by fitting. That.

[0011]

According to the present invention, since the frame is loosely fitted into the case, the mounting operation is easy. In addition, even if distortion occurs in the semiconductor device, the relay terminal does not shift. Further, even if the frame is moved up and down due to expansion of the relay terminal, unnecessary stress is not applied to the frame and the relay terminal due to the loose fit of the frame.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS.

FIG. 5 is a plan view and a cross-sectional view of the assembly in a state where the assembly of each member is completed and a post-processing such as resin sealing is awaited in the semiconductor device according to the embodiment of the present invention. ing. This semiconductor device is configured as an intelligent power module in which a power semiconductor element and a control element are mounted in a two-stage configuration.

<Structure of Each Member> This assembly MD includes a case 1 having a bottom, and the bottom is a metal radiator plate 2. The side wall 3 is made of resin.

On the bottom 2 of the case 1, a lower wiring board 1
0 is fixed. An upper wiring board 20 is disposed above the lower wiring board 10. Electronic elements such as a control semiconductor chip 21 are mounted on the main surface of the upper wiring board 20, and an electric circuit is formed via a wiring layer 22 (only a part of which is shown). At the end of the upper wiring board 20, an array of a plurality of small through holes 23 for inserting a relay terminal to be described later is formed. Further, a through hole 24 used for positioning the upper wiring board 20 itself in the case 1 is formed.

A plan view of the lower wiring board 10 is shown as a part of FIG. 4 described later. That is, an electronic element such as a power semiconductor chip 11 is mounted on a main surface of the lower wiring board 10, and an electric circuit is formed via a wiring layer 12 (only a part of which is shown) and leads 13. Is formed.

The frame 30 shown in FIG. 5 is used to electrically connect the wiring boards 10 and 20 to each other and to arrange the upper wiring board 20 above the lower wiring board 10.

A plan view of the frame 30 and its frame A-
A sectional view is shown in FIG. 1, and a front view and a BB sectional view thereof are shown in FIG. The frame 30 is made of a resin rod 3.
1 and a plurality of relay terminals 32 penetrating the rod 31 and fixed to the rod 31. The relay terminal 32 has an S bend 35 at a lower portion thereof for relaxing thermal stress.

A plurality of ring members 34 are provided integrally with the rod portion 31. A vertical through hole 33 is formed in each ring body 34. As shown in the cross-sectional view of FIG . 1, the upper portion of each through-hole 34 has a shape of a truncated cone having a tapered surface, and the lower portion is a straight circular hole.

FIG. 3 is a plan view of the case 1 and FIG.
It is sectional drawing and BB sectional drawing. Side wall 3 of this case 1
The arm 5 has a plurality of arms 5 extending substantially horizontally. A cylindrical projection 4 extending upward is provided on these arms 5. The diameter of the projection 4 is not smaller by about 0.2mm than the lower diameter D (FIG. 1) of the through-hole 33 of the frame 30.

Another arm 6 is provided from the side wall 3 of the case 1.
Are extended, and small projections 7 are formed thereon.

<Mounting Method and Structure in Mounted State> Next, the process of assembling such members and mounting the semiconductor device, and the structure obtained thereby will be described.

First, on the bottom 2 of the case 1 shown in FIG.
0 is fixed.

Next, the case 1 is inserted into the through hole 33 of the frame 30.
Of the pair of frames 3 while allowing the projections 4 of the pair to be inserted.
0 is disposed substantially parallel to the end of the case 1. This and
The diameter of the projection 4 is larger than the diameter D of the lower part of the through hole 33.small
And the difference functions as a clearance.
Is loosely fitted in the through hole 33. Below the relay terminal 32
The part is soldered to lower wiring board 10. like this
FIG. 4 shows the state obtained as described above.

Next, the upper wiring board 20 on which the semiconductor device chips 21 and the like have been mounted is arranged above the lower wiring board 10 and housed in the case 1 (FIG. 5). At this time, the upper part of the relay terminal 32 is inserted into the small through hole 23 of the upper wiring board 20. The small projection 7 (FIG. 3) is inserted into the through hole 24.

As can be seen by comparing FIGS. 4 and 5,
Both sides (left and right sides in the plan views in these figures) of the upper wiring board 20 are on the rod portions 31 of the frame 30.
Therefore, when the upper portion of the relay terminal 32 is inserted through the small through hole 23, the lower surfaces of both sides of the upper wiring board 20 abut on the rod portion 31 of the frame 30 and are supported by the rod portion 31. The upper wiring board 20 is also supported by the small projections 7 being inserted into the through holes 24.

Thereafter, the upper end of the relay terminal 32 is soldered to the upper wiring board 20 to obtain the assembly MD shown in FIG.

Thereafter , through steps such as resin sealing, FIG.
The semiconductor device (intelligent power module) SD having the lid 9 as shown in FIG.

<Effects of Embodiment> In the above mounting structure and mounting method, the frame 3
0 is disposed in the case 1, the protrusion 4 and the through hole 3
3 is used. Therefore, troublesome work such as screw tightening is not required.

Since the frame 30 is not fixed to the case 1 and is in a loosely fitted state, the semiconductor device SD
In the case where the relay terminal 32 thermally expands, the frame 30 slides upward even when the frame 30 is lifted upward, thereby absorbing the elongation. As a result, no excessive force is applied around the frame 30.

Further, mechanical stress and thermal stress are not
2, the deformation corresponding to the stress is alleviated by the above-described degree of freedom of vertical movement and the clearance, and the deformation of the relay terminal 32 and the separation from the wiring boards 10 and 20 are effectively prevented.

<Modifications> (1) The clearance between the through hole 33 and the projection 4 is preferably 0.1 to 0.3 mm, most preferably 0.2 mm in the above embodiment.

(2) A projection may be provided on the frame 30, and the projection may be loosely fitted into a hole provided inside the case 1.
The hole for loose fitting is preferably a through hole, but may be a hole with a bottom that is relatively deep with respect to the length of the projection. Further, a hole in which a part of the side wall is missing may be used.

(3) The present invention can be extended to a case where three or more wiring boards are mounted. Further, the present invention is particularly effective for a power module in which heat is frequently generated during operation, but can be applied to other multi-stage semiconductor devices.

[0035]

As described above, according to the present invention, since the relay terminals do not shift due to the distortion of the case, excellent positional accuracy of the relay terminals can be obtained. In addition, since the relay terminal is positioned by loose fitting between the inside of the case and the frame, precise operation is not required and workability is excellent.
Also, unnecessary stress is not applied to the relay terminal even when the relay terminal is subjected to thermal expansion or stress.

[Brief description of the drawings]

FIG. 1 is a diagram showing a plane and a cross section of a frame used in an embodiment.

FIG. 2 is a diagram showing a front and a cross section of the frame of FIG. 1;

FIG. 3 is a diagram showing a plane and a cross section of a case used in the example.

FIG. 4 is a view showing a mounting process of the embodiment.

FIG. 5 is a diagram showing a mounting process of the embodiment.

FIG. 6 is a diagram showing a completed state of the semiconductor device of the example.

FIG. 7 is a diagram showing a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Case 2 Bottom part of case 4 Projection 10 Lower wiring board 20 Upper wiring board 11, 21 Semiconductor chip 30 Frame 31 Rod part 32 Relay terminal 33 Hole

Claims (2)

(57) [Claims] 1. A semiconductor device, comprising: (a) a bottomed case; (b) a lower wiring board mounted with a first semiconductor chip and fixed to a bottom of the case; (C) an upper wiring board disposed inside the case and disposed above the upper wiring board, and (c) a rod portion disposed inside the case and extending substantially horizontally; A relay terminal standing upright through the rod portion, and a lower end portion and an upper end portion of the relay terminal are electrically connected to the lower wiring board and the upper wiring board, respectively. A vertical hole is formed on one of the inside of the case and the frame, and a projection is formed on the other, and the frame is positioned by loosely fitting the projection into the hole. A semiconductor device characterized in that: 2. A method for mounting a semiconductor device, comprising: (a) preparing a case having a bottom; and (b) fixing a lower wiring board on which a first semiconductor chip is mounted to a bottom of the case. (B) disposing a frame having a rod portion extending substantially horizontally, and a relay terminal erected vertically through the rod portion, above the upper wiring board; and a lower end of the relay terminal. Electrically connecting a side portion to the lower wiring board; and (c) mounting an upper wiring board on which a second semiconductor chip is mounted on the frame inside the case; d) electrically connecting an upper end side portion of the relay terminal to the upper wiring board, wherein the step (b) is provided in (b-1) one of the inside of the case and the frame. The protrusion provided on the other side is loosely fitted into the vertical hole Mounting method of a semiconductor device according to claim further comprising a step, for positioning the frame.