JP2760902B2 - Electronics - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic apparatus having a display unit, for example.

[0002]

2. Description of the Related Art Conventionally, for example, in an electronic device using a liquid crystal or a plasma display as a display unit, when there is no input of an operation instruction or the like for a certain period of time, a function of turning off only the display or turning off the power of the entire electronic device is performed. In some cases, power consumption is reduced by using an auto power-off function as described below.

[0003]

In such a method, when the user wants to think while looking at the screen without inputting an operation instruction or the like for a certain period of time, or when he wants to occasionally see the information displayed on the screen, Hard to use. Further, in the case of the type in which the power of the apparatus is automatically turned off, there is an inconvenience that the operation must be repeated from turning on the power until a necessary screen is displayed in order to operate again after the power is turned off. When the screen is turned off, the screen returns immediately by keyboard input, etc.While the screen is turned off, it is not possible for a person other than the user to see the usage status of the device, power on / off, etc. just by looking at the screen. There were problems such as not knowing.

[0004] The present invention has been made in view of the above-described conventional example, and it is possible to always display information required by a user without turning off the power of the apparatus or erasing the display screen. The purpose is to save power consumption.

[0005]

To achieve the above object, an electronic apparatus according to the present invention has the following arrangement. That is, an electronic apparatus having a display unit for displaying image information stored in a storage unit, a partial activation unit for activating a part of a display screen of the display unit, and an entire display screen of the display unit. Activating means, a switching means for switching between the partial activating means and the whole activating means, and a partial activating means or the whole activating means switched by the switching means. Display control means for displaying the image information stored by the storage means on the display screen.

[0006]

With the above arrangement, the electronic apparatus of the present invention switches between activation of the entire display screen and activation of a part of the display screen, and displays image information on the entire or a part of the activated display screen. .

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS As an embodiment of the present invention, a personal information device for handling personal information shown in FIGS. In this personal information device, there are two kinds of display modes, a normal mode and a reduced mode, on the screen display.
(1/2 vertically and 1/2 horizontally) and displayed.
In this embodiment, the display is a matrix liquid crystal of 320 × 128 dots.

FIGS. 1A and 1B are electric block diagrams of the display control unit. The display control unit converts the display data to video RA.
M and read the data together with the control signal to the display driver. In addition, control is performed for a reduction mode in which the display range in the normal mode for performing a normal display is reduced and the control signal and the data transfer frequency are reduced. Fig. 1-1
In the above, 1 is a frequency divider / frequency selector constituted by a counter and a selector. This clock is inputted as it is (e.g. 667KH _z) or, the clock is 4
Min 1 half-divided clock (e.g. 167KH _z)
Which is used as the clock for the liquid crystal display is selected by a frequency select signal set in the register 2. The clock is selected according to the display mode. In the normal mode, which is a normal display, the input clock is used as it is, but in the reduced mode in which the area is reduced to a quarter of the area of the normal mode, the input clock divided by 4 is used. The clock is output to a column counter 3, a total counter 6, and a liquid crystal clock (CP), which will be described later.

Reference numeral 3 denotes a column counter, which is a load signal (LOA).
This counter counts in synchronization with the clock in order to determine the timing for outputting D). Reference numeral 4 denotes a register for providing a timing setting value to the column counter 3 for setting the load signal output timing, and reference numeral 5 denotes a load timing control unit for generating and outputting a load signal. Each time data corresponding to one column of the display matrix is transferred to the liquid crystal driver, the load signal is input to the liquid crystal driver to latch the input data. The liquid crystal driver receives four bits (four dots) of data at the same time for each clock.
Therefore, in the normal mode, the load signal is output at the end of every 320-bit data transfer for one column, that is, 1 every 80 clocks.
In the repetition mode, the setting is made such that the data is output at the end of every 160-bit data transfer for one column, that is, once every 40 clocks.

In order to set the load signal output timing, a set value of the load signal output timing is written into the register 4 by a CPU 19 described later. After the end of counting, the column counter 3 takes in the set value and starts counting from 0 again. If the value of column counter 3 is
When the set value is reached, the column counter 3 outputs a count end signal, and the count ends. The load signal is generated by inputting the count end signal to the load timing controller 5 and adjusting the signal width of the end signal.

Reference numeral 6 denotes a total counter, which counts in synchronization with a clock in order to take timing of outputting a frame signal (FRAME). Reference numeral 8 denotes a frame signal control unit which generates and outputs a frame signal. In FIG. 1-2, reference numeral 7 denotes a register for setting a timing for outputting the frame signal, and a register for giving a timing setting value to the total counter 6. Reference numeral 9 denotes a liquid crystal data control unit for performing liquid crystal control based on image data and control data; Is a VRAM for storing image data, and 19 is a CPU, which controls the personal information equipment of the embodiment.

The frame signal is a signal input to the liquid crystal driver every time image data for one screen is transferred to the liquid crystal driver. In this embodiment, the display screen is 320 × 128 dots in the normal mode and 1 in the reduced mode.
The frame signal is generated by using 60 × 64 dots as one frame. In order to set the timing for outputting the frame signal, the CPU 19 writes the set value of the timing in the register 7. After the count is completed, the total counter 6 takes in the set value and starts counting from 0 again. When the value of the total counter 6 reaches the set value that has been taken in, the total counter 6 outputs a count end signal and ends the count. The count end signal is input to the frame signal control unit 8 and output as a frame signal.

The frame signal output timing is set according to the display mode. 320 in normal mode
X 128 dots, so every 10240 clocks,
In the reduction mode, the screen is 160.times.64 dots, so that a frame signal is output every 2560 clocks. In addition, the frame signal control unit 8 also generates a signal (DF) for inverting the bias polarity of the liquid crystal for each frame.

On the other hand, the value of the total counter 6 also serves as an address (address B) for accessing the VRAM 10 for storing image data. The image data stored in the VRAM 10 is read and written through the liquid crystal data control unit 9. When the CPU 19 reads / writes the contents of the VRAM 10, the liquid crystal data control unit 9
When the address A, which is the addressing by the total counter 6, is selected and the image data is read to be sent to the liquid crystal driver, the address B, which is the addressing by the total counter 6, is selected, and the VRAM 10 is accessed. in this way,
The addresses A and B are controlled so that their timings do not overlap.

The image data read from the VRAM 10 has eight bits per word, but is output to the liquid crystal driver as 4-bit data. Therefore, the liquid crystal data control unit 9 divides the image data read from the VRAM 10 into upper 4 bits and lower 4 bits, and sends them to the liquid crystal driver 4 bits at a time in synchronization with the clock (CP). For this reason, the least significant bit (L
SB) is used as a select signal indicating which of the upper 4 bits or the lower 4 bits of one word is sent to the liquid crystal driver, and the value obtained by logically shifting the value of the address B one bit to the right is the address of the VRAM 10 (address B '). ).

A DISPOFF1 signal set in the register 2 together with the frequency select signal, and a DISPOFF2 signal
The signal is a control signal for turning off the display of the liquid crystal driver (output constant voltage) (both signals are represented by negative logic in FIG. 1). DISPO in normal mode
Both the FF1 signal and DISPOFF2 signal are set to "H", and only the DISPOFF1 signal is set to "L" in the reduction mode. The DISPOFF1 signal is connected only to a driver that is not used in the reduction mode, as shown in FIG.

FIG. 2 is a timing waveform of the operation described above.
1 and FIG. FIG. 2-1 shows a normal mode, and FIG.
Is a timing waveform in the reduction mode. In FIG. 2A, at timing T0, transfer of image data for one frame is completed, and a frame signal is output. The display of the new screen will start from now.

The timing T1 is a timing at which the first image data of a new frame is transferred to the liquid crystal driver. The address B 'indicates the head address of the image data in the VRAM 10. If eight bits of the head data of the image data are obtained, four bits thereof are passed to the liquid crystal driver. At timing T2, the value of address B 'remains unchanged from the value at timing T1, thus accessing the same memory location. The remaining 4 bits are passed to the liquid crystal driver except for the portion already passed at the timing T1 out of the 8 bits of 1 word of the data obtained here.

At timing T3, the address B 'is incremented and the next memory location is read out.
Of these, 4 bits are passed to the liquid crystal driver. This is the same operation as the timing T1 except for the value of the address B '. The above operation is performed by the data 320 for one column of the display screen.
This is repeated until a bit (40 words) is passed to the liquid crystal driver.

At timing T4, the last four bits of one column of data are passed to the driver. The data transfer to the liquid crystal driver starts the data transfer for one column (at timing T
It is the 80th time from 1), and the address B ′ is 27HEX indicating the 40th word. Timing T5 is a timing at which the load signal is output. Here, the transfer of the image data for one column to the liquid crystal driver is completed.

Thus, the transfer of the image data of 320 bits for one column is completed. This is repeated over 128 columns for one frame. Timing T6 is a timing at which the transfer of the image data for one frame is completed and the frame signal is output. At this point, the display of the normal mode 1 screen is completed. FIG. 2-2 is a timing chart of image data transfer to the liquid crystal driver in the reduction mode. Fig. 2-1
Is the same procedure except for the number of bits constituting one column of the screen and the number of columns constituting one frame.

The timing T7 is a timing at which the transfer of image data for one frame is completed and a frame signal is output. Here, the display of one screen is completed, and the display of a new screen is started from now. Timing T8 is a timing at which the first four bits of image data of a new frame are passed to the liquid crystal driver. Address B 'is VRAM
This is the start address of the image data in 10.

Thereafter, as described with reference to FIG. 2A, the image data is sequentially transferred to the liquid crystal driver in units of 4 bits, and is repeated until the transfer of 160 bits, which is one column of the screen in the reduced mode, is completed. . Timing T9 is 1 on the screen
This is the timing at which the last four bits of the data for the column are passed to the driver. The data transfer to the liquid crystal driver is forty times from the start of the data transfer for one column, and the address B ′ is 13HEX indicating the 20th word.

As in the description of FIG. 2A, the transfer of image data to the liquid crystal driver is repeated while incrementing the value of the address B until the transfer of data for one column is completed. At timing T10, data transfer for one column of the screen is completed, and a load signal is output. Thus, the transfer of the image data of 160 bits for one column is completed. This is repeated over 64 columns for one frame.

The timing T11 is a timing at which the image data transfer for one frame is completed and a frame signal is output. At this point, the display of the first screen of the reduction mode ends. The display in the normal mode and the reduced mode is performed by repeating the above procedure. FIG. 3 shows a liquid crystal driver circuit. 11 and 12 are common drivers (for example, MSM5298 manufactured by Oki Electric), 13, 14, 15, and 16 are segment drivers (for example, MSM5297 manufactured by Oki Electric).
It is. In the normal mode, all the drivers are used, and in the reduced mode, only the drivers 11, 13, and 14 are used.

Therefore, the DISPOFF2 signal is 11, 1
The 3, 14, and DISPOFF1 signals are connected to the respective drivers 12, 15, and 16. When the DISPOFF1 signal becomes "L", the display disappears except for the upper left quarter of the screen. A liquid crystal panel 17 has a matrix structure of 320 × 128 dots. The electronic device of the present embodiment includes:
It handles personal information and has mainly world clock, notebook screen, address, and scheduler functions. FIGS. 4-1, 4-2, 4-3, 4-4, and 4-5 show display examples of the functions except for the note screen.

FIG. 4-1 is a world clock, FIG. 4-2 is an address (cover), FIG. 4-3 is an address (telephone list), and FIG.
4 is an example of the display of the normal mode of the scheduler (calendar), and FIG. 4-5 is an example of the display of the normal mode of the scheduler (scheduled for one day), where (a) corresponds to the normal mode and (b) corresponds to (a). It is an example of the display of the reduced mode. In the world clock, address, and scheduler functions, information is written on a fixed screen, and the portion cut out for the reduction mode can be determined in advance as follows.

The world clock indicates the Japan Standard Time, and the current date and time of the location can be seen by pointing a city on the displayed world map. Therefore, as shown in FIG. 4-1 (b), the most important information, Japanese Standard Time, is displayed in the upper left quarter of the screen. The address manages the address of an individual or a company.
The input can be performed in a free field such as (e), (ca-ko), etc., or in non-syllabary. FIG. 4-2 (a) as the display corresponds to the address index.
By pointing (A to E) or the like, the address of row A can be viewed. Therefore, as the most distinctive parts, the title of the address function and the index of the Japanese syllabary are displayed on a quarter of the screen as shown in FIG. 4-2 (b).

FIG. 4-3 (a) is a telephone list on line A. The first name and telephone number of line A are shown in FIG. 4-3 (b).
Is displayed on a quarter of the screen. The scheduler manages the schedule of an individual.
Fig. 4-4 shows the calendar screen in the normal mode.
As shown in (b), today's date is displayed on a quarter of the screen.

In the scheduler of FIG. 4-5 (a) (scheduled for one day), the scheduled start time, end time and requirements are input. Of these, the start time of two of the date and the schedule and the requirements (up to six characters) are displayed on a quarter of the screen as shown in FIG. 4-5 (b). As mentioned above, the world clock,
In the reduced mode, both functions of the address and the scheduler are displayed in a predetermined format in the upper left quarter of the screen.

FIGS. 5-1 and 5-2 show examples of a normal mode and a reduced mode display on a note screen on which characters, calculations and drawing can be freely performed on the screen. The note screen is a function that allows the user to freely write characters, mathematical expressions, and drawings on a blank notebook. Therefore, the characteristic portion of the display differs for each page of the notebook depending on the written contents. Therefore, FIG. 5A and FIG.
As shown in (a), the number of image dots constituting the displayed image is counted for each dot row, and the largest row is found in each of the vertical (Y-axis) and horizontal (X-axis) directions. With the center of the found vertical and horizontal dot rows as the center, a quarter of the display in the normal mode is cut out, assuming that it is the most characteristic screen, and moved to the upper left of the screen.
1 (b) and display in the reduced mode as shown in FIG. 5-2 (b).

With respect to the normally displayed image shown in FIG. 5A, X, which is the column with the largest number of image dots in the vertical axis direction,
_max and Y which is the column with the largest number of image dots in the horizontal axis direction
_max intersection of (X _max, Y _max) around a vertical one-half, that only a 1 in the lateral half of a quarter screen size is moved to the upper left in FIG. 5-2 (b ). In the figure, the frame line 34, the page number 35, the small letter switch 36, and the dog turning page 37 for turning a page are not images drawn by the operator, and therefore are not targets for counting image dots.

As shown in the example of FIG. 5-2 (a), the center (X _max, Y _max ) of the quarter screen is at the end, and
When trying to cut out the screen, a quarter frame may go out of the screen in the normal mode. In this case, the center where the quarter frame is cut out so as to fit in the screen is shown in FIG.
Move to (X _cen , Y _max ) in (a) and set a quarter frame again. FIG. 5-2 (b) shows the reduced mode screen thus obtained.

FIG. 6 is a flowchart showing the procedure for switching the note screen from the normal mode to the reduction mode by the CPU 19 as described above. The mode shifts from the normal mode to the reduction mode in two cases: when there is no input for a certain period of time or when an instruction is given by the operator. When the mode is switched to the reduction mode, it is first determined whether the currently used function is the world clock, the address, the scheduler, or the note screen. If the function is not the note screen, the function is converted to the standard screen described in FIG. Is done. In the case of the note screen, processing is performed according to the flowchart of FIG.

In step S1, the number of image dots in the vertical (Y) axis direction is counted for all columns, and X
Find coordinates. In step S2, similarly, the number of image dots in the horizontal (X) axis direction is counted for all rows, and the Y coordinate of the maximum row is obtained. From the coordinates, the intersection coordinates are obtained in step S3. In step S4, when a quarter of the normal screen is framed around this point, it is determined whether or not the screen fits on the screen. If not, the center coordinates are moved in step S5 such that a quarter frame is within the screen.

In step S6, of the image data stored in the VRAM 10, the image data in the quarter screen frame determined in steps S3 and S5 is temporarily evacuated to a buffer. After the saving, the VRAM 10 is cleared in step S7, and the image data saved in the buffer in step S8 is written into the VRAM 10 again so as to be displayed in the upper left quarter of the display screen.

In step S9, an appropriate value is set in the register 2 shown in FIG. 1 to control the display in the reduction mode. Although not shown, if there is any input again, or if there is an instruction from the operator, 4
The mode is returned from the 1-screen reduction mode to the full-screen normal mode.

In the embodiment, the center of the reduced screen is set to the intersection of the row and the column with the highest image dot density. However, it is not a single row and column but a sum of 5 rows or 10 rows. The screen may be determined to be the most characteristic screen (having a large amount of data) by comparing the maximum value with expanding the area. Finally,
FIG. 7 is an external view of a personal information device having a display unit according to the present embodiment.
FIG. 8 shows an overall electric block diagram.

As shown in FIG. 7, the personal information device of this embodiment does not have an input unit such as a numeric keypad and a keyboard. The input pen 30 is used to input a character command or the like by hand on the input / output surface 31 in which the transparent digitizer and the liquid crystal panel are combined, and display the pen locus, the character recognition result, the application result, and the like. In FIG. 8, VRA
M10 and the liquid crystal panel 17 are the same as those in FIG. 18
Is a unit composed of a liquid crystal data control unit (including the peripheral circuit shown in FIG. 1) and a liquid crystal driver, 19 is a 16-bit CPU for controlling the electronic device, 20 is an application program, OS, dictionary data, etc. RO with
M and 21 are RAM used for a RAM disk and a work area for storing user data, 22 is an interface such as an IC card, 23 is a serial interface such as RS232C, 24 is a Centronics interface for printer output, and 25 is A resistive film type digitizer, in which two sheets of glass (or one sheet of PET and the other sheet of glass) on which a resistive film is deposited are opposed to each other, and the two resistive films come into contact by pressing a pen or the like. Depending on the voltage at the time,
The coordinates of the pressurized part are obtained. 26, a digitizer driver for obtaining XY coordinates from an output signal of the digitizer;
7 is an A / D converter for converting the digitizer voltage into a digital value;
Reference numeral 28 denotes a power supply unit including a DC-DC converter and the like.

Although a display using a simple matrix dot liquid crystal has been described as a display, an active matrix liquid crystal such as a TFT or a simple or active matrix E is used.
The same applies to the present embodiment in displays such as L and plasma. [Other Embodiments] In the above-described embodiment, when there is no input for a certain period of time, or when a reduction mode is entered according to a user's instruction, the screen at that time is edited by the electronic device according to a predetermined procedure. .

In the present embodiment, the user is allowed to select an image which he or she wants to keep most, especially on the note screen. That is, when the user wants to enter the reduction mode, the user opens the menu, points to and selects the "reduction screen mode" with the pen 30, and then selects "area designation" from the submenu. After that, if you point at any point on the note screen, 4 points will be centered on the pointed point.
A frame for one-half screen is displayed superimposed on the screen. At this time, if the pen is moved while holding down the pen, the frame moves accordingly. When the pen is raised, the coordinates become the center coordinates, and the mode shifts to the reduction mode. This is shown in FIG. FIG.
(A) shows a state in which the note screen in the normal mode is pointed by a pen and is framed in a quarter screen size. When the pen is spoken from the screen, the designated area is displayed in the reduced mode at the upper left of the screen as shown in FIG. 9B.

In a function for displaying a fixed form, for example, in an address (telephone list), the data at the top of the telephone list is displayed in the reduced mode, but the menu is opened and the "reduced screen mode" is selected. By selecting "data selection" from the submenu and pointing the last phone data to be retained, a quarter screen is constituted so that the designated data is left on the screen.

Similarly, with regard to the scheduler of the scheduler, two necessary data can be left on the reduced screen instead of the two schedules written first. In the world clock, not only Japan standard time but also a city can be selected and the standard time of the city can be left on the screen in the reduced mode.

[0044]

As described above, without turning off the power of the apparatus or erasing the entire display screen,
There is an effect that power consumption can be saved while always displaying useful information for the user.

[Brief description of the drawings]

FIG. 1-1 is a block diagram of a liquid crystal control unit for switching between a normal mode and a reduction mode.

FIG. 1-2 is a block diagram of a liquid crystal control unit for switching between a normal mode and a reduction mode.

FIG. 2-1 is a timing chart of a normal mode display.

FIG. 2-2 is a timing chart of a reduced mode display.

FIG. 3 is a block diagram of a liquid crystal display unit and a liquid crystal driver.

FIG. 4-1 is a diagram of a screen display example of a world clock.

FIG. 4-2 is a diagram of a screen display example of an address.

FIG. 4C is a diagram of a screen display example of an address.

FIG. 4-4 is a diagram of a screen display example of a calendar.

FIG. 4-5 is a diagram of a screen display example of a schedule.

FIG. 5-1 is a diagram of a screen display example.

FIG. 5-2 is a diagram of a screen display example.

FIG. 6 is a flowchart for configuring a screen in a reduction mode.

FIG. 7 is an external view of an electronic device.

FIG. 8 is an overall block diagram of the electronic device.

FIG. 9 is a diagram of a screen display example specified by a user.

[Explanation of symbols]

 Reference Signs List 1 frequency divider / frequency selector 2, 4, 7 register 3 column counter 5 load timing controller 6 total counter 8 frame signal controller 9 liquid crystal data controller 10 VRAM 11, 12 common driver 13, 14, 15, 16 segment driver 17 Liquid crystal element

Claims (3)

(57) [Claims] 1. An electronic apparatus having display means for displaying image information stored in a storage means, comprising: a partial activation means for activating a part of a display screen of the display means; A whole activating means for activating the entire screen, a switching means for switching between the partial activating means and the whole activating means, and the partial activating means or the whole activating means switched by the switching means An electronic apparatus, comprising: display control means for displaying image information stored by the storage means on an activated display screen. 2. The image data displayed on a part of the display screen activated by the partial activating means is one of the image data displayed on the entire display screen activated by the entire activating means. The electronic device according to claim 1, wherein the electronic device is a unit. 3. An input means for inputting various information, wherein said switching means switches from said overall activation means to said partial activation means when there is no input from said input means for a predetermined time. Claim 1 or Claim 2
An electronic device according to claim 1.