JP2760560B2 - Circuit board - Google Patents

Circuit board

Info

Publication number
JP2760560B2
JP2760560B2 JP1083547A JP8354789A JP2760560B2 JP 2760560 B2 JP2760560 B2 JP 2760560B2 JP 1083547 A JP1083547 A JP 1083547A JP 8354789 A JP8354789 A JP 8354789A JP 2760560 B2 JP2760560 B2 JP 2760560B2
Authority
JP
Japan
Prior art keywords
thin film
film resistor
circuit board
aln
underlayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1083547A
Other languages
Japanese (ja)
Other versions
JPH02262392A (en
Inventor
恭章 安本
暢男 岩瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1083547A priority Critical patent/JP2760560B2/en
Publication of JPH02262392A publication Critical patent/JPH02262392A/en
Application granted granted Critical
Publication of JP2760560B2 publication Critical patent/JP2760560B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、基材が窒化アルミニウムからなる回路基板
に関し、特に該基材上に設けられるニクロム系薄膜抵抗
体の下地層を改良した回路基板に係わる。
Description: Object of the Invention (Industrial Application Field) The present invention relates to a circuit board whose base material is made of aluminum nitride, and in particular, an underlayer of a nichrome thin film resistor provided on the base material The present invention relates to an improved circuit board.

(従来の技術) 従来、薄膜配線実装モジュールに使用される回路基板
の基材としては、アルミナが主に用いられている。しか
しながら、実装される能動素子の性能向上に伴って稼働
時の素子からの発熱量が増大する傾向にあり、アルミナ
の熱伝導率では能動素子の実装個数が制約されるという
問題があった。
(Prior Art) Conventionally, alumina is mainly used as a base material of a circuit board used for a thin film wiring mounting module. However, the amount of heat generated from the active element during operation tends to increase with the improvement in the performance of the mounted active element, and there has been a problem that the thermal conductivity of alumina limits the number of mounted active elements.

このようなことから、アルミナに代わり高熱伝導率を
もつBeOを基材とした回路基板が使用されてきたが、か
かるBeOは製造時、研磨時の毒性が強いため、基材とし
ての応用範囲が限定される。このため、代替材料として
AlNが広く用いられている。このAlNは、無害であり、製
造、部品化、廃棄の制約がないという利点を持ち、特に
熱伝導率が70〜280W/m・Kの広い範囲、つまり放熱性が
アルミナの3.5倍から場合によってはBeOより優れたレベ
ルまで調整可能であるため、アルミナ基材を用いた回路
基板に比べて高い実装密度を実現できるはがりか、能動
素子の高密度化に合せて所望の熱伝導性を付与できる等
の利点を有する。
For this reason, instead of alumina, circuit boards based on BeO, which has a high thermal conductivity, have been used.However, such BeO is highly toxic during manufacturing and polishing, so its application range as a base material has been limited. Limited. Therefore, as an alternative material
AlN is widely used. This AlN is harmless and has the advantage that there is no restriction on production, parts conversion, and disposal.Especially, the thermal conductivity is in a wide range of 70 to 280 W / mK, that is, the heat dissipation is 3.5 times higher than that of alumina. Can be adjusted to a level superior to BeO, so it is possible to achieve a higher mounting density compared to circuit boards using alumina base, or to add the desired thermal conductivity according to the higher density of active elements It has such advantages as possible.

上述したAlN基材を用いた回路基板では、AlN基材上に
薄膜抵抗体、薄膜導体を形成した構造のものが知られて
いる。前記薄膜抵抗体としては、NiCr、NiCrSi等が従来
よりアルミナ等のハイブリッド基材上に形成されいる。
しかしながら、AlN基材上にNiCr等の合金材料からなる
薄膜抵抗体を直接形成すると、アニーリング等の熱処理
時において組成のずれを生じ、薄膜抵抗体の抵抗値が設
計値から変化する問題があった。これは、抵抗材料とし
てNiCr合金を使用すると、該合金の構成成分のうちCrが
アニーリング等の熱処理時にAlN基材中に容易に拡散
し、薄膜抵抗体の組成ずれやAlN基材表面の抵抗率の低
下が生じるためである。更に、AlN基材上への薄膜回路
の形成が薄膜導体に限られ、高熱伝導率を生かしたAlN
基材をベースとした回路基板の実用化を阻害する一因に
なっていた。このため、AlN基材上に組成ずれを生じる
ことなく安定した抵抗値を有する薄膜抵抗体をもつ回路
基板が望まれていた。
As the circuit board using the AlN substrate described above, a circuit board having a structure in which a thin film resistor and a thin film conductor are formed on an AlN substrate is known. As the thin film resistor, NiCr, NiCrSi or the like is conventionally formed on a hybrid base material such as alumina.
However, when a thin film resistor made of an alloy material such as NiCr is directly formed on an AlN substrate, there is a problem that a composition shift occurs during a heat treatment such as annealing, and the resistance value of the thin film resistor changes from a design value. . This is because, when a NiCr alloy is used as the resistance material, Cr among the constituent components of the alloy easily diffuses into the AlN substrate during heat treatment such as annealing, and the composition deviation of the thin film resistor and the resistivity of the surface of the AlN substrate. This is due to the decrease in Furthermore, the formation of thin film circuits on AlN substrates is limited to thin film conductors, and AlN
This was one of the factors that hindered the practical use of circuit boards based on base materials. Therefore, a circuit board having a thin-film resistor having a stable resistance value without causing a composition deviation on an AlN base material has been desired.

(発明が解決しようとする課題) 本発明は、上記従来の課題を解決するためになされた
もので、AlN基材に組成ずれを生じることなく安定した
抵抗値を有する薄膜抵抗体が形成された回路基板を提供
しようとするものである。
(Problems to be Solved by the Invention) The present invention has been made to solve the above-mentioned conventional problems, and a thin film resistor having a stable resistance value without causing a composition deviation in an AlN base material was formed. It is intended to provide a circuit board.

[発明の構成] (課題を解決するための手段) 本発明は、窒化アルミニウム(AlM)基材上にニクロ
ム系合金からなる薄膜抵抗体を設けた回路基板におい
て、前記基材と前記薄膜抵抗体の間に該抵抗体を構成す
るニクロム系合金よりクロム含有量の多いニクロム系合
金からなる下地層又はTa、TaN、TaSiO2、TaAlN2、CrN、
TiNから選ばれる材料よりなる下地層を設けたことを特
徴とする回路基板である。
[Constitution of the Invention] (Means for Solving the Problems) The present invention relates to a circuit board provided with a thin film resistor made of a nichrome alloy on an aluminum nitride (AlM) base material, wherein the base material and the thin film resistor are provided. An underlayer made of a nichrome-based alloy having a higher chromium content than the nichrome-based alloy forming the resistor or Ta, TaN, TaSiO 2 , TaAlN 2 , CrN,
A circuit board provided with an underlayer made of a material selected from TiN.

上記薄膜抵抗体に用いるニクロム系合金としては、例
えばNiCr、NiCrSi、NiCrAl、NiCrAlSi等を挙げることが
できる。かかる薄膜抵抗体の厚さは、1〜200nmのの範
囲とすることが望ましい。この理由は、薄膜抵抗体の厚
さを1nm未満にすると所望の抵抗値を得ることが難しく
なり、一方その厚さが200nmを越えると膜厚が金属電子
の平均自由行程範囲を大きく越え、温度や使用時間に対
する抵抗値変化率が大きくなる恐れがあるからである。
Examples of the nichrome alloy used for the thin film resistor include NiCr, NiCrSi, NiCrAl, and NiCrAlSi. It is desirable that the thickness of the thin film resistor be in the range of 1 to 200 nm. The reason is that if the thickness of the thin film resistor is less than 1 nm, it is difficult to obtain a desired resistance value, while if the thickness exceeds 200 nm, the film thickness greatly exceeds the range of the mean free path of metal electrons, and the temperature increases. This is because there is a risk that the rate of change of the resistance value with respect to the operating time will increase.

上記下地層に用いるニクロム系合金としては、例えば
NiCr、NiCrSi、NiCrAl、NiCrAlSi等を挙げることができ
る。
As the nichrome alloy used for the underlayer, for example,
Examples include NiCr, NiCrSi, NiCrAl, and NiCrAlSi.

上記下地層の厚さについては、1〜20nmとすることが
望ましい。この理由は、下地層の厚さを1nm未満にする
と該下地層上に形成された薄膜抵抗体中のCrがAlN基材
側へ拡散するのを防止するバリア効果を十分に達成でき
ず、一方その厚さが20nmを越えると回路基板全体に占め
る下地層の厚さが大きくなり、薄膜化を阻害する恐れが
あるからである。
The thickness of the underlayer is desirably 1 to 20 nm. The reason for this is that if the thickness of the underlayer is less than 1 nm, the barrier effect of preventing Cr in the thin film resistor formed on the underlayer from diffusing to the AlN substrate side cannot be sufficiently achieved. If the thickness exceeds 20 nm, the thickness of the underlayer occupying the entire circuit board increases, which may hinder thinning.

本発明に係わる回路基板においては、前記下地層上に
薄膜抵抗体と共に薄膜導体が形成される。かかる薄膜導
体層としては、例えばNi/Au、Cu/Au、Ni/Pd、Ni/Pd/A
u、Pt/Au、Au、Pt、Pd、Al、Al−Si等を挙げることがで
きる。
In the circuit board according to the present invention, a thin film conductor is formed on the base layer together with a thin film resistor. Such a thin film conductor layer, for example, Ni / Au, Cu / Au, Ni / Pd, Ni / Pd / A
u, Pt / Au, Au, Pt, Pd, Al, Al-Si, etc. can be mentioned.

なお、本発明に係わる回路基板を多層構造とする場合
には、一層目の薄膜導体を含むAlN基材上にAlN薄膜を形
成し、このAlN薄膜上に前記下地層を介して二層目の薄
膜抵抗体及び薄膜導体層を形成することによって実現さ
れる。
When the circuit board according to the present invention has a multilayer structure, an AlN thin film is formed on an AlN base material including a first thin film conductor, and a second layer is formed on the AlN thin film via the underlayer. This is realized by forming a thin film resistor and a thin film conductor layer.

次に、本発明の回路基板の製造方法を簡単に説明す
る。
Next, a method for manufacturing a circuit board according to the present invention will be briefly described.

まず、所望の熱伝導率を有し、表面粗さが下地層や薄
膜抵抗体等を形成するのに適した値を持つAlN基材を用
意する。表面粗さの調節は、焼結AlN基材の研磨もしく
はサブミクロン粒子を原料として製造された焼結AlN基
材を用いることにより達成できる。
First, an AlN base material having a desired thermal conductivity and a surface roughness having a value suitable for forming an underlayer, a thin film resistor, and the like is prepared. Adjustment of the surface roughness can be achieved by polishing the sintered AlN substrate or using a sintered AlN substrate manufactured using submicron particles as a raw material.

次いで、前記基材上に形成すべき薄膜抵抗体を構成す
るニクロム系合金よりクロム含有量の多いニクロム系合
金又はタンタルもしくはタンタル系合金からなる下地層
を真空蒸着法、スパッタ蒸着法等の一般的な成膜技術に
より形成する。この時、必要に応じて基材温度、雰囲
気、真空度、成膜速度を調整する。また、前記下地層の
成膜に先だって基材表面を湿式洗浄法、逆スパッタ法な
どで充分な洗浄を行なうが、AlN基材は強酸、強アルカ
リに対して不安定であるため、洗浄液の選定に注意が必
要である。
Next, a base layer made of a nichrome-based alloy or tantalum or a tantalum-based alloy having a higher chromium content than the nichrome-based alloy constituting the thin-film resistor to be formed on the substrate is formed by a general method such as a vacuum evaporation method or a sputter evaporation method. It is formed by a suitable film forming technique. At this time, the temperature of the substrate, the atmosphere, the degree of vacuum, and the deposition rate are adjusted as necessary. Prior to the formation of the underlayer, the substrate surface is sufficiently cleaned by a wet cleaning method, a reverse sputtering method or the like, but since the AlN substrate is unstable to strong acids and strong alkalis, a cleaning liquid is selected. You need to be careful.

次いで、真空を破らずに前記下地層上にニクロム系合
金からなる薄膜抵抗体材料層及び薄膜導体材料層を順次
を真空蒸着法、スパッタ蒸着法等の一般的な成膜技術に
より形成する。つづいて、前記薄膜導体材料層をレジス
トを用いたフォトエッチング技術によりパターニングし
て薄膜導体を形成し、更にその下の薄膜抵抗体材料層を
フォトエッチング技術によりパターニングした後、アニ
ーリングを行って所望の抵抗値を有する薄膜抵抗体を形
成し、回路基板を製造する。
Next, a thin-film resistor material layer and a thin-film conductor material layer made of a nichrome alloy are sequentially formed on the base layer by a general film forming technique such as a vacuum evaporation method and a sputter evaporation method without breaking the vacuum. Subsequently, the thin-film conductor material layer is patterned by a photo-etching technique using a resist to form a thin-film conductor, and the thin-film resistor material layer thereunder is further patterned by a photo-etching technique. A thin film resistor having a resistance value is formed, and a circuit board is manufactured.

(作用) 本発明によれば、AlN基材と薄膜抵抗体の間に該抵抗
体を構成するニクロム系合金よりクロム含有量の多いニ
クロム系合金からなる下地層又はタンタルもしくはタン
タル系合金からなる下地層を設けることによって、アニ
ーリング等の熱処理において前記薄膜抵抗体中のCrがAl
N基材へ拡散するのを前記下地層のバリア作用により防
止できる。その結果、組成のずれによる抵抗値変化を抑
制し、安定した抵抗値を有する薄膜抵抗体が形成され、
かつCr拡散による表面抵抗の低下が防止されたAlN基材
を有する回路基板を得ることができる。
(Action) According to the present invention, an underlayer made of a nichrome-based alloy having a higher chromium content than the nichrome-based alloy constituting the resistor or an underlayer made of tantalum or a tantalum-based alloy is provided between the AlN substrate and the thin film resistor. By providing the underlayer, Cr in the thin film resistor becomes Al in heat treatment such as annealing.
Diffusion into the N substrate can be prevented by the barrier function of the underlayer. As a result, a resistance change due to a composition shift is suppressed, and a thin film resistor having a stable resistance is formed.
In addition, it is possible to obtain a circuit board having an AlN base material in which a decrease in surface resistance due to Cr diffusion is prevented.

(実施例) 以下、本発明の実施例を詳細に説明する。(Example) Hereinafter, an example of the present invention will be described in detail.

実施例1 まず、熱伝導率280W/m・KのAlN基材を平均線表面粗
さが150nmとなるようにラッピング、ポリッシングを行
なった後、該基材表面を湿式洗浄、逆スパッタを行なっ
た。つづいて、AlN基材表面に該基材を100℃に加熱しな
がらRFスパッタにより入力パワー800Wの条件で20%Ni−
80%Crからなる厚さ10nmの下地層を成膜した。ひきつづ
き、真空を破らずに同様なRFスパッタにより50%Ni−50
%Crからなる厚さ50nmの薄膜抵抗体材料層及びAuからな
る厚さ200nmの薄膜導体材料層を順次形成した。次い
で、前記薄膜導体材料層に写真蝕刻法によりレジストパ
ターンを形成した後、該パターンをマスクとして前記Au
からなる薄膜導体材料層をKI+I2+脱イオン水のエッチ
ャントにより選択的にエッチングして薄膜導体を形成し
た。更に、その下の薄膜抵抗体材料層を別の写真蝕刻法
により形成したレジストパターンをマスクとして王水+
脱イオン水のエッチャントで選択的にエッチングして薄
膜抵抗体を形成した。この後、350℃、2時間のアニー
リングを行って回路基板を製造した。なお、アニーリン
グ後の薄膜抵抗体のシート抵抗は50Ω/□であった。
Example 1 First, after lapping and polishing an AlN substrate having a thermal conductivity of 280 W / m · K so that the average line surface roughness became 150 nm, the substrate surface was subjected to wet cleaning and reverse sputtering. . Subsequently, while heating the AlN substrate surface to 100 ° C., RF sputtering was used to apply 20% Ni-
An underlayer of 80% Cr having a thickness of 10 nm was formed. Continued, 50% Ni-50 by similar RF sputtering without breaking vacuum
A 50 nm thick thin film resistor material layer made of% Cr and a 200 nm thick thin film conductor material layer made of Au were sequentially formed. Next, after forming a resist pattern on the thin film conductor material layer by photolithography, the Au
Was selectively etched with an etchant of KI + I 2 + deionized water to form a thin film conductor. Further, using a resist pattern in which a thin film resistor material layer thereunder is formed by another photolithography method as a mask, aqua regia +
The thin film resistor was formed by selective etching with an etchant of deionized water. Thereafter, annealing was performed at 350 ° C. for 2 hours to manufacture a circuit board. The sheet resistance of the thin film resistor after annealing was 50Ω / □.

実施例2 50%Ni−50%Crからなる厚さ50nmの薄膜抵抗体材料層
の代わりに51%Ni−49%Crからなる厚さ50nmの薄膜抵抗
材料層を用いた以外、実施例1と同様な方法により回路
基板を製造した。
Example 2 Example 2 was the same as Example 1 except that a 50 nm thick thin film resistor material layer made of 51% Ni-49% Cr was used instead of the 50 nm thin film resistor material layer made of 50% Ni-50% Cr. A circuit board was manufactured in the same manner.

実施例3〜8 厚さ10nmのTa、TaN、TaSiO2、TaAlN2、CrN又はTiNか
らなる下地層をAlN基材上に形成した以外、実施例1と
同様な方法により回路基板を製造した。
Except that Ta of Examples 3 to 8 the thickness of 10 nm, TaN, an underlayer made of TaSiO 2, TaAlN 2, CrN or TiN was formed on an AlN substrate was prepared circuit substrate by a method similar to the first embodiment.

実施例9 まず、熱伝導率280W/m・KのAlN基材を平均線表面粗
さが150nmとなるようにラッピング、ポリッシングを行
なった後、該基材表面を湿式洗浄、逆スパッタを行なっ
た。つづいて、AlN基材表面に該基材を100℃に加熱しな
がらRFスパッタにより入力パワー600Wの条件で厚さ50nm
のCr層及び厚さ200nmのAu層を成膜した後、写真蝕刻法
によりレジストパターンを形成した後、該パターンをマ
スクとしてAu層をKI+I2+脱イオン水のエッチャント、
Cr層をH2SO4+脱イオン水のエッチャントにより順次選
択的にエッチングしてCr/Auからなる第1層薄膜導体を
形成した。ひきつづき、RFスパッタ法により厚さ900nm
のAlN薄膜を全面に成膜した。なお、このAlN薄膜の抵抗
率は2.0×1010Ω・cmであった。
Example 9 First, after lapping and polishing an AlN substrate having a thermal conductivity of 280 W / m · K so that the average line surface roughness was 150 nm, the substrate surface was subjected to wet cleaning and reverse sputtering. . Subsequently, the thickness of the AlN substrate was increased to 50 nm under the condition of an input power of 600 W by RF sputtering while heating the substrate to 100 ° C.
After forming a Cr layer and a 200 nm-thick Au layer, a resist pattern is formed by photolithography, and using the pattern as a mask, the Au layer is etched with KI + I 2 + deionized water,
The Cr layer was sequentially and selectively etched with an etchant of H 2 SO 4 + deionized water to form a first layer thin film conductor made of Cr / Au. Continued, RF sputtering method, 900nm thick
Was formed on the entire surface. The resistivity of this AlN thin film was 2.0 × 10 10 Ω · cm.

次いで、前記AlN薄膜上にRFスパッタにより入力パワ
ー600Wの条件でTaNからなる厚さ5nmの下地層を成膜し
た。つづいて、真空を破らずに同様なRFスパッタにより
50%Ni−50%Crからなる厚さ60nmの薄膜抵抗体材料層及
びAuからなる厚さ200nmの薄膜導体材料層を順次形成し
た。次いで、前記薄膜導体材料層に写真蝕刻法によりレ
ジストパターンを形成した後、該パターンをマスクとし
てAuからなる薄膜導体材料層をKI+I2+脱イオン水のエ
ッチャントにより選択的にエッチングして第2層薄膜導
体を形成した。更に、その下の薄膜抵抗体材料層を別の
写真蝕刻法により形成したレジストパターンをマスクと
して王水+脱イオン水のエッチャントで選択的にエッチ
ングして薄膜抵抗体を形成した。この後、350℃、2時
間のアニーリングを行って回路基板を製造した。なお、
アニーリング後の薄膜抵抗体のシート抵抗は45Ω/□で
あった。
Next, an underlayer of TaN having a thickness of 5 nm was formed on the AlN thin film by RF sputtering at an input power of 600 W. Then, with the same RF sputtering without breaking vacuum
A thin film resistor material layer of 50% Ni-50% Cr with a thickness of 60 nm and a thin film conductor material layer of Au with a thickness of 200 nm were sequentially formed. Next, after forming a resist pattern on the thin film conductor material layer by photolithography, the thin film conductor material layer made of Au is selectively etched with an etchant of KI + I 2 + deionized water using the pattern as a mask to form a second layer. A thin film conductor was formed. Further, a thin film resistor was formed by selectively etching the underlying thin film resistor material layer with an etchant of aqua regia and deionized water using a resist pattern formed by another photolithography method as a mask. Thereafter, annealing was performed at 350 ° C. for 2 hours to manufacture a circuit board. In addition,
The sheet resistance of the thin film resistor after annealing was 45Ω / □.

比較例 まず、熱伝導率280W/m・KのAlN基材を平均線表面粗
さが150nmとなるようにラッピング、ポリッシングを行
なった後、該基材表面を湿式洗浄、逆スパッタを行なっ
た。つづいて、AlN基材表面に該基材を100℃に加熱しな
がらRFスパッタにより入力パワー700Wの条件で50%Ni−
50%Crからなる厚さ60nmの薄膜抵抗体材料層及びAuから
なる厚さ200nmの薄膜導体材料層を順次形成した。次い
で、前記薄膜導体材料層に写真蝕刻法によりレジストパ
ターンを形成した後、該パターンをマスクとして前記Au
からなる薄膜導体材料層をKI+I2+脱イオン水のエッチ
ャントにより選択的にエッチングして薄膜導体を形成し
た。更に、その下の薄膜抵抗体材料層を別の写真蝕刻法
により形成したレジストパターンをマスクとして王水+
脱イオン水のエッチャントで選択的にエッチングして薄
膜抵抗体を形成した。この後、350℃、2時間のアニー
リングを行って回路基板を製造した。なお、アニーリン
グ後の薄膜抵抗体のシート抵抗は20Ω/□であった。
Comparative Example First, after lapping and polishing an AlN substrate having a thermal conductivity of 280 W / m · K so that the average line surface roughness became 150 nm, the substrate surface was subjected to wet cleaning and reverse sputtering. Subsequently, while heating the AlN substrate surface to 100 ° C., RF sputtering was used to apply a 50% Ni-
A thin-film resistor material layer of 50% Cr and a thickness of 60 nm and a thin-film conductor material layer of Au and a thickness of 200 nm were sequentially formed. Next, after forming a resist pattern on the thin film conductor material layer by photolithography, the Au
Was selectively etched with an etchant of KI + I 2 + deionized water to form a thin film conductor. Further, using a resist pattern in which a thin film resistor material layer thereunder is formed by another photolithography method as a mask, aqua regia +
The thin film resistor was formed by selective etching with an etchant of deionized water. Thereafter, annealing was performed at 350 ° C. for 2 hours to manufacture a circuit board. The sheet resistance of the thin film resistor after annealing was 20Ω / □.

しかして、本実施例1〜9及び比較例の回路基板につ
いてアニーリング前後の抵抗変化率(%)、TCR(ppm/
℃)及び薄膜抵抗体の下地に対する接合強度(MPa)を
測定した。その結果を第1表に示した。
Thus, for the circuit boards of Examples 1 to 9 and Comparative Example, the resistance change rate (%) before and after annealing, TCR (ppm / ppm)
C.) and the bonding strength (MPa) of the thin film resistor to the base. The results are shown in Table 1.

第1表から明らかなように本実施例1〜9の回路基板
は、比較例の回路基板に比べて薄膜抵抗体のアニーリン
グ前後の抵抗変化率が小さく、TCRも一桁近く小さく、
優れた特性を有することがわかる。また、本実施例1〜
9の回路基板の薄膜抵抗体は下地に対する接合強度も比
較例のようにAlN基材に直接形成した場合と同様に優れ
ていることがわかる。
As is clear from Table 1, the circuit boards of Examples 1 to 9 have smaller resistance change rates before and after annealing of the thin-film resistor than the circuit board of the comparative example, and have a TCR smaller by almost one digit.
It turns out that it has excellent characteristics. In addition, Examples 1 to
It can be seen that the thin film resistor of the circuit board No. 9 has excellent bonding strength to the base as well as the case where the thin film resistor is directly formed on the AlN substrate as in the comparative example.

[発明の効果] 以上詳述した如く、本発明によればAlN基材に組成ず
れを生じることなく安定した抵抗値を有する薄膜抵抗体
を形成でき、ひいては能動素子等の高密度実装が可能な
薄膜配線実装モジュールに有用な高信頼性の回路基板を
提供できる。
[Effects of the Invention] As described in detail above, according to the present invention, it is possible to form a thin-film resistor having a stable resistance value without causing a composition deviation in an AlN base material, and thus to enable high-density mounting of active elements and the like. A highly reliable circuit board useful for a thin film wiring mounting module can be provided.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】窒化アルミニウム基材上にニクロム系合金
からなる薄膜抵抗体を設けた回路基板において、前記基
材と前記抵抗体の間に該薄膜抵抗体を構成するニクロム
系合金よりクロム含有量の多いニクロム系合金からなる
下地層を設けたことを特徴とする回路基板。
1. A circuit board having a thin film resistor made of a nichrome alloy on an aluminum nitride base material, wherein a chromium content of the thin film resistor between the base material and the resistor is higher than that of the nichrome alloy forming the thin film resistor. A circuit board comprising a base layer made of a nichrome-based alloy.
【請求項2】窒化アルミニウム基材上にニクロム系合金
からなる薄膜抵抗体を設けた回路基板において、前記基
材と前記抵抗体の間にTa、TaN、TaSiO2、TaAlN2、CrN、
TiNから選ばれる材料よりなる下地層を設けたことを特
徴とする回路基板。
2. A circuit board in which a thin film resistor made of a nichrome alloy is provided on an aluminum nitride base material, wherein Ta, TaN, TaSiO 2 , TaAlN 2 , CrN,
A circuit board comprising a base layer made of a material selected from TiN.
JP1083547A 1989-03-31 1989-03-31 Circuit board Expired - Lifetime JP2760560B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1083547A JP2760560B2 (en) 1989-03-31 1989-03-31 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1083547A JP2760560B2 (en) 1989-03-31 1989-03-31 Circuit board

Publications (2)

Publication Number Publication Date
JPH02262392A JPH02262392A (en) 1990-10-25
JP2760560B2 true JP2760560B2 (en) 1998-06-04

Family

ID=13805538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1083547A Expired - Lifetime JP2760560B2 (en) 1989-03-31 1989-03-31 Circuit board

Country Status (1)

Country Link
JP (1) JP2760560B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04233787A (en) * 1990-12-28 1992-08-21 Mitsubishi Materials Corp Multilayer printed circuit board

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60762A (en) * 1983-06-17 1985-01-05 Nec Corp Manufacture of hybrid integrated circuit

Also Published As

Publication number Publication date
JPH02262392A (en) 1990-10-25

Similar Documents

Publication Publication Date Title
JP2839579B2 (en) Semiconductor device and manufacturing method thereof
US4434544A (en) Multilayer circuit and process for manufacturing the same
KR100324209B1 (en) Fabrication method of silver inductors
US6331811B2 (en) Thin-film resistor, wiring substrate, and method for manufacturing the same
JP2000294738A (en) Thin-film resistor and its manufacturing method
JP2760560B2 (en) Circuit board
JPS62199043A (en) Thin film circuit and manufacture of the same
JP2664744B2 (en) Aluminum nitride thin film circuit board
JP3255112B2 (en) Wiring board with built-in resistor and method of manufacturing the same
JPH07249712A (en) Formation of resistive conductive pattern on aluminum nitride substrate
JP2703276B2 (en) Aluminum nitride thin film circuit board
JPH0245996A (en) Manufacture of hybrid integrated circuit
JPH09503627A (en) Electrical resistance structure
JP2006019323A (en) Resistance composition, chip resistor and their manufacturing method
JP2703276C (en)
JP2555898B2 (en) Method for metallizing diamond thin film and method for forming pattern
JPS63155743A (en) Semiconductor device
JP3029702B2 (en) AlN substrate
JP3677381B2 (en) Wiring board
JP4056797B2 (en) Resistance element and manufacturing method thereof
JPH05152245A (en) Manufacture of semiconductor element
JP2007036089A (en) Lower electrode structure
JPH06163544A (en) Wiring structure of semiconductor integrated circuit and fabrication thereof
JP2643004B2 (en) Hybrid IC substrate
US5599737A (en) Conductive runner fabrication

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080320

Year of fee payment: 10

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

Free format text: JAPANESE INTERMEDIATE CODE: R313114

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080320

Year of fee payment: 10

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080320

Year of fee payment: 10

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090320

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100320

Year of fee payment: 12

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100320

Year of fee payment: 12