JP2760029B2 - Solid-state imaging device - Google Patents

Solid-state imaging device

Info

Publication number
JP2760029B2
JP2760029B2 JP1087806A JP8780689A JP2760029B2 JP 2760029 B2 JP2760029 B2 JP 2760029B2 JP 1087806 A JP1087806 A JP 1087806A JP 8780689 A JP8780689 A JP 8780689A JP 2760029 B2 JP2760029 B2 JP 2760029B2
Authority
JP
Japan
Prior art keywords
signal
imaging device
state imaging
photoelectric conversion
solid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1087806A
Other languages
Japanese (ja)
Other versions
JPH02266564A (en
Inventor
善郎 宇田川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP1087806A priority Critical patent/JP2760029B2/en
Publication of JPH02266564A publication Critical patent/JPH02266564A/en
Application granted granted Critical
Publication of JP2760029B2 publication Critical patent/JP2760029B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明はCCD素子やMOS素子を用いたカラー用の固体撮
像装置に関する。
The present invention relates to a color solid-state imaging device using a CCD element or a MOS element.

[従来の技術] 第5図はMOS式の従来例のカラー撮像素子及びその出
力処理回路の構成ブロック図を示す。10は感光領域であ
り、多数の光電変換素子10Cが二次元平面状に配置され
ている。光電変換素子10Cはの上面には、2画素×2画
素を1組として、W(素通し)、Cy(シアン)、Ye(イ
エロー)、G(グリーン)の4色のマイクロ・フィルタ
は貼り付けられている。図示しないクロック回路からの
制御クロックにより、公知の駆動回路(図示せず)が垂
直シフト・レジスタ12及び水平シフト・レジスタ14を駆
動し、テレビ信号の走査タイミングに合わせてスイッチ
16,18を制御して、光電変換素子10Cの信号を信号出力線
20,22に読み出す。信号出力線20には、フィルタW,Yeの
信号が交互に出力され、信号出力線22には、フィルタG,
Cyの信号が交互に読み出される。
[Prior Art] FIG. 5 is a block diagram showing the configuration of a conventional MOS type color image sensor and its output processing circuit. Reference numeral 10 denotes a photosensitive area, in which a large number of photoelectric conversion elements 10C are arranged in a two-dimensional plane. On the upper surface of the photoelectric conversion element 10C, micro-filters of four colors of W (clear), Cy (cyan), Ye (yellow), and G (green) are affixed on a set of 2 pixels × 2 pixels. ing. A known drive circuit (not shown) drives a vertical shift register 12 and a horizontal shift register 14 by a control clock from a clock circuit (not shown), and switches the switches in accordance with the scanning timing of the television signal.
16 and 18 are controlled, and the signal of the photoelectric conversion element 10C is output to the signal output line.
Read out at 20,22. The signals of the filters W and Ye are alternately output to the signal output line 20, and the filters G and
Cy signals are read alternately.

信号出力線20,22の信号は、加算回路24で加算され
る。即ち、垂直方向に並ぶ2画素の信号から高帯域輝度
信号を形成する。他方、サンプリング回路26はW,Cy,Ye
信号をサンプリングし、マトリクス回路28はR=W−C
y、B=W−Yeの減算処理によりR信号及びB信号を形
成する。プロセス回路30は上記の如く形成された輝度信
号及びR,B信号にガンマ補正、アパーチャー補正などの
公知の映像信号処理を施し、エンコーダ回路32がNTSC方
式テレビジョン信号に変換する。
The signals on the signal output lines 20 and 22 are added by an adding circuit 24. That is, a high-band luminance signal is formed from signals of two pixels arranged in the vertical direction. On the other hand, the sampling circuit 26 has W, Cy, Ye
The signal is sampled, and the matrix circuit 28 calculates R = W−C
The R signal and the B signal are formed by subtraction processing of y, B = W−Ye. The process circuit 30 performs known video signal processing such as gamma correction and aperture correction on the luminance signal and the R and B signals formed as described above, and the encoder circuit 32 converts the signal into an NTSC television signal.

[発明が解決しようとする課題] しかし、上記従来例では、色フィルタの各色毎に入射
光量に対する飽和レベルが異なるので、光電変換素子の
ダイナミック・レンジを有効に利用していないという問
題がある。即ち、W(素通しフィルタ)を透過して光電
変換素子に入射する光量を1とすると、Cy,Yeの場合は
概略でその2/3、Gの場合は概略でその1/3しか入射して
おらず、GよりもCy,Ye、Cy,YeよりもWが先に飽和して
しまう。
[Problems to be Solved by the Invention] However, in the above conventional example, since the saturation level with respect to the incident light amount is different for each color of the color filter, there is a problem that the dynamic range of the photoelectric conversion element is not effectively used. That is, assuming that the amount of light transmitted through W (transparent filter) and incident on the photoelectric conversion element is 1, approximately 2/3 of the light is incident on Cy and Ye, and approximately 1/3 of the light is incident on G. In other words, Cy and Ye saturate before G and W saturate before Cy and Ye.

飽和してしまうと、線形性が失われ、映像信号として
利用できないので、Wの光電変換素子が飽和しない範囲
で入射光量を調節することになる。その場合、Cy,Ye,G
の光電変換素子は飽和レベルに達することがなく、ダイ
ナミック・レンジを有効に利用できず、S/N比も良好な
結果を得られないという問題点がある。
If saturated, the linearity is lost and cannot be used as a video signal. Therefore, the amount of incident light is adjusted within a range where the W photoelectric conversion element is not saturated. In that case, Cy, Ye, G
However, there is a problem that the photoelectric conversion element does not reach the saturation level, cannot effectively use the dynamic range, and cannot obtain a good S / N ratio.

そこで本発明はこのような問題点を解決する撮像装置
を提示することを目的とする。
Therefore, an object of the present invention is to provide an imaging device that solves such a problem.

[課題を解決するための手段] 本発明に係る固体撮像装置は、マイクロ・カラー・フ
ィルタを用いる固体撮像装置であって、縦2画素、横2
画素を1単位とし、単辺比3/4なるシアン色及びイエロ
ー色のカラー・フィルタを、それらの重なる面積が最小
になるように配置したことを特徴とする。
[Means for Solving the Problems] A solid-state imaging device according to the present invention is a solid-state imaging device using a micro color filter, and has two pixels vertically and two pixels horizontally.
A pixel is defined as one unit, and cyan and yellow color filters having a single-side ratio of 3/4 are arranged so that the overlapping area thereof is minimized.

[作用] 上記手段により、各画素の飽和度がほぼ一定になり、
光電変換素子のダイナミック・レンジをフルに活用でき
るようになる。
[Operation] By the above means, the saturation of each pixel becomes substantially constant,
The dynamic range of the photoelectric conversion element can be fully utilized.

[実施例] 以下、図面を参照して本発明の実施例を説明する。Embodiment An embodiment of the present invention will be described below with reference to the drawings.

第1図は本発明の一実施例におけるの構成ブロック図
を示し、第2図はその色フィルタ配列を示す。従来例で
は、1つの光電変換素子に1つの色を割り当てていた
が、本実施例では、第2図に示すように、1つの光電変
換素子(即ち、画素)の受光面を縦横で2分割(合計、
4つ)に区分し、W,Cy,Ye,Gがそれぞれ1/4ずつ割り当て
られている画素(第2図のP11,P22)と、Cy又はYeを3/
4、Gを1/4割り当てた画素(第2図のP12,P21)とを設
ける。前者の画素は輝度信号生成に利用し、後者の画素
を色信号生成用に用いる。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 shows the color filter arrangement. In the conventional example, one color is assigned to one photoelectric conversion element, but in the present embodiment, as shown in FIG. 2, the light receiving surface of one photoelectric conversion element (that is, pixel) is divided into two parts vertically and horizontally. (total,
4), and W, Cy, Ye, and G are assigned 1/4 each (P 11 , P 22 in FIG. 2), and Cy or Ye is 3 /
4. Pixels (P 12 and P 21 in FIG. 2) to which G is assigned to 1/4 are provided. The former pixel is used for generating a luminance signal, and the latter pixel is used for generating a color signal.

例えば、画素P11の信号出力をi、画素P21の信号出力
をj、画素P12の信号出力をkとしたとき、i,j,kは下記
の如く表される。
For example, when i the signal output of the pixel P 11, the signal output of the pixel P 21 was j, the signal output of the pixel P 12 and k, i, j, k is represented as follows.

i=W+Cy+Ye+G =(R+G+B)+(G+B)+(R+G)+G =2(R+2G+B) (1) j=3Cy+G =3(G+B)+G =4G+3B (2) k=3Ye+G =3(R+G)+G =3R+4G (3) 式(1),(2),(3)から、R信号及びB信号は
次式で表される。
i = W + Cy + Ye + G = (R + G + B) + (G + B) + (R + G) + G = 2 (R + 2G + B) (1) j = 3Cy + G = 3 (G + B) + G = 4G + 3B (2) k = 3Ye + G = 3 (R + G) + G = G = 3 3) From equations (1), (2) and (3), the R signal and the B signal are represented by the following equations.

R=(1/3)(3i−2j−k) (4) B=(1/3)(3i−j−2k) (5) なお、第2図に図示していない部分の色フィルタ配列
は、第2図の4つの画素の色フィルタ配列を基本とし、
それを、それぞれ水平方向及び垂直方向にシフトさせた
ものになる。
R = (1/3) (3i−2j−k) (4) B = (1/3) (3i−j−2k) (5) The color filter arrangement of the portion not shown in FIG. , Based on the color filter arrangement of four pixels in FIG.
It is shifted horizontally and vertically, respectively.

第1図を説明する。40は感光領域であり、40Cは光電
変換素子である。光電変換素子40Cの受光面には、第2
図に示すような配列の色フィルタが貼り付けられてい
る。42は垂直シフト・レジスタ、44は水平シフト・レジ
スタであり、各光電変換素子40Cの信号は、従来例と同
様に、信号出力線46,48に読み出される。スイッチ50は
信号出力線46,48からの信号をシリアル化し、A/D変換器
52は画素毎にディジタル化する。そのディジタル・デー
タはメモリ制御回路54を介してメモリ56に書き込まれ
る。メモリ制御回路54はメモリ56の画像データに対し、
後述する補間演算及び公知のマトリクス演算を施し、輝
度信号Y、色差信号R−Y,B−Yの形式で出力する。こ
れらはD/A変換器58でアナログ化され、エンコーダ60に
よりNTSC信号に変換される。
FIG. 1 will be described. 40 is a photosensitive area, and 40C is a photoelectric conversion element. The light receiving surface of the photoelectric conversion element 40C has a second
A color filter having an arrangement as shown in the figure is attached. 42 is a vertical shift register, 44 is a horizontal shift register, and the signal of each photoelectric conversion element 40C is read out to signal output lines 46, 48 as in the conventional example. The switch 50 serializes the signal from the signal output lines 46 and 48 and converts the signal into an A / D converter.
Numeral 52 digitizes each pixel. The digital data is written to the memory 56 via the memory control circuit 54. The memory control circuit 54 controls the image data in the memory 56
An interpolation operation and a known matrix operation, which will be described later, are performed, and the result is output in the form of a luminance signal Y and color difference signals RY and BY. These are converted into analog signals by the D / A converter 58, and are converted into NTSC signals by the encoder 60.

画素配置を示す第3図を参照して、メモリ制御回路54
における補間演算を説明する。第3図で、斜線を施した
画素(P11,P31,P51など)は、先に説明した輝度信号生
成用のフィルタ配列の画素である。ここで、画素P32
着目すると、 P32=(1/4)(P31+P33+P22+P42) により補間データを形成する。同様にP52,P72などに
ついても、周辺の4画素から補間演算する。これにより
各水平ラインの輝度信号を形成する。他方、色信号につ
いては、式(4),(5)からR信号及びB信号を形成
でき、上述の輝度信号を減算することにより、色差信号
を形成する。
Referring to FIG. 3 showing the pixel arrangement, a memory control circuit 54
Will be described. In Figure 3, the pixels indicated by hatching (such as P 11, P 31, P 51 ) is a pixel of a filter arrangement for a luminance signal generation described above. Here, paying attention to the pixel P 32, forming the interpolated data by P 32 = (1/4) (P 31 + P 33 + P 22 + P 42). Similarly, for P52 , P72, etc., interpolation calculation is performed from the surrounding four pixels. Thereby, a luminance signal of each horizontal line is formed. On the other hand, for the color signal, an R signal and a B signal can be formed from the equations (4) and (5), and a color difference signal is formed by subtracting the above-described luminance signal.

次に、第2図のフィルタ配置を実現する方法を説明す
る。第4図に示すように、縦横で2画素ずつの4画素を
基本単位とし、その左下側に、一辺の長さ比が3/4の正
方形のYeフィルタを配置し、右上側に一辺の長さ比が3/
4の正方形のCyフィルタを配置する。YeフィルタとCyフ
ィルタが中央部分で重なり、第2図のGの部分になる。
YeフィルタもCyフィルタも無い部分が、第2図のW(素
通し)の部分になる。この構成では、各色のフィルタの
大きさが過小にならず、製造プロセス上有利になる。
Next, a method for realizing the filter arrangement shown in FIG. 2 will be described. As shown in FIG. 4, a square Ye filter having a length ratio of 3/4 on one side is arranged on the lower left side, and the length of one side is on the upper right side. The ratio is 3 /
Place a 4 square Cy filter. The Ye filter and the Cy filter overlap at the center, and become the portion G in FIG.
The portion without both the Ye filter and the Cy filter is the portion of W (clear) in FIG. With this configuration, the size of the filter for each color does not become too small, which is advantageous in the manufacturing process.

上記説明ではMOSデバイスを例にとったが、本発明はC
CD型などの他の撮像素子にも適用できる。また信号処理
回路部分も、ディジタル方式だけでなく、1H遅延線を組
み合わせたアナログ方式によっても実現できることはい
うまでもない。
In the above description, a MOS device is taken as an example, but the present invention uses a C device.
It can also be applied to other image sensors such as a CD type. Needless to say, the signal processing circuit can be realized not only by a digital system but also by an analog system combining 1H delay lines.

[発明の効果] 以上の説明から容易に理解できるように、本発明によ
れば、各画素の飽和光量が相等しくなり、ダイナミック
・レンジを有効に利用できる。また、製造上も、複雑に
なることなく、簡易・安価に製造できるという効果があ
る。
[Effects of the Invention] As can be easily understood from the above description, according to the present invention, the saturation light amounts of the respective pixels become equal, and the dynamic range can be effectively used. In addition, there is an effect that it can be manufactured simply and inexpensively without becoming complicated.

【図面の簡単な説明】 第1図は本発明の一実施例の概略構成ブロック図、第2
図は本発明の一実施例の色フィルタ配列図、第3図は補
間演算の説明図、第4図は第2図の色フィルタ配列を実
現する方法の説明図、第5図は従来例の構成ブロック図
である。 40:感光領域、40C:光電変換素子、42:垂直シフト・レジ
スタ、44:水平シフト・レジスタ、46,48:信号読出し
線、50:スイッチ、54:メモリ制御回路、56:メモリ、60:
エンコーダ
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic block diagram of an embodiment of the present invention, FIG.
FIG. 3 is a diagram illustrating a color filter array according to an embodiment of the present invention, FIG. 3 is a diagram illustrating an interpolation operation, FIG. 4 is a diagram illustrating a method for realizing the color filter array of FIG. 2, and FIG. FIG. 3 is a configuration block diagram. 40: photosensitive area, 40C: photoelectric conversion element, 42: vertical shift register, 44: horizontal shift register, 46, 48: signal readout line, 50: switch, 54: memory control circuit, 56: memory, 60:
Encoder

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】マイクロ・カラー・フィルタを用いる固体
撮像装置であって、縦2画素、横2画素を1単位とし、
単辺比3/4なるシアン色及びイエロー色のカラー・フィ
ルタを、それらの重なる面積が最小になるように配置し
たことを特徴とする固体撮像装置。
1. A solid-state imaging device using a micro color filter, wherein two pixels vertically and two pixels horizontally are defined as one unit.
A solid-state imaging device comprising a cyan color filter and a yellow color filter each having a single-side ratio of 3/4, arranged such that an overlapping area thereof is minimized.
JP1087806A 1989-04-06 1989-04-06 Solid-state imaging device Expired - Fee Related JP2760029B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1087806A JP2760029B2 (en) 1989-04-06 1989-04-06 Solid-state imaging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1087806A JP2760029B2 (en) 1989-04-06 1989-04-06 Solid-state imaging device

Publications (2)

Publication Number Publication Date
JPH02266564A JPH02266564A (en) 1990-10-31
JP2760029B2 true JP2760029B2 (en) 1998-05-28

Family

ID=13925222

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1087806A Expired - Fee Related JP2760029B2 (en) 1989-04-06 1989-04-06 Solid-state imaging device

Country Status (1)

Country Link
JP (1) JP2760029B2 (en)

Also Published As

Publication number Publication date
JPH02266564A (en) 1990-10-31

Similar Documents

Publication Publication Date Title
JP4022638B2 (en) Image pickup device and image pickup apparatus using the same
WO1986001678A2 (en) Single-chip solid-state color image sensor and camera incorporating such a sensor
JP2760029B2 (en) Solid-state imaging device
JP3123415B2 (en) Single-chip color solid-state imaging device
JP2916299B2 (en) Solid-state imaging device
JPS6351437B2 (en)
JPH03231589A (en) Image pickup device
JPH0313192A (en) Solid-state image pickup device
JPH0488782A (en) Image pickup device
JP2965372B2 (en) Solid-state imaging device
JP3551670B2 (en) Electronic still camera
JP2693845B2 (en) Color imaging device
JPS6070887A (en) Solid-state image pickup device
JP2845602B2 (en) Color solid-state imaging device
JP2725265B2 (en) Solid-state imaging device
JP2845613B2 (en) Color solid-state imaging device
JP2791888B2 (en) Color coding circuit
JP2587225B2 (en) Solid-state imaging device
JP2979549B2 (en) Imaging device
JPH0523114B2 (en)
JPH0528037B2 (en)
JPS5885690A (en) Solid-state color image pickup device
JPH0492591A (en) Still video camera
JPH07162874A (en) Single ccd high-sensitivity color camera apparatus
JPS63141485A (en) Solid-state image pickup element for color picture

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees